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AgeCommit message (Expand)AuthorFilesLines
2021-11-09arm: add armv9-a architecture to -marchPrzemyslaw Wirkus6-7/+68
2021-11-08rs6000: Add escape-newline support for builtins filesBill Schmidt2-211/+363
2021-11-08Fix couple of issues in large PIC model on x86-64/VxWorksEric Botcazou2-5/+17
2021-11-08powerpc: Fix vsx_splat_v4si_di breakage on Power8.David Edelsohn1-1/+1
2021-11-08rs6000: Miscellaneous uses of rs6000_builtins_decl_xBill Schmidt1-3/+14
2021-11-08rs6000: Update rs6000_builtin_declBill Schmidt1-0/+20
2021-11-08Fix 'Copyright (C) 2020-21' into '2020-2021'Thomas Schwinge5-5/+5
2021-11-08aarch64: LD3/LD4 post-modify costs for struct modesRichard Sandiford1-2/+20
2021-11-08Disables gimple folding for VSX_BUILTIN_XVMINDP, VSX_BUILTIN_XVMAXDP,ALTIVEC_...Haochen Gui1-2/+16
2021-11-07rs6000: Replace the builtin expansion machineryBill Schmidt1-0/+1216
2021-11-06powerpc: Fix vsx_splat_v4si in 32 bit modeDavid Edelsohn1-2/+2
2021-11-05Darwin : Make trampoline templates linker-visible.Iain Sandoe1-0/+2
2021-11-05Darwin, aarch64 : Initial support for the self-host driver.Iain Sandoe2-0/+36
2021-11-05Support TI mode and soft float on PA64John David Anglin4-13/+180
2021-11-05x86: Make stringop_algs::stringop_strategy ctor constexpr [PR100246]Jakub Jelinek1-2/+3
2021-11-05AArch64: Fix PR103085Wilco Dijkstra2-2/+5
2021-11-05Move PREFERRED_DEBUGGING_TYPE define in pa64-hpux.h to pa.hJohn David Anglin2-1/+3
2021-11-05gcc: vx-common.h: fix test for VxWorks7Rasmus Villemoes1-1/+1
2021-11-04rs6000: Fix incorrect fusion constraint [PR102991]Xionghu Luo2-65/+65
2021-11-04IBM Z: Define STACK_CHECK_MOVING_SPAndreas Krebbel1-0/+5
2021-11-04AArch64: Lower intrinsics shift to GIMPLE when possible.Tamar Christina3-8/+56
2021-11-04aarch64: Pass and return Neon vector-tuple types without a parallelJonathan Wright1-0/+12
2021-11-04aarch64: Add machine modes for Neon vector-tuple typesJonathan Wright8-5135/+2141
2021-11-04aarch64: Move Neon vector-tuple type declaration into the compilerJonathan Wright5-476/+107
2021-11-04aarch64: Move more code into aarch64_vector_costsRichard Sandiford1-184/+155
2021-11-04vect: Convert cost hooks to classesRichard Sandiford3-256/+153
2021-11-04Extend vternlog define_insn_and_split to memory_operand to enable more optimz...liuhongt2-15/+32
2021-11-04i386: Auto vectorize sdot_prod, usdot_prod with VNNI instruction.Hongyu Wang1-8/+56
2021-11-04i386: Fix wrong result for AMX-TILE intrinsic when parsing expression.Hongyu Wang1-3/+3
2021-11-03RISC-V: Fix register class subset checks for CLASS_MAX_NREGSMaciej W. Rozycki1-2/+2
2021-11-03aarch64: enable Ampere-1 CPUPhilipp Tomsich4-2/+188
2021-11-03AArch64: Improve GOT addressingWilco Dijkstra3-75/+30
2021-11-03IBM Z: Free bbs in s390_loop_unroll_adjustStefan Schulze Frielinghaus1-1/+4
2021-11-02x86_64: Improved implementation of TImode rotations.Roger Sayle1-2/+18
2021-11-02RISC-V: Fix build errors with shNadd/shNadd.uw patterns in zba cost modelMaciej W. Rozycki1-3/+2
2021-11-02ia32: Disallow mode(V1TI) [PR103020]Jakub Jelinek1-0/+4
2021-11-02x86_64: Expand ashrv1ti (and PR target/102986)Roger Sayle3-13/+543
2021-11-02IBM Z: Fix address of operands will never be NULL warningsStefan Schulze Frielinghaus1-5/+4
2021-11-01AArch64: Add better costing for vector constants and operationsTamar Christina5-20/+91
2021-11-01aarch64: Fix redundant check in aut insn generationDan Li2-7/+2
2021-10-28rs6000: Optimize __builtin_shuffle when it's used to zero the upper bits [PR1...Xionghu Luo1-3/+36
2021-10-29Enable vectorization for _Float16 floor/ceil/trunc/nearbyint/rint operations.liuhongt5-6/+69
2021-10-29or1k: Add return address argument to _mcount callStafford Horne1-2/+3
2021-10-28[PATCH 4/5] gcc/nios2: Define the musl linkerRichard Purdie1-0/+1
2021-10-28rs6000: Fix ICE of vect cost related to V1TI [PR102767]Kewen Lin1-31/+33
2021-10-28RISC-V: Fix wrong predicator for zero_extendsidi2_internal patternKito Cheng1-1/+1
2021-10-28RISC-V: Handle zi* extension correctly for arch-canonicalize scriptKito Cheng1-1/+1
2021-10-27rs6000: Fold xxsel to vsel since they have same semanticsXionghu Luo2-81/+36
2021-10-27rs6000: Fix wrong code generation for vec_sel [PR94613]Xionghu Luo5-55/+174
2021-10-28AVX512FP16: Optimize _Float16 reciprocal for div and sqrtHongyu Wang3-19/+117
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