| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2025-01-30 | AVR: Provide built-ins for strlen where the string lives in some AS. | Georg-Johann Lay | 2 | -1/+40 |
| 2025-01-30 | AVR: Only provide a built-in when it is available. | Georg-Johann Lay | 4 | -4/+32 |
| 2025-01-30 | s390: Fix up *vec_cmpgt{,u}<mode><mode>_nocc_emu splitters [PR118696] | Jakub Jelinek | 1 | -2/+2 |
| 2025-01-29 | AVR: Allow to share libgcc's __negsi2. | Georg-Johann Lay | 1 | -0/+9 |
| 2025-01-29 | [PATCH] RX: Restrict displacement ranges in "Q" constraint | Yoshinori Sato | 1 | -1/+2 |
| 2025-01-29 | RISC-V: Fix incorrect code gen for scalar signed SAT_TRUNC [PR117688] | Pan Li | 1 | -1/+1 |
| 2025-01-29 | RISC-V: Fix incorrect code gen for scalar signed SAT_SUB [PR117688] | Pan Li | 1 | -2/+2 |
| 2025-01-29 | RISC-V: Fix incorrect code gen for scalar signed SAT_ADD [PR117688] | Pan Li | 1 | -2/+2 |
| 2025-01-29 | RISC-V: Refactor SAT_* operand rtx extend to reg help func [NFC] | Pan Li | 1 | -29/+49 |
| 2025-01-27 | [PR target/114085] Fix H8 constraint issue which led to ICE | Jeff Law | 3 | -11/+7 |
| 2025-01-27 | RISC-V: Disable two-source permutes for now [PR117173]. | Robin Dapp | 2 | -1/+16 |
| 2025-01-26 | RISC-V: Make FRM as global register [PR118103] | Pan Li | 1 | -1/+3 |
| 2025-01-25 | [RISC-V][PR target/116256] Improve handling of single bit constants | Jeff Law | 2 | -4/+11 |
| 2025-01-24 | aarch64: Add +cpa feature flag | Andrew Carlotti | 2 | -1/+3 |
| 2025-01-24 | aarch64: Add command line support for armv9.5-a | Andrew Carlotti | 1 | -0/+1 |
| 2025-01-24 | aarch64: Make AARCH64_FL_CRYPTO always unset | Andrew Carlotti | 1 | -4/+8 |
| 2025-01-24 | aarch64: Refactor aarch64_rewrite_mcpu | Andrew Carlotti | 1 | -1/+0 |
| 2025-01-24 | aarch64: Rewrite architecture strings for assembler | Andrew Carlotti | 4 | -26/+23 |
| 2025-01-24 | aarch64: Move arch/cpu parsing to aarch64-common.cc | Andrew Carlotti | 2 | -322/+18 |
| 2025-01-24 | aarch64: Inline aarch64_print_hint_for_core_or_arch | Andrew Carlotti | 1 | -28/+22 |
| 2025-01-24 | aarch64: Adjust option parsing parameter types. | Andrew Carlotti | 1 | -81/+93 |
| 2025-01-24 | aarch64: Replace duplicate cpu enums | Andrew Carlotti | 4 | -22/+15 |
| 2025-01-24 | aarch64: Improve mcpu/march conflict check | Andrew Carlotti | 1 | -5/+2 |
| 2025-01-24 | c++/modules: Fix linkage checks for exported using-decls | yxj-github-437 | 2 | -0/+2 |
| 2025-01-24 | s390: Implement isfinite and isnormal optabs | Stefan Schulze Frielinghaus | 3 | -83/+104 |
| 2025-01-24 | Fix command flags for SVE2 faminmax | Saurabh Jha | 3 | -6/+5 |
| 2025-01-23 | hppa: Fix typo in ADDITIONAL_REGISTER_NAMES in pa32-regs.h | John David Anglin | 1 | -1/+1 |
| 2025-01-23 | AVR: PR118012 - Try to work around sick code from match.pd. | Georg-Johann Lay | 4 | -7/+564 |
| 2025-01-23 | aarch64: Avoid redundant writes to FPMR | Richard Sandiford | 3 | -0/+59 |
| 2025-01-23 | aarch64: Fix memory cost for FPM_REGNUM | Richard Sandiford | 1 | -2/+9 |
| 2025-01-23 | aarch64: Allow FPMR source values to be zero | Richard Sandiford | 1 | -25/+25 |
| 2025-01-23 | AVR: PR117726 - Tweak 32-bit logical shifts of 25...30 for -Oz. | Georg-Johann Lay | 3 | -37/+175 |
| 2025-01-23 | LoongArch: Fix invalid subregs in xorsign [PR118501] | Xi Ruoyao | 1 | -2/+2 |
| 2025-01-23 | i386: Omit "p" for packed in intrin name for FP8 convert | Haochen Jiang | 2 | -57/+57 |
| 2025-01-23 | i386: Change mnemonics from VCVT[,T]NEBF162I[,U]BS to VCVT[,T]BF162I[,U]BS | Haochen Jiang | 4 | -245/+195 |
| 2025-01-23 | i386: Change mnemonics from VCVTNEPH2[B,H]F8 to VCVTPH2[B,H]F8 | Haochen Jiang | 4 | -205/+205 |
| 2025-01-23 | i386: Change mnemonics from VCVTNE2PH2[B,H]F8 to VCVT2PH2[B,H]F8 | Haochen Jiang | 4 | -241/+241 |
| 2025-01-23 | i386: Change mnemonics from VCOMSBF16 to VCOMISBF16 | Haochen Jiang | 5 | -42/+41 |
| 2025-01-23 | i386: Change mnemonics from V[GETEXP,FPCLASS]PBF16 to V[GETEXP,FPCLASS]BF16 | Haochen Jiang | 4 | -51/+51 |
| 2025-01-23 | i386: Change mnemonics from V[RSQRT,SCALEF,SQRTNE]PBF16 to V[RSQRT,SCALEF,SQR... | Haochen Jiang | 4 | -87/+87 |
| 2025-01-23 | i386: Change mnemonics from V[GETMANT,REDUCENE,RNDSCALENE]PBF16 to V[GETMANT,... | Haochen Jiang | 4 | -192/+192 |
| 2025-01-23 | i386: Change mnemonics from VMINMAXNEPBF16 to VMINMAXBF16 | Haochen Jiang | 4 | -133/+134 |
| 2025-01-23 | i386: Change mnemonics from V[CMP,MAX,MIN]PBF16 to V[CMP,MAX,MIN]BF16 | Haochen Jiang | 4 | -71/+71 |
| 2025-01-23 | i386: Change mnemonics from VF[,N]M[ADD,SUB][132,213,231]NEPBF16 to VF[,N]M[A... | Haochen Jiang | 4 | -241/+241 |
| 2025-01-23 | i386: Change mnemonics from V[ADDNE,DIVNE,MULNE,RCP,SUBNE]PBF16 to V[ADD,DIV,... | Haochen Jiang | 4 | -163/+163 |
| 2025-01-22 | s390: Fix arch15 machine string for binutils | Stefan Schulze Frielinghaus | 1 | -1/+1 |
| 2025-01-22 | aarch64: Fix aarch64_write_sysregdi predicate | Richard Sandiford | 1 | -1/+1 |
| 2025-01-22 | LoongArch: Fix wrong code with <optab>_alsl_reversesi_extended | Xi Ruoyao | 1 | -3/+3 |
| 2025-01-21 | Revert "[PATCH 1/2] RISC-V:Add intrinsic support for the CMOs extensions" | Jeff Law | 1 | -84/+0 |
| 2025-01-21 | RISC-V: Unbreak bootstrap. | Robin Dapp | 1 | -2/+2 |
