index
:
riscv-gnu-toolchain/gcc.git
devel/analyzer
devel/autopar_devel
devel/autopar_europar_2021
devel/bypass-asm
devel/c++-contracts
devel/c++-coroutines
devel/c++-modules
devel/c++-name-lookup
devel/coarray_native
devel/fortran_unsigned
devel/gccgo
devel/gfortran-caf
devel/gimple-linterchange
devel/gomp-5_0-branch
devel/icpp2021
devel/ira-select
devel/ix86/evex512
devel/jlaw/crc
devel/loop-unswitch-support-switches
devel/lto-offload
devel/m2link
devel/modula-2
devel/mold-lto-plugin
devel/mold-lto-plugin-v2
devel/nothrow-detection
devel/omp/gcc-10
devel/omp/gcc-11
devel/omp/gcc-12
devel/omp/gcc-13
devel/omp/gcc-14
devel/omp/gcc-9
devel/omp/ompd
devel/power-ieee128
devel/range-gen3
devel/ranger
devel/rust/master
devel/sphinx
devel/ssa-range
devel/subreg-coalesce
devel/unified-autovect
master
releases/egcs-1.0
releases/egcs-1.1
releases/gcc-10
releases/gcc-11
releases/gcc-12
releases/gcc-13
releases/gcc-14
releases/gcc-2.95
releases/gcc-2.95.2.1-branch
releases/gcc-3.0
releases/gcc-3.1
releases/gcc-3.2
releases/gcc-3.3
releases/gcc-3.4
releases/gcc-4.0
releases/gcc-4.1
releases/gcc-4.2
releases/gcc-4.3
releases/gcc-4.4
releases/gcc-4.5
releases/gcc-4.6
releases/gcc-4.7
releases/gcc-4.8
releases/gcc-4.9
releases/gcc-5
releases/gcc-6
releases/gcc-7
releases/gcc-8
releases/gcc-9
releases/libgcj-2.95
trunk
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
gcc
/
config
/
rs6000
/
vsx.md
Age
Commit message (
Expand
)
Author
Files
Lines
6 days
rs6000: Remove "+" constraint modifier from *vsx_le_perm_store_* insns
Kewen Lin
1
-5
/
+5
6 days
rs6000: Fix vsx_le_perm_store_* splitters for !reload_completed
Kewen Lin
1
-11
/
+10
12 days
rs6000: Add TARGET_FLOAT128_HW guard for quad-precision insns
Haochen Gui
1
-10
/
+13
12 days
rs6000: Implement optab_isnormal for SFDF and IEEE128
Haochen Gui
1
-0
/
+18
12 days
rs6000: Implement optab_isfinite for SFDF and IEEE128
Haochen Gui
1
-0
/
+15
12 days
rs6000: Implement optab_isinf for SFDF and IEEE128
Haochen Gui
1
-40
/
+18
2024-07-09
rs6000, remove duplicated built-ins of vecmergl and vec_mergeh
Carl Love
1
-45
/
+0
2024-07-09
rs6000, extend the current vec_{un,}signed{e,o} built-ins
Carl Love
1
-0
/
+84
2024-07-08
rs6000: load high and low part of 128bit vector independently [PR110040]
Jeevitha
1
-0
/
+17
2024-06-24
rs6000: Eliminate unnecessary byte swaps for duplicated constant vector store
Haochen Gui
1
-0
/
+25
2024-06-20
rs6000: Fix wrong RTL patterns for vector merge high/low word on LE
Kewen Lin
1
-12
/
+16
2024-03-07
rs6000: Don't ICE when compiling the __builtin_vsx_splat_2di [PR113950]
Jeevitha
1
-2
/
+2
2024-01-09
rs6000: Eliminate zext fed by vclzlsbb [PR111480]
Kewen Lin
1
-23
/
+18
2024-01-03
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2023-11-17
rs6000: Fix regression cases caused 16-byte by pieces move
Haochen Gui
1
-0
/
+21
2023-10-02
Replace UNSPEC_COPYSIGN with copysign RTL
Michael Meissner
1
-4
/
+3
2023-09-17
rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index
Ajit Kumar Agarwal
1
-3
/
+14
2023-08-16
rs6000: Skip unnecessary vector extract for certain elements.
Haochen Gui
1
-1
/
+15
2023-08-16
rs6000: Generate mfvsrwz for all platforms and remove redundant zero extend
Haochen Gui
1
-34
/
+78
2023-07-26
rs6000, fix vec_replace_unaligned built-in arguments
Carl Love
1
-15
/
+19
2023-07-26
rs6000: Correct vsx operands output for xxeval [PR110741]
Kewen Lin
1
-1
/
+1
2023-06-28
rs6000: Splat vector small V2DI constants with vspltisw and vupkhsw
Haochen Gui
1
-0
/
+24
2023-06-20
rs6000: Add builtins for IEEE 128-bit floating point values
Carl Love
1
-9
/
+16
2023-05-12
rs6000: Change mode and insn condition for scalar insert exp instruction
Haochen Gui
1
-6
/
+6
2023-05-12
rs6000: Change mode and insn condition for scalar extract sig instruction
Haochen Gui
1
-1
/
+1
2023-05-12
rs6000: Change mode and insn condition for scalar extract exp instruction
Haochen Gui
1
-4
/
+4
2023-04-11
rs6000: correct vector sign extend builtins on Big Endian
Haochen Gui
1
-77
/
+5
2023-04-09
Do not generate vmaddfp and vnmsubfp
Michael Meissner
1
-17
/
+17
2023-01-16
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2022-12-01
rs6000: Generates permute index directly for little endian targets (PR100866)
Haochen Gui
1
-2
/
+2
2022-11-02
rs6000: Byte reverse V8HI on Power8 by vector rotation.
Xionghu Luo
1
-6
/
+15
2022-10-05
rs6000: Rework vsx_extract_<mode>
Segher Boessenkool
1
-43
/
+37
2022-10-05
rs6000: Remove "wD" from *vsx_extract_<mode>_store
Segher Boessenkool
1
-2
/
+3
2022-06-14
rs6000: Delete VS_scalar
Segher Boessenkool
1
-75
/
+66
2022-03-29
Allow vsx_extract_<mode> to use Altivec registers.
Michael Meissner
1
-6
/
+3
2022-03-11
Fix DImode to TImode sign extend issue
Michael Meissner
1
-1
/
+1
2022-03-05
Optimize signed DImode -> TImode on power10.
Michael Meissner
1
-22
/
+61
2022-02-09
rs6000: Correct function prototypes for vec_replace_unaligned
Bill Schmidt
1
-15
/
+10
2022-02-08
rs6000: Add support for vmsumcud and vec_msumc
Bill Schmidt
1
-0
/
+13
2022-01-21
Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136
Michael Meissner
1
-1
/
+11
2022-01-16
rs6000: Use known constant for GET_MODE_NUNITS and similar
Kewen Lin
1
-4
/
+12
2022-01-17
rs6000: Split pattern for TI to V1TI move [PR103124]
Haochen Gui
1
-0
/
+16
2022-01-13
vect: Add bias parameter for partial vectorization
Robin Dapp
1
-1
/
+3
2022-01-03
Update copyright years.
Jakub Jelinek
1
-1
/
+1
2021-12-15
Generate XXSPLTIW on power10.
Michael Meissner
1
-14
/
+14
2021-12-15
Add LXVKQ support.
Michael Meissner
1
-0
/
+14
2021-11-08
powerpc: Fix vsx_splat_v4si_di breakage on Power8.
David Edelsohn
1
-1
/
+1
2021-11-06
powerpc: Fix vsx_splat_v4si in 32 bit mode
David Edelsohn
1
-2
/
+2
2021-10-27
rs6000: Fold xxsel to vsel since they have same semantics
Xionghu Luo
1
-57
/
+0
2021-10-27
rs6000: Fix wrong code generation for vec_sel [PR94613]
Xionghu Luo
1
-14
/
+46
[next]