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path: root/gcc/config/rs6000/rs6000-cpus.def
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2024-07-22Add -mcpu=power11 support.Michael Meissner1-0/+5
2024-04-12rs6000: Add OPTION_MASK_POWER8 [PR101865]Will Schmidt1-0/+2
2024-04-09rs6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865]Peter Bergner1-3/+0
2024-02-21rs6000: Neuter option -mpower{8,9}-vector [PR109987]Kewen Lin1-13/+7
2024-01-03Update copyright years.Jakub Jelinek1-1/+1
2023-01-16Update copyright years.Jakub Jelinek1-1/+1
2023-01-11rs6000: Make P10_FUSION honour tuning settingKewen Lin1-2/+1
2022-06-24[PATCH,RS6000 5/5] Replace MASK_<xxxx> usage with OPTION_MASK_<xxxx>Will Schmidt1-54/+55
2022-06-24[PATCH,RS6000 4/5] Replace MASK_<xxxx> with OPTION_MASK_<xxxx>Will Schmidt1-34/+42
2022-02-18Mark Power10 fusion option undocumented and remove sub-options.Pat Haugen1-13/+1
2022-01-17Change references of .c files to .cc filesMartin Liska1-1/+1
2022-01-03Update copyright years.Jakub Jelinek1-1/+1
2021-08-30Enable store fusion on Power10.Pat Haugen1-1/+3
2021-06-23Do not enable pcrel-opt by defaultAaron Sawdey1-1/+3
2021-05-24Fusion patterns for add-logical/logical-addAaron Sawdey1-0/+4
2021-05-21combine patterns for add-add fusionAaron Sawdey1-1/+3
2021-02-25Optimize pcrel access of globalsAaron Sawdey1-0/+2
2021-01-30Fusion patterns for logical-logicalAaron Sawdey1-1/+3
2021-01-27Combine patterns for p10 load-cmpi fusionAaron Sawdey1-1/+5
2021-01-04Update copyright years.Jakub Jelinek1-1/+1
2020-12-02rs6000: Disable HTM for Power10 and later by defaultKewen Lin1-4/+6
2020-06-22rs6000: Rename future to power10Segher Boessenkool1-9/+7
2020-06-21rs6000: Add base support and types for defining MMA built-ins.Peter Bergner1-1/+3
2020-04-25Turn on -mpcrel by default for -mcpu=futureMichael Meissner1-6/+5
2020-03-04rs6000: Fix -mpower9-vector -mno-altivec ICE (PR87560)Bill Schmidt1-0/+4
2020-02-11Rename -mprefixed-addr to be -mprefixed, and document it.Michael Meissner1-3/+3
2020-01-01Update copyright years.Jakub Jelinek1-1/+1
2019-06-11Do not enable -mpcrel by default at the current timeMichael Meissner1-2/+2
2019-06-04rs6000: Delete -mmfpgprSegher Boessenkool1-6/+4
2019-05-30rs6000-cpus.def (OTHER_FUSION_MASKS): New #define.Bill Schmidt1-10/+17
2019-05-29rs6000-cpus.def (OTHER_FUTURES_MASK): New #define.Bill Schmidt1-0/+3
2019-05-23rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PCREL.Bill Schmidt1-1/+3
2019-05-23Add infrastructure to support -mcpu=future to represent a futureBill Schmidt1-0/+7
2019-01-01Update copyright years.Jakub Jelinek1-1/+1
2018-11-16constraints.md (wF constraint): Remove power9 fusion documentation.Michael Meissner1-4/+3
2018-07-27constraints.md (wG constraint): Delete, no longer used.Michael Meissner1-1/+0
2018-01-12rs6000: Remove -mstringSegher Boessenkool1-1/+1
2018-01-03Update copyright years.Jakub Jelinek1-1/+1
2017-09-06rs6000-cpus.def (OTHER_VSX_VECTOR_MASKS): Delete OPTION_MASK_FLOAT128_KEYWORD.Michael Meissner1-2/+0
2017-08-24rs6000.opt (-mpower9-dform-scalar): Delete undocumented switches.Michael Meissner1-6/+0
2017-08-17altivec.md (VParity): Remove TARGET_VSX_TIMODE.Peter Bergner1-6/+2
2017-07-27rs6000.opt (mlra): Replace with stub.Peter Bergner1-1/+0
2017-07-26rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete -mvsx-small-integer option.Michael Meissner1-6/+2
2017-07-24rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Delete upper-regs options.Michael Meissner1-20/+4
2017-04-14re PR target/80098 (ICE in curr_insn_transform, at lra-constraints.c:3816 on ...Michael Meissner1-0/+24
2017-01-19rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Enable -mpower9-minmax by default for...Michael Meissner1-2/+3
2017-01-01Update copyright years.Jakub Jelinek1-1/+1
2016-10-27constraints.md (wH constraint): Add new constraints for allowing 32-bit integ...Michael Meissner1-1/+3
2016-10-07rs6000-c.c (rs6000_cpu_cpp_builtins): Split -mfloat128 into -mfloat128-type t...Michael Meissner1-1/+3
2016-07-08re PR target/71806 (PowerPC -mcpu=power9 enables __float128 without an explic...Michael Meissner1-2/+12
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