riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-11-29	RISC-V: Support highpart register overlap for vwcvt	Juzhe-Zhong	3	-9/+57
2023-11-29	RISC-V: Add explicit braces to eliminate warning.	xuli	1	-4/+6
2023-11-29	RISC-V: Bugfix for ICE in block move when zve32f	Pan Li	1	-0/+1
2023-11-28	RISC-V: Disallow poly (1,1) VLA SLP interleave vectorization	Juzhe-Zhong	1	-0/+9
2023-11-28	RISC-V: Fix VSETVL PASS regression	Juzhe-Zhong	1	-9/+20
2023-11-27	RISC-V: Remove incorrect function gate gather_scatter_valid_offset_mode_p	Juzhe-Zhong	5	-49/+44
2023-11-27	RISC-V: Initial RV64E and LP64E support	Tsukasa OI	7	-13/+33
2023-11-26	RISC-V: Disable AVL propagation of slidedown instructions	Juzhe-Zhong	1	-6/+20
2023-11-26	RISC-V: Fix typo	Juzhe-Zhong	1	-2/+2
2023-11-24	RISC-V: Fix inconsistency among all vectorization hooks	Juzhe-Zhong	1	-14/+5
2023-11-24	RISC-V: Optimize a special case of VLA SLP	Juzhe-Zhong	1	-0/+38
2023-11-24	RISC-V: Disable BSWAP optimization for NUNITS < 4	Juzhe-Zhong	1	-0/+5
2023-11-23	RISC-V: Add wrapper for emit vec_extract[NFC]	Juzhe-Zhong	3	-11/+24
2023-11-23	RISC-V: Disable AVL propagation of vrgather instruction	Juzhe-Zhong	1	-1/+12
2023-11-23	RISC-V: Refine some codes of riscv-v.cc[NFC]	Juzhe-Zhong	1	-36/+18
2023-11-22	RISC-V: Fix incorrect use of vcompress in permutation auto-vectorization	Juzhe-Zhong	1	-7/+8
2023-11-22	RISC-V: Fix permutation indice mode bug	Juzhe-Zhong	2	-15/+30
2023-11-22	RISC-V: Remove duplicate `order_operator' predicate	Maciej W. Rozycki	3	-7/+4
2023-11-22	RISC-V: Handle FP NE operator via inversion in cond-operation expansion	Maciej W. Rozycki	3	-10/+18
2023-11-22	RISC-V: Avoid extraneous integer comparison for FP comparisons	Maciej W. Rozycki	1	-8/+21
2023-11-22	RISC-V: Provide FP conditional-branch instructions for if-conversion	Maciej W. Rozycki	3	-16/+98
2023-11-22	RISC-V: Also allow FP conditions in `riscv_expand_conditional_move'	Maciej W. Rozycki	1	-4/+4
2023-11-22	RISC-V: Only use SUBREG if applicable in `riscv_expand_float_scc'	Maciej W. Rozycki	1	-1/+3
2023-11-22	RISC-V: Add `addMODEcc' implementation for generic targets	Maciej W. Rozycki	1	-0/+41
2023-11-22	RISC-V: Add `movMODEcc' implementation for generic targets	Maciej W. Rozycki	4	-10/+48
2023-11-22	RISC-V: Implement `riscv_emit_unary' helper	Maciej W. Rozycki	2	-0/+9
2023-11-22	RISC-V: Fold all the cond-move variants together	Maciej W. Rozycki	1	-34/+26
2023-11-22	RISC-V: Also accept constants for T-Head cond-move data input operands	Maciej W. Rozycki	1	-2/+2
2023-11-22	RISC-V: Also accept constants for T-Head cond-move comparison operands	Maciej W. Rozycki	1	-2/+2
2023-11-22	RISC-V: Avoid extraneous EQ or NE operation in cond-move expansion	Maciej W. Rozycki	1	-3/+3
2023-11-22	RISC-V: Also invert the cond-move condition for GEU and LEU	Maciej W. Rozycki	1	-1/+1
2023-11-22	RISC-V: Rework branch costing model for if-conversion	Maciej W. Rozycki	1	-0/+120
2023-11-22	RISC-V: Simplify EQ vs NE selection in `riscv_expand_conditional_move'	Maciej W. Rozycki	1	-8/+4
2023-11-22	RISC-V: Use `nullptr' in `riscv_expand_conditional_move'	Maciej W. Rozycki	1	-1/+1
2023-11-22	RISC-V: Avoid repeated GET_MODE calls in `riscv_expand_conditional_move'	Maciej W. Rozycki	1	-4/+7
2023-11-22	RISC-V: Fix `mode' usage in `riscv_expand_conditional_move'	Maciej W. Rozycki	1	-2/+2
2023-11-22	RISC-V: Sanitise NEED_EQ_NE_P case with `riscv_emit_int_compare'	Maciej W. Rozycki	1	-0/+1
2023-11-22	RISC-V: Reorder comment on SFB patterns	Maciej W. Rozycki	1	-2/+2
2023-11-21	RISC-V: Disallow COSNT_VECTOR for DI on RV32	Juzhe-Zhong	1	-0/+8
2023-11-20	RISC-V: Fix intermediate mode on slide1 instruction for SEW64 on RV32	Juzhe-Zhong	2	-29/+4
2023-11-20	RISC-V: Disallow 64-bit indexed loads and stores for rv32gcv.	Robin Dapp	3	-44/+176
2023-11-20	RISC-V: Implement -mmemcpy-strategy= options[PR112537]	xuli	3	-1/+38
2023-11-20	RISC-V: Optimize constant AVL for LRA pattern	Juzhe-Zhong	1	-3/+17
2023-11-19	[committed] RISC-V: Infrastructure for instruction fusion	Philipp Tomsich	3	-35/+314
2023-11-19	[committed] Fix missing mode on a few unspec/unspec_volatile operands	Jeff Law	1	-2/+2
2023-11-19	RISC-V: Fix bug of tuple move splitter	Juzhe-Zhong	1	-0/+4
2023-11-18	RISC-V: Fix mismatched new delete for unique_ptr	Kito Cheng	1	-3/+3
2023-11-18	RISC-V: Refactor RVV iterators[NFC]	Juzhe-Zhong	1	-507/+94
2023-11-16	RISC-V: Change unaligned fast/slow/avoid macros to misaligned [PR111557]	Edwin Lu	1	-3/+3
2023-11-16	RISC-V: Implement target attribute	Kito Cheng	6	-44/+581