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2020-03-04PR target/93995 ICE in patch_jump_insn, at cfgrtl.c:1290 on riscv64-linux-gnuKito Cheng1-3/+4
2020-02-24RISC-V: Adjust floating point code gen for LTGT compareKito Cheng1-3/+14
2020-02-19RISC-V: Using fmv.x.w/fmv.w.x rather than fmv.x.s/fmv.s.xKito Cheng1-2/+2
2020-02-08RISC-V: Improve caller-save code generation.Jim Wilson1-0/+7
2020-01-21RISC-V: Fix rtl checking enabled failure with -msave-restore.Jim Wilson1-1/+1
2020-01-21riscv: Fix up riscv_rtx_costs for RTL checking (PR target/93333)Jakub Jelinek1-1/+4
2020-01-21RISC-V: Disallow regrenme if the TO register never used before for interrupt ...Kito Cheng3-0/+17
2020-01-09re PR inline-asm/93202 ([RISCV] ICE when using inline asm 'h' operand modifier)Jakub Jelinek1-1/+2
2020-01-08RISC-V: Disable use of TLS copy relocs.Jim Wilson1-0/+3
2020-01-01Update copyright years.Jakub Jelinek23-23/+23
2019-11-19Initialize a variable due to -Wmaybe-uninitialized.Martin Liska1-1/+1
2019-10-28gcc/riscv: Add a mechanism to remove some calls to _riscv_save_0Andrew Burgess4-0/+491
2019-10-16RISC-V: Include more registers in SIBCALL_REGS.Andrew Burgess2-4/+4
2019-09-18RISC-V: Fix more splitters accidentally calling gen_reg_rtx.Jim Wilson3-23/+33
2019-09-10Add call_used_or_fixed_reg_pRichard Sandiford1-5/+6
2019-09-06RISC-V: Re-enable -msave-restore for shared libraries.Jim Wilson1-10/+0
2019-09-05RISC-V: Fix bad insn splits with paradoxical subregs.Jakub Jelinek1-9/+21
2019-08-30RISC-V: Disable -msave-restore for shared libraries.Jim Wilson1-0/+10
2019-08-20Use function_arg_info for TARGET_FUNCTION_ARG_ADVANCERichard Sandiford1-5/+4
2019-08-20Use function_arg_info for TARGET_FUNCTION_(INCOMING_)ARGRichard Sandiford1-4/+3
2019-08-20Use function_arg_info for TARGET_SETUP_INCOMING_ARGSRichard Sandiford1-4/+5
2019-08-20Use function_arg_info for TARGET_PASS_BY_REFERENCERichard Sandiford1-5/+5
2019-08-20Use function_arg_info for TARGET_ARG_PARTIAL_BYTESRichard Sandiford1-2/+3
2019-08-13Use checking forms of DECL_FUNCTION_CODE (PR 91421)Richard Sandiford1-1/+1
2019-08-08RISC-V: Fix C ABI for flattened struct with 0-length bitfield.Jim Wilson1-16/+76
2019-08-07RISC-V: Handle g extension in multilib-generatorKito Cheng1-3/+3
2019-08-06RISC-V: Handle extensions combination correctly in multilib-generator.Kito Cheng1-0/+37
2019-08-05RISC-V: Promote type correctly for libcallsKito Cheng1-1/+27
2019-07-22RISC-V: Add -malign-data= option.Ilia Diachkov4-7/+32
2019-07-08RISC-V: Fix splitter for 32-bit AND on 64-bit target.Jim Wilson1-2/+3
2019-07-08[riscv] Fix ambiguous .md attribute usesRichard Sandiford2-5/+5
2019-06-27builtins.c (get_memory_rtx): Fix comment.Aaron Sawdey3-6/+6
2019-06-06RISC-V: Move STARTFILE_PREFIX_SPEC into target OS files.Jim Wilson3-6/+12
2019-05-16gcc: move assemble_start_function / assemble_end_function to output_mi_thunkMax Filippov1-0/+3
2019-04-30RISC-V: Short-forward-branch opt for SiFive 7 series cores.Andrew Waterman7-18/+84
2019-04-26RISC-V: Promode modes of constant loads for store insns.Jim Wilson3-9/+38
2019-04-09re PR translation/90011 (trailing space in diagnostic)Jakub Jelinek1-1/+1
2019-04-09re PR target/90015 (riscv: typo "intterupt" in diagnostic)Jakub Jelinek1-2/+2
2019-03-26RISC-V: Add sifive-7 pipeline description.Andrew Waterman6-20/+294
2019-03-19RISC-V: Fix %lo overflow with BLKmode references.Jim Wilson1-6/+37
2019-03-18gcc/riscv: Correctly ignore empty C++ structs when flattening for ABIAndrew Burgess1-3/+5
2019-03-11Wrap option names in gcc internal messages with %< and %>.Martin Liska1-7/+7
2019-03-01RISC-V: Generalize -march support, add ELF attribute support.Kito Cheng3-0/+36
2019-01-01Update copyright years.Jakub Jelinek23-23/+23
2018-11-27riscv (riscv_block_mvoe_straight): Use RETURN_BEGIN in call to move_by_pieces.Jeff Law1-1/+1
2018-11-17RISC-V: Fix epilogue unwind info with fp and single sp adjust.Jim Wilson1-1/+22
2018-10-28Add D front-end, libphobos library, and D2 testsuite.Iain Buclaw4-0/+50
2018-10-05RISC-V: Fix -fsignaling-nans for glibc testsuite.Andrew Waterman1-6/+28
2018-10-03RISC-V: Add macro for ilp32e ABI. Cleanup white space.Jim Wilson1-12/+15
2018-09-26RISC-V: Add missing negate patterns.Jim Wilson1-3/+38