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riscv
Age
Commit message (
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Author
Files
Lines
2024-11-19
[RISC-V][PR target/117649] Fix branch on masked values splitter
Jeff Law
1
-1
/
+1
2024-11-19
RISC-V: Tie MUL and DIV masks to the M extension
Dimitar Dimitrov
1
-1
/
+5
2024-11-19
RISC-V: Load VLS perm indices directly from memory.
Robin Dapp
1
-2
/
+20
2024-11-18
[committed][RISC-V][PR target/117595] Fix bogus use of simplify_gen_subreg
Jeff Law
2
-2
/
+2
2024-11-18
RISC-V: Add VLS modes to strided loads.
Robin Dapp
3
-13
/
+256
2024-11-18
RISC-V: Add else operand to masked loads [PR115336].
Robin Dapp
3
-30
/
+53
2024-11-14
[RISC-V][V2] Fix type on vector move patterns
Jeff Law
1
-2
/
+8
2024-11-13
[PATCH] RISC-V: Bugfix for unrecognizable insn for XTheadVector
Jin Ma
1
-2
/
+2
2024-11-13
RISC-V: Implement TARGET_GENERATE_VERSION_DISPATCHER_BODY and TARGET_GET_FUNC...
Yangyu Chen
1
-0
/
+587
2024-11-13
RISC-V: Implement TARGET_MANGLE_DECL_ASSEMBLER_NAME
Yangyu Chen
1
-0
/
+39
2024-11-13
RISC-V: Implement TARGET_COMPARE_VERSION_PRIORITY and TARGET_OPTION_FUNCTION_...
Yangyu Chen
1
-0
/
+127
2024-11-13
RISC-V: Implement TARGET_OPTION_VALID_VERSION_ATTRIBUTE_P
Yangyu Chen
4
-13
/
+115
2024-11-13
RISC-V: Implement riscv_minimal_hwprobe_feature_bits
Yangyu Chen
2
-0
/
+49
2024-11-13
RISC-V: Implement Priority syntax parser for Function Multi-Versioning
Yangyu Chen
2
-0
/
+27
2024-11-13
Introduce TARGET_CLONES_ATTR_SEPARATOR for RISC-V
Yangyu Chen
1
-0
/
+5
2024-11-13
RISC-V: Bugfix for max_sew_overlap_and_next_ratio_valid_for_prev_sew_p[pr117483]
xuli
1
-2
/
+9
2024-11-12
[RISC-V] Fix costing of LO_SUM expressions
Xianmiao Qu
1
-1
/
+2
2024-11-12
RISC-V: Add norelax function attribute
yulong
1
-16
/
+28
2024-11-12
[RISC-V] Drop undesirable two instruction macc alternatives
Jeff Law
1
-170
/
+140
2024-11-11
RISC-V: Fix one nit indent issue of ustrunc pattern [NFC]
Pan Li
1
-1
/
+1
2024-11-04
[PATCH v2 2/2] RISC-V: Disable by pieces for vector setmem length > UNITS_PER...
Craig Blackmore
1
-0
/
+19
2024-11-04
[PATCH v2 1/2] RISC-V: Make vectorized memset handle more cases
Craig Blackmore
1
-18
/
+19
2024-10-31
RISC-V: fix const interleaved stepped vector with a scalar pattern
Vineet Gupta
1
-3
/
+3
2024-10-31
RISC-V: Do not inline when callee is versioned but caller is not
Yangyu Chen
1
-0
/
+4
2024-10-31
RISC-V: Split riscv_process_target_attr with const char *args argument
Yangyu Chen
2
-28
/
+39
2024-10-31
RISC-V: allow -fno-plt to disable PLT
Yangyu Chen
2
-3
/
+3
2024-10-30
[RISC-V] Aggressively hoist VXRM assignments
Jeff Law
1
-0
/
+69
2024-10-29
[PATCH 1/2] RISC-V:Add intrinsic support for the CMOs extensions
yulong
1
-0
/
+84
2024-10-29
RISC-V: Implement the MASK_LEN_STRIDED_LOAD{STORE}
Pan Li
3
-0
/
+83
2024-10-28
[target/117316] Fix initializer for riscv code alignment handling
Jeff Law
1
-3
/
+27
2024-10-28
RISC-V:Bugfix for vlmul_ext and vlmul_trunc with NULL return value[pr117286]
xuli
1
-0
/
+4
2024-10-25
gcc: Remove trailing whitespace
Jakub Jelinek
2
-2
/
+2
2024-10-24
Use unique_ptr in more places in pretty_printer/diagnostics [PR116613]
David Malcolm
3
-0
/
+3
2024-10-23
[PATCH] RISC-V: override alignment of function/jump/loop
Wang Pengcheng
1
-0
/
+15
2024-10-21
RISC-V: Implement vector SAT_TRUNC for signed integer
Pan Li
3
-0
/
+84
2024-10-20
Revert "[PATCH 7/7] RISC-V: Disable by pieces for vector setmem length > UNIT...
Jeff Law
1
-19
/
+0
2024-10-19
[PATCH][v5] RISC-V: add option -m(no-)autovec-segment
Greg McGary
3
-2
/
+11
2024-10-19
[PATCH 7/7] RISC-V: Disable by pieces for vector setmem length > UNITS_PER_WORD
Craig Blackmore
1
-0
/
+19
2024-10-19
[PATCH 5/7] RISC-V: Move vector memcpy decision making to separate function [...
Craig Blackmore
1
-56
/
+87
2024-10-19
[PATCH 4/7] RISC-V: Honour -mrvv-max-lmul in riscv_vector::expand_block_move
Craig Blackmore
4
-38
/
+54
2024-10-18
[PATCH 3/7] RISC-V: Fix vector memcpy smaller LMUL generation
Craig Blackmore
1
-3
/
+5
2024-10-18
[PATCH 2/7] RISC-V: Fix uninitialized reg in memcpy
Craig Blackmore
1
-2
/
+1
2024-10-18
[PATCH 1/7] RISC-V: Fix indentation in riscv_vector::expand_block_move [NFC]
Craig Blackmore
1
-16
/
+16
2024-10-16
Ternary operator formatting fixes
Jakub Jelinek
2
-4
/
+4
2024-10-16
RISC-V: Use biggest_mode as mode for constants.
Robin Dapp
1
-4
/
+10
2024-10-12
[RISC-V] Avoid unnecessary extensions when value is already extended
Jivan Hakobyan
1
-2
/
+18
2024-10-12
RISC-V] Slightly improve broadcasting small constants into vectors
Jeff Law
2
-6
/
+21
2024-10-12
RISC-V: Implement vector SAT_SUB for signed integer
Pan Li
3
-0
/
+21
2024-10-10
RISC-V:Bugfix for C++ code compilation failure with rv32imafc_zve32f[pr116883]
Li Xu
1
-1
/
+6
2024-10-09
RISC-V: Optimize branches with shifted immediate operands
Jovan Vukic
3
-0
/
+48
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