riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-12-23	RISC-V: Support vle.v/vse.v intrinsics	Ju-Zhe Zhong	1	-1/+1
2022-12-19	RISC-V: Support VSETVL PASS for RVV support	Ju-Zhe Zhong	1	-0/+8
2022-10-26	RISC-V: Support load/store in mov<mode> pattern for RVV modes.	Ju-Zhe Zhong	1	-0/+4
2022-10-21	RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.	Ju-Zhe Zhong	1	-1/+27
2022-10-17	RISC-V: Fix format[NFC]	Ju-Zhe Zhong	1	-1/+1
2022-10-05	RISC-V: Introduce RVV header to enable builtin types	Ju-Zhe Zhong	1	-1/+1
2022-09-29	RISC-V: Add ABI-defined RVV types.	Ju-Zhe Zhong	1	-0/+10
2022-09-23	RISC-V: Support poly move manipulation and selftests.	zhongjuzhe	1	-0/+4
2022-02-08	RISC-V: Add target machine headers as a dependency for riscv-sr.o	Maciej W. Rozycki	1	-1/+1
2022-01-17	Change references of .c files to .cc files	Martin Liska	1	-8/+8
2021-01-08	RISC-V: Move class riscv_subset_list and riscv_subset_t to riscv-protos.h	Kito Cheng	1	-1/+3
2020-10-15	RISC-V: Add support for -mcpu option.	Kito Cheng	1	-0/+2
2020-05-12	RISC-V: Add shorten_memrefs pass.	Craig Blackmore	1	-0/+5
2019-10-28	gcc/riscv: Add a mechanism to remove some calls to _riscv_save_0	Andrew Burgess	1	-0/+5
2018-10-28	Add D front-end, libphobos library, and D2 testsuite.	Iain Buclaw	1	-0/+5
2017-02-06	RISC-V Port: gcc	Palmer Dabbelt	1	-0/+11