riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-11-18	RISC-V: Add else operand to masked loads [PR115336].	Robin Dapp	1	-0/+3
2024-10-31	RISC-V: allow -fno-plt to disable PLT	Yangyu Chen	1	-1/+1
2024-06-22	[PATCH v2] RISC-V: Remove integer vector eqne pattern	demin.han	1	-2/+2
2024-05-24	[to-be-committed,v2,RISC-V] Use bclri in constant synthesis	Jeff Law	1	-6/+8
2024-05-14	RISC-V: avoid LUI based const materialization ... [part of PR/106265]	Vineet Gupta	1	-0/+6
2024-05-02	[RFA][RISC-V] Improve constant synthesis for constants with 2 bits set	Jeff Law	1	-0/+8
2024-03-18	[PATCH v5 1/1] RISC-V: Add support for XCVbi extension in CV32E40P	Mary Bennett	1	-0/+4
2024-01-25	RISC-V: Add support for XCVsimd extension in CV32E40P	Mary Bennett	1	-0/+20
2024-01-18	RISC-V: Handle differences between XTheadvector and Vector	Jun Sha (Joshua)	1	-1/+3
2024-01-03	Update copyright years.	Jakub Jelinek	1	-1/+1
2023-12-20	RISC-V: Support -mcmodel=large.	Kuan-Lin Chen	1	-4/+19
2023-12-15	Re: [PATCH] RISC-V: fix scalar crypto patterns	Jeff Law	1	-0/+8
2023-11-27	RISC-V: Remove incorrect function gate gather_scatter_valid_offset_mode_p	Juzhe-Zhong	1	-4/+4
2023-11-22	RISC-V: Remove duplicate `order_operator' predicate	Maciej W. Rozycki	1	-3/+0
2023-11-22	RISC-V: Provide FP conditional-branch instructions for if-conversion	Maciej W. Rozycki	1	-0/+3
2023-11-22	RISC-V: Add `movMODEcc' implementation for generic targets	Maciej W. Rozycki	1	-0/+6
2023-11-06	RISC-V: Early expand DImode vec_duplicate in RV32 system	Juzhe-Zhong	1	-8/+1
2023-10-11	[PATCH v4 2/2] RISC-V: Add support for XCValu extension in CV32E40P	Mary Bennett	1	-0/+5
2023-09-21	RISC-V: Enable undefined support for RVV auto-vectorization[PR110751]	Juzhe-Zhong	1	-0/+4
2023-09-21	RISC-V: Optimized for strided load/store with stride == element width[PR111450]	xuli	1	-0/+18
2023-09-21	RISC-V: Rename predicate vector_gs_scale_operand_16/32 to more generic names	Lehua Ding	1	-8/+8
2023-09-15	fix PR 111259 invalid zcmp mov predicate.	Fei Gao	1	-3/+3
2023-08-31	RISC-V: Add vector_scalar_shift_operand	Palmer Dabbelt	1	-0/+5
2023-08-30	RISC-V: support cm.mva01s cm.mvsa01 in zcmp	Die Li	1	-0/+11
2023-08-30	RISC-V: support cm.push cm.pop cm.popret in zcmp	Fei Gao	1	-0/+96
2023-08-29	RISC-V: Fix error combine of pred_mov pattern	Lehua Ding	1	-0/+5
2023-08-18	RISC-V: Revert the convert from vmv.s.x to vmv.v.i	Lehua Ding	1	-0/+4
2023-08-15	RISC-V: Fix autovec_length_operand predicate[PR110989]	Juzhe-Zhong	1	-4/+1
2023-07-22	RISC-V: optim const DF +0.0 store to mem [PR/110748]	Vineet Gupta	1	-1/+1
2023-07-13	RISC-V: RISC-V: Support gather_load/scatter RVV auto-vectorization	Ju-Zhe Zhong	1	-1/+32
2023-06-25	RISC-V: Enable len_mask{load, store} and remove len_{load, store}	Juzhe-Zhong	1	-0/+7
2023-06-03	RISC-V: Fix warning in predicated.md	Juzhe-Zhong	1	-1/+1
2023-06-02	RISC-V: Fix warning in predicated.md	Juzhe-Zhong	1	-1/+1
2023-06-02	RISC-V: Support RVV permutation auto-vectorization	Juzhe-Zhong	1	-0/+4
2023-05-29	RISC-V: Use extension instructions instead of bitwise "and"	Jivan Hakobyan	1	-0/+6
2023-05-17	RISC-V: Remove masking third operand of rotate instructions	Jivan Hakobyan	1	-4/+6
2023-04-25	avoid splitting small constants in bcrli_nottwobits patterns	Jivan Hakobyan	1	-1/+6
2023-04-11	RISC-V: avoid splitting small constant in <or_optab>i<mode>_extrabit pattern	Lin Sinan	1	-1/+1
2023-03-05	RISC-V: Add RVV misc intrinsic support	Ju-Zhe Zhong	1	-0/+4
2023-03-05	RISC-V: Add scalar move support and fix VSETVL bugs	Ju-Zhe Zhong	1	-4/+16
2023-02-15	RISC-V: Finish all integer C/C++ intrinsics	Ju-Zhe Zhong	1	-2/+1
2023-02-15	RISC-V: Add integer compare C/C++ intrinsic support	Ju-Zhe Zhong	1	-3/+22
2023-02-12	RISC-V: Add vnsrl/vnsra/vncvt/vmerge/vmv C/C++ support	Ju-Zhe Zhong	1	-4/+3
2023-02-10	RISC-V: Add binary vx C/C++ support	Ju-Zhe Zhong	1	-3/+13
2023-02-03	RISC-V: Add RVV shift.vx C/C++ API support	Ju-Zhe Zhong	1	-0/+8
2023-02-01	RISC-V: Add integer binary vv C/C++ API support	Ju-Zhe Zhong	1	-0/+15
2023-01-28	RISC-V: Add vlse/vsse intrinsics support	Ju-Zhe Zhong	1	-0/+4
2023-01-16	Update copyright years.	Jakub Jelinek	1	-1/+1
2022-12-02	RISC-V: Add duplicate vector support.	Ju-Zhe Zhong	1	-0/+5
2022-11-18	RISC-V: Handle "(a & twobits) == singlebit" in branches using Zbs	Philipp Tomsich	1	-0/+5