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path: root/gcc/config/i386/sse.md
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2012-09-14re PR target/54564 (Broken __builtin_ia32_vfmadds[sd]3)Jakub Jelinek1-29/+25
2012-09-05sse.md (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>): Use register_operand ...Uros Bizjak1-12/+12
2012-08-11sse.md (xop integer multiply/add insns): Use register_operand for operand 3 p...Uros Bizjak1-16/+13
2012-08-11i386.md (isa): Add fma and fma4.Uros Bizjak1-138/+60
2012-08-10* config/i386/sse.md (*fma_fmadd_<mode>, *fma_fmsub_<mode>,Uros Bizjak1-172/+168
2012-07-10i386: Rename patterns for vec_widen_<s>mult_even/odd_<mode>Richard Henderson1-12/+6
2012-06-26i386: Implement widen_smul_*_v4si for plain sse2Richard Henderson1-11/+18
2012-06-26i386: Expand mul<VI8_AVX2> earlierRichard Henderson1-81/+3
2012-06-25i386: Delete sse sdot_prod; add sdot_prodv4si for xopRichard Henderson1-54/+8
2012-06-25i386: Add widen_multiply_even/odd builtins and hooksRichard Henderson1-0/+14
2012-06-25i386: Use vpmacsdd for mulv4si3Richard Henderson1-0/+6
2012-06-25i386: Cleanup and unify widening multiply patternsRichard Henderson1-188/+18
2012-06-25re PR target/53759 (gcc -mavx emits vshufps for __builtin_ia32_loadlps)Jakub Jelinek1-1/+1
2012-06-23re PR target/53749 (ice in expand_shift_1)Richard Henderson1-47/+29
2012-06-23i386: Pass ix86_expand_sse_unpack operands by valueRichard Henderson1-4/+4
2012-06-23i386: Extract the guts of mulv16qi3 to ix86_expand_vecop_qihiRichard Henderson1-60/+3
2012-06-19Handle const_vector in mulv4si3 for pre-sse4.1.Richard Henderson1-59/+13
2012-06-18re PR target/53712 (Does not combine unaligned load with _mm_cmpistri, redun...Uros Bizjak1-0/+115
2012-06-17sse.md (vcvtph2ps): Fix vec_select selector.Uros Bizjak1-1/+1
2012-05-14re PR target/46098 (ICE: in extract_insn, at recog.c:2100 with -msse3 -ffloat...Uros Bizjak1-23/+2
2012-05-13* config/i386/sse.md: The other part of my previous commit.Uros Bizjak1-14/+28
2012-05-13sse.md (<sse>_andnot<mode>3): Handle TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.Uros Bizjak1-65/+179
2012-05-11i386.md (*movti_internal_rex64): Avoid MOVAPS size optimization for TARGET_AVX.Uros Bizjak1-0/+3
2012-05-10i386.md (*movoi_internal_avx): Handle TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL a...Uros Bizjak1-29/+32
2012-05-09re PR target/52908 (xop-mul-1:f9 miscompiled on bulldozer (-mxop))Uros Bizjak1-82/+14
2012-05-09re PR target/44141 (Redundant loads and stores generated for AMD bdver1 target)Uros Bizjak1-16/+58
2012-04-14* config/i386/sse.md: Fix whitespace and formatting.Uros Bizjak1-416/+224
2012-04-14sse.md (ssse3_plusminus): New code iterator.Uros Bizjak1-1011/+139
2012-04-12re PR target/52932 (AVX2 intrinsic _mm256_permutevar8x32_ps has wrong paramet...Uros Bizjak1-21/+8
2012-03-29sse.md (avx_h<plusminus_insn>v4df3): Fix results crossing 128bit lane boundary.Uros Bizjak1-5/+5
2012-03-28re PR target/52736 (miscompilation: store to aliased __m128d is 8 Bytes off)Jakub Jelinek1-1/+1
2012-03-20re PR target/52607 (v4df __builtin_shuffle with {0,2,1,3} or {1,3,0,2})Jakub Jelinek1-4/+38
2012-03-18i386.md: Remove empty predicates and/or constraints.Uros Bizjak1-616/+616
2012-03-16re PR target/52568 (suboptimal __builtin_shuffle on cycles with AVX)Jakub Jelinek1-28/+14
2012-03-12Properly set ix86_gen_xxx function pointersH.J. Lu1-2/+2
2012-03-01re PR target/52437 (internal compiler error: in spill_failure, at reload1.c:2...Jakub Jelinek1-5/+5
2012-01-02sse.md (*avx2_gatherdi<mode>_3, [...]): New patterns.Jakub Jelinek1-1/+47
2011-12-15tree-vectorizer.h (struct _stmt_vec_info): Remove pattern_def_stmt field, add...Jakub Jelinek1-9/+9
2011-12-02re PR target/51387 (Test vect.exp/vect-116.c fails on execution when compiled...Jakub Jelinek1-1/+18
2011-11-24Revert revision 181357.H.J. Lu1-20/+0
2011-11-21mmx.md (unspec): Move from config/i386/i386.md (unspecv) <UNSPECV_EMMS, UNSPE...Uros Bizjak1-56/+79
2011-11-20i386.md (UNSPEC_MOVNTI): Remove.Uros Bizjak1-3/+4
2011-11-18Add _mm_stream_si64.H.J. Lu1-5/+5
2011-11-16sse.md (round<mode>2_vec_pack_sfix): Optimize V2DFmode sequence for AVX.Uros Bizjak1-16/+46
2011-11-15sse.md (vec_pack_trunc_v2df): Optimize sequence for AVX.Uros Bizjak1-32/+67
2011-11-14sse.md (round<mode>2): Use register_operand for operand 1 predicate.Uros Bizjak1-4/+4
2011-11-14sse.md (round<mode>2_sfix): New expander.Uros Bizjak1-0/+72
2011-11-14sw-1.c: Force rep;movsb.Zolotukhin Michael1-0/+20
2011-11-08sse.md (*avx_vperm2f128<mode>3_nozero): Emit mask 0x12 and 0x20 as vinsert[fi...Jakub Jelinek1-0/+4
2011-11-07i386.c (ix86_expand_builtin): If gather mask argument is known to have all hi...Jakub Jelinek1-0/+44