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| author | Jakub Jelinek <jakub@redhat.com> | 2011-11-07 17:00:08 +0100 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2011-11-07 17:00:08 +0100 |
| commit | da80a6464e2f41f4e139fcd182fdaa00a024851e (patch) | |
| tree | c76018ce8a3bf4d0b9e9c7b74c7f46fd636d2477 /gcc/config/i386/sse.md | |
| parent | aec7ae7deaef9d52541da07c387066ad6ceb3d87 (diff) | |
| download | gcc-da80a6464e2f41f4e139fcd182fdaa00a024851e.zip gcc-da80a6464e2f41f4e139fcd182fdaa00a024851e.tar.gz gcc-da80a6464e2f41f4e139fcd182fdaa00a024851e.tar.bz2 | |
i386.c (ix86_expand_builtin): If gather mask argument is known to have all high bits set...
* config/i386/i386.c (ix86_expand_builtin): If gather mask
argument is known to have all high bits set, pass pc_rtx as
second argument to the expander instead of op0.
* config/i386/sse.md (*avx2_gathersi<mode>_2,
*avx2_gatherdi<mode>_2): New patterns.
* config/i386/avx2intrin.h (_mm256_i32gather_pd,
_mm256_i64gather_pd, _mm256_i32gather_ps): Set mask using
_mm256_cmp_pd with zero vector arguments and _CMP_EQ_OQ instead of
_mm256_set1_pd.
From-SVN: r181090
Diffstat (limited to 'gcc/config/i386/sse.md')
| -rw-r--r-- | gcc/config/i386/sse.md | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index e3de9ec..688b5be 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -12567,6 +12567,26 @@ (set_attr "prefix" "vex") (set_attr "mode" "<sseinsnmode>")]) +(define_insn "*avx2_gathersi<mode>_2" + [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "=&x") + (unspec:VEC_GATHER_MODE + [(pc) + (match_operator:<ssescalarmode> 6 "vsib_mem_operator" + [(unspec:P + [(match_operand:P 2 "vsib_address_operand" "p") + (match_operand:<VEC_GATHER_IDXSI> 3 "register_operand" "x") + (match_operand:SI 5 "const1248_operand" "n")] + UNSPEC_VSIBADDR)]) + (mem:BLK (scratch)) + (match_operand:VEC_GATHER_MODE 4 "register_operand" "1")] + UNSPEC_GATHER)) + (clobber (match_scratch:VEC_GATHER_MODE 1 "=&x"))] + "TARGET_AVX2" + "v<sseintprefix>gatherd<ssemodesuffix>\t{%1, %6, %0|%0, %6, %1}" + [(set_attr "type" "ssemov") + (set_attr "prefix" "vex") + (set_attr "mode" "<sseinsnmode>")]) + (define_expand "avx2_gatherdi<mode>" [(parallel [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "") (unspec:VEC_GATHER_MODE @@ -12608,3 +12628,27 @@ [(set_attr "type" "ssemov") (set_attr "prefix" "vex") (set_attr "mode" "<sseinsnmode>")]) + +(define_insn "*avx2_gatherdi<mode>_2" + [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "=&x") + (unspec:VEC_GATHER_MODE + [(pc) + (match_operator:<ssescalarmode> 6 "vsib_mem_operator" + [(unspec:P + [(match_operand:P 2 "vsib_address_operand" "p") + (match_operand:<VEC_GATHER_IDXDI> 3 "register_operand" "x") + (match_operand:SI 5 "const1248_operand" "n")] + UNSPEC_VSIBADDR)]) + (mem:BLK (scratch)) + (match_operand:<VEC_GATHER_SRCDI> 4 "register_operand" "1")] + UNSPEC_GATHER)) + (clobber (match_scratch:VEC_GATHER_MODE 1 "=&x"))] + "TARGET_AVX2" +{ + if (<MODE>mode != <VEC_GATHER_SRCDI>mode) + return "v<sseintprefix>gatherq<ssemodesuffix>\t{%4, %6, %x0|%x0, %6, %4}"; + return "v<sseintprefix>gatherq<ssemodesuffix>\t{%4, %6, %0|%0, %6, %4}"; +} + [(set_attr "type" "ssemov") + (set_attr "prefix" "vex") + (set_attr "mode" "<sseinsnmode>")]) |