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2024-07-02Arm: Fix disassembly error in Thumb-1 relaxed load/store [PR115188]Wilco Dijkstra1-0/+5
2024-01-03Update copyright years.Jakub Jelinek1-1/+1
2023-05-18arm: Fix vstrwq* backend + testsuiteAndrea Corallo1-7/+7
2023-05-03arm: [MVE intrinsics] Add new frameworkChristophe Lyon1-0/+4
2023-01-02Update copyright years.Jakub Jelinek1-1/+1
2022-12-30Fix memory constraint on MVE v[ld/st][2/4] instructions [PR107714]Stam Markianos-Wright1-0/+4
2022-01-03Update copyright years.Jakub Jelinek1-1/+1
2021-05-05arm/97903: Missed optimization in lowering test operation.Prathamesh Kulkarni1-0/+4
2021-01-04Update copyright years.Jakub Jelinek1-1/+1
2020-12-22arm&aarch64: subdivide the type attribute "alu_shfit_imm"Qian Jianhua1-0/+2
2020-12-11arm: Auto-vectorization for MVE: vorrChristophe Lyon1-1/+1
2020-12-10arm: Auto-vectorization for MVE: vandChristophe Lyon1-1/+1
2020-09-18[PATCH 2/5][Arm] New pattern for CSINV instructionsSudi Das1-0/+12
2020-06-16[PATCH][GCC] arm: Fix MVE scalar shift intrinsics code-gen.Srinath Parvathaneni1-0/+12
2020-06-08[arm] Fix vfp_operand_register for VFP HI regsChristophe Lyon1-1/+1
2020-06-04[ARM]: Correct the grouping of operands in MVE vector scatter store intrinsic...Srinath Parvathaneni1-0/+6
2020-05-20[ARM]: Fix the wrong code-gen generated by MVE vector load/store intrinsics (...Srinath Parvathaneni1-0/+6
2020-04-08[Arm] Implement CDE intrinsics for MVE registers.Matthew Malcomson1-0/+12
2020-04-08[Arm] Implement scalar Custom Datapath Extension intrinsicsMatthew Malcomson1-0/+12
2020-04-08arm: CDE intrinsics using FPU/MVE S/D registersDennis Zhang1-0/+17
2020-03-18[ARM][GCC][8/5x]: Remaining MVE store intrinsics which stores an half word, w...Srinath Parvathaneni1-0/+8
2020-03-18[ARM][GCC][2/3x]: MVE intrinsics with ternary operands.Srinath Parvathaneni1-0/+8
2020-03-17[ARM][GCC][4/2x]: MVE intrinsics with binary operands.Srinath Parvathaneni1-0/+8
2020-03-17[ARM][GCC][2/2x]: MVE intrinsics with binary operands.Srinath Parvathaneni1-0/+8
2020-03-17[ARM][GCC][1/2x]: MVE intrinsics with binary operands.Srinath Parvathaneni1-0/+4
2020-03-16[ARM][GCC][1/x]: MVE ACLE intrinsics framework patch.Srinath Parvathaneni1-1/+9
2020-01-17[GCC/ARM, 2/2] Add support for ASRL(imm), LSLL(imm) and LSRL(imm) instruction...Mihail Ionescu1-0/+9
2020-01-16[PATCH, GCC/ARM, 5/10] Clear VFP registers with VSCCLRMMihail Ionescu1-1/+7
2020-01-16[PATCH, GCC/ARM, 4/10] Clear GPR with CLRMMihail Ionescu1-0/+6
2020-01-01Update copyright years.Jakub Jelinek1-1/+1
2019-11-14arm: Rename CC_NOOVmode to CC_NZmodeRichard Henderson1-1/+1
2019-11-07[arm][6/X] Add support for __[us]sat16 intrinsicsKyrylo Tkachov1-0/+8
2019-10-22[arm] make arm_carry_operation and arm_borrow_operation dualsRichard Earnshaw1-1/+1
2019-10-18[arm] Early expansion of uaddvdi4.Richard Earnshaw1-1/+1
2019-10-18[arm] early split most DImode comparison operations.Richard Earnshaw1-0/+6
2019-10-18[arm] Introduce arm_carry_operationRichard Earnshaw1-0/+21
2019-10-18[arm] Early split subdi3Richard Earnshaw1-1/+1
2019-09-18[ARM] Add logical DImode expandersWilco Dijkstra1-0/+15
2019-08-28expr.c (expand_assignment): Handle misaligned DECLs.Bernd Edlinger1-0/+4
2019-08-22[ARM] Cleanup logical DImode operationsWilco Dijkstra1-17/+0
2019-07-18[arm] Fix incorrect modes with 'borrow' operationsRichard Earnshaw1-0/+21
2019-01-01Update copyright years.Jakub Jelinek1-1/+1
2018-12-14ARM] Improve robustness of -mslow-flash-dataThomas Preud'homme1-0/+18
2018-11-22PR85434: Prevent spilling of stack protector guard's address on ARMThomas Preud'homme1-0/+17
2018-01-03Update copyright years.Jakub Jelinek1-1/+1
2017-09-06re PR target/77308 (surprisingly large stack usage for sha512 on arm)Bernd Edlinger1-0/+5
2017-07-14[ARM] Rewire -mfpu=fp-armv8 as VFPv5 + D32 + DPThomas Preud'homme1-3/+3
2017-01-01Update copyright years.Jakub Jelinek1-1/+1
2016-10-26Refactor atomic compare_and_swap to make it fit for ARMv8-M BaselineThomas Preud'homme1-0/+6
2016-10-13[ARM] Remove redundant TARGET_VFPRichard Earnshaw1-8/+3
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