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path: root/gcc/config/aarch64/aarch64.md
AgeCommit message (Expand)AuthorFilesLines
2022-04-05aarch64: Stop +mops clobbering variable valuesRichard Sandiford1-14/+39
2022-02-21aarch64: Add compiler support for Shadow Call StackDan Li1-0/+10
2022-02-16aarch64: Extend PR100056 patterns to +Richard Sandiford1-10/+23
2022-02-15aarch64: Fix subs_compare_2.c regression [PR100874]Richard Sandiford1-0/+27
2022-01-03Update copyright years.Jakub Jelinek1-1/+1
2021-12-14aarch64: Add LS64 extension and intrinsicsPrzemyslaw Wirkus1-0/+52
2021-12-13aarch64: Use +mops to inline memset operationsKyrylo Tkachov1-4/+16
2021-12-13aarch64: Add memmove expansion for +mopsKyrylo Tkachov1-0/+47
2021-12-13aarch64: Add support for Armv8.8-a memory operations and memcpy expansionKyrylo Tkachov1-2/+15
2021-11-10aarch64: Tweak FMAX/FMIN iteratorsRichard Sandiford1-1/+1
2021-11-03AArch64: Improve GOT addressingWilco Dijkstra1-33/+15
2021-11-01aarch64: Fix redundant check in aut insn generationDan Li1-2/+1
2021-10-20AArch64: Add support for __builtin_roundeven[f] (PR100966)Wilco Dijkstra1-1/+1
2021-08-09aarch64: Expand %<w> correctly according to mode iteratorBin Cheng1-1/+1
2021-07-28aarch64: Add smov alternative to sign_extend patternKyrylo Tkachov1-4/+6
2021-07-19[AARCH64] Fix PR 101205: csinv does not have an zero_extend versionAndrew Pinski1-3/+3
2021-07-13gcc: Add vec_select -> subreg RTL simplificationJonathan Wright1-5/+6
2021-04-27aarch64: Fix UB in the compiler [PR100200]Jakub Jelinek1-2/+3
2021-04-16aarch64: Fix up 2 other combine opt regressions vs. GCC8 [PR100075]Jakub Jelinek1-0/+28
2021-04-15aarch64: Fix several *<LOGICAL:optab>_ashl<mode>3 related regressions [PR100056]Jakub Jelinek1-0/+53
2021-04-13aarch64: Restore bfxil optimization [PR100028]Jakub Jelinek1-0/+32
2021-04-09aarch64: Use x30 as temporary in SVE TLSDESC patternsRichard Sandiford1-3/+2
2021-03-31aarch64: Fix up *add<mode>3_poly_1 [PR99813]Jakub Jelinek1-2/+2
2021-03-30aarch64: PR target/99822 Don't allow zero register in first operand of SUBS/A...Kyrylo Tkachov1-1/+1
2021-03-30aarch64: Tweak post-RA handling of CONST_INT moves [PR98136]Richard Sandiford1-4/+13
2021-03-30aarch64: Prevent use of SIMD fcvtz[su] instruction variant with "nosimd"Mihailo Stojanovic1-1/+2
2021-02-25aarch64 : Mark rotate immediates with '#' as per DDI0487iFc.Iain Sandoe1-2/+2
2021-02-22aarch64: Add internal tune flag to minimise VL-based scalar opsKyrylo Tkachov1-0/+8
2021-02-01aarch64: Reimplement vrshrn* intrinsics using builtinsKyrylo Tkachov1-0/+1
2021-02-01aarch64: Reimplement vabdl_* intrinsics using builtinsKyrylo Tkachov1-0/+2
2021-01-29aarch64: Re-implement vabal_high* intrinsics using builtinsKyrylo Tkachov1-0/+2
2021-01-27aarch64: Fix up *aarch64_bfxilsi_uxtw [PR98853]Jakub Jelinek1-2/+2
2021-01-04Update copyright years.Jakub Jelinek1-1/+1
2020-12-22arm&aarch64: subdivide the type attribute "alu_shfit_imm"Qian Jianhua1-6/+6
2020-12-09aarch64: Add +pauth to -marchPrzemyslaw Wirkus1-1/+1
2020-11-13aarch64: Add backend support for expanding __builtin_memsetSudakshina Das1-0/+18
2020-11-05Move and adjust PROBE_STACK reg definitions for aarch64Olivier Hainque1-0/+7
2020-09-30aarch64: Tweak movti and movtf patternsRichard Sandiford1-8/+9
2020-09-23aarch64: Prevent canary address being spilled to stackRichard Sandiford1-49/+36
2020-09-07aarch64: Remove redundant mult patternsAlex Coplan1-271/+0
2020-09-07aarch64: Don't emit invalid zero/sign-extend syntaxAlex Coplan1-12/+12
2020-08-05aarch64: Clear canary value after stack_protect_test [PR96191]Richard Sandiford1-19/+15
2020-08-05aarch64: Add missing %z prefixes to LDP/STP patternsRichard Sandiford1-13/+13
2020-08-04aarch64: Add missing clobber for fjcvtzsAndrea Corallo1-1/+2
2020-07-09aarch64: Mitigate SLS for BLR instructionMatthew Malcomson1-6/+5
2020-07-09aarch64: Introduce SLS mitigation for RET and BR instructionsMatthew Malcomson1-18/+58
2020-07-01aarch64: Add 64 bit setter getter fpsr fpcrAndrea Corallo1-25/+9
2020-05-11aarch64: Fix ICE when expanding scalar floating move with -mgeneral-regs-only...Fei Yang1-1/+5
2020-05-11[PATCH] aarch64: prefer using csinv, csneg in zero extend contextsAlex Coplan1-0/+38
2020-05-05aarch64: eliminate redundant zero extend after bitwise negationAlex Coplan1-0/+9
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