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AgeCommit message (Expand)AuthorFilesLines
2017-12-12Enable VAES support [1/5]Julia Koval1-0/+15
2017-12-08[arm] Don't strip off all architecture features from -march passed to assemblerRichard Earnshaw1-12/+87
2017-12-08[arm] Generate a -mfpu= option for passing to the assemblerRichard Earnshaw1-0/+80
2017-12-05Enable VNNI support [1/5]Julia Koval1-0/+17
2017-11-16Set default to -fomit-frame-pointerWilco Dijkstra35-168/+0
2017-11-16Add new options: -mext-perf, -mext-perf2, -mext-string.Chung-Ju Wu1-4/+8
2017-11-16Enable VBMI2 support [1/7]Julia Koval1-0/+17
2017-11-07Fix SSE bits dependencies.Julia Koval1-6/+9
2017-10-21Update x86 backend to enable Intel CET.Igor Tsimbalist1-0/+33
2017-10-20Add GFNI command line options and macrosJulia Koval1-0/+15
2017-10-08arm-common.c (arm_except_unwind_info): Handle DWARF2_UNWIND_INFO.Olivier Hainque1-1/+7
2017-09-22[arm] auto-generate arm-isa.h from CPU descriptionsRichard Earnshaw1-5/+5
2017-09-16Use -fsched-pressure and -fomit-frame-pointerChung-Ju Wu1-4/+6
2017-09-112017-09-11 Vidya Praveen <vidyapraveen@arm.com>Vidya Praveen1-5/+5
2017-09-06[arm] auto-generate arm-isa.h from CPU descriptionsRichard Earnshaw1-5/+5
2017-07-10Better ISR prologues by supporting GASes __gcc_isr pseudo insn.Georg-Johann Lay1-0/+1
2017-07-04[arm] Move some generated files out of the source treeRichard Earnshaw1-1/+1
2017-07-03[arm] Clean up generation of BE8 format images.Richard Earnshaw1-0/+57
2017-06-16[arm] Rewrite t-aprofile using new selector methodologyRichard Earnshaw1-1/+3
2017-06-16[arm] Make 'auto' the default FPU selection option.Richard Earnshaw1-1/+1
2017-06-16[arm] Generate a canonical form for -marchRichard Earnshaw1-0/+354
2017-06-16[arm] Use standard option parsing code for detectingRichard Earnshaw1-19/+47
2017-06-16[arm] Move cpu and architecture option name parsingRichard Earnshaw1-0/+190
2017-06-16[arm] Rewrite -march and -mcpu options for passing toRichard Earnshaw1-1/+44
2017-06-07rs6000: Remove TARGET_SPE and TARGET_SPE_ABI and friendsSegher Boessenkool1-9/+0
2017-05-24Split off powerpcspe from rs6000 portSegher Boessenkool1-0/+333
2017-03-24S/390: arch12: Add arch12 option.Andreas Krebbel1-1/+4
2017-03-13[ARC] Code size modifications.Claudiu Zissulescu1-0/+1
2017-02-18re PR target/79569 (Unrecognized command line option ‘-m3dnowa’)Jakub Jelinek1-1/+13
2017-02-17i386-common.c (OPTION_MASK_ISA_RDPID_SET): New.Julia Koval1-0/+15
2017-02-06RISC-V Port: gccPalmer Dabbelt1-0/+131
2017-01-11i386-common.c (OPTION_MASK_ISA_SGX_UNSET): New.Julia Koval1-0/+15
2017-01-11[arm] Replace command-line option .def files with single definition fileRichard Earnshaw1-13/+1
2017-01-10Enable AVX-512 VPOPCNTD/VPOPCNTQ instructions.Andrew Senkevich1-0/+19
2017-01-09re PR translation/79019 (translatable string typo in cif-code.def:141)Jakub Jelinek1-1/+1
2017-01-06Make MicroBlaze support DWARF EH (old Xilinx patch, needed for glibc build).Edgar E. Iglesias1-3/+0
2017-01-01Update copyright years.Jakub Jelinek49-49/+49
2016-12-21re PR rtl-optimization/11488 (Pre-regalloc scheduling severely worsens perfor...Pat Haugen1-0/+2
2016-12-15[arm] Remove remaining references to arm feature setsRichard Earnshaw1-2/+2
2016-12-15[arm] Rework arm-common to use new feature bits.Richard Earnshaw1-4/+19
2016-12-15This patch adds the new ISA data structures.Richard Earnshaw1-2/+2
2016-12-15We start out by separating the 'tuning flags' in a CPU or architecture...Richard Earnshaw1-2/+2
2016-12-14aarch64-cores.def: Add -1 as the variant to all of the cores.Andrew Pinski1-1/+1
2016-12-12Define arm_arch_core_flags in a single fileThomas Preud'homme1-0/+20
2016-11-29arc-common.c (arc_handle_option): Remove unused variables.Jeff Law1-2/+0
2016-11-24sparc-common.c (sparc_option_optimization_table): Enable REE at -O2 and higher.Eric Botcazou1-0/+2
2016-11-18[ARM] Optional -mthumb for Thumb only targetsThomas Preud'homme1-0/+23
2016-11-17Enable AVX512_4FMAPS and AVX512_4VNNIW instructionsKirill Yukhin1-0/+40
2016-11-15[ARC] New option handling, refurbish multilib support.Claudiu Zissulescu1-52/+17
2016-10-13Move MEMMODEL_* from coretypes.h to memmodel.hThomas Preud'homme7-0/+7
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