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Author
Files
Lines
2020-09-17
If -mavx implies -mxsave, then -mno-xsave should imply -mno-avx.
liuhongt
1
-2
/
+3
2020-09-10
aarch64: Add support for Armv8-R
Alex Coplan
1
-2
/
+5
2020-09-08
MSP430: Use enums to handle -mcpu= values
Jozef Lawrynowicz
1
-23
/
+3
2020-08-28
Fix: AVX512VP2INTERSECT should imply AVX512DQ.
liuhongt
1
-2
/
+2
2020-08-19
x86: Detect Rocket Lake and Alder Lake
H.J. Lu
1
-0
/
+10
2020-07-10
Initial Sapphire Rapids and Alder Lake support from ISA r40
Cui,Lili
3
-0
/
+16
2020-07-01
RISC-V: Preserve arch version info during normalizing arch string
Kito Cheng
1
-24
/
+46
2020-06-24
x86: Remove brand ID check for Intel processors
H.J. Lu
1
-7
/
+5
2020-06-24
x86: Add Cooper Lake detection with AVX512BF16
H.J. Lu
1
-1
/
+9
2020-06-24
x86: Share _isa_names_table and use cpuinfo.h
H.J. Lu
1
-0
/
+163
2020-06-24
x86: Move cpuinfo.h from libgcc to common/config/i386
H.J. Lu
2
-0
/
+942
2020-06-24
x86: Fold arch_names_table into processor_alias_table
H.J. Lu
2
-90
/
+283
2020-06-08
[arm] (header usage fix) include c++ algorithm header via system.h
Christophe Lyon
1
-1
/
+1
2020-05-21
Add outline-atomics to target attribute.
Martin Liska
1
-0
/
+4
2020-05-19
RISC-V: Handle implied extension for -march parser.
Kito Cheng
1
-10
/
+75
2020-05-19
RISC-V: Update march parser
Kito Cheng
1
-20
/
+20
2020-05-06
Enable TARGET_TSXLDTRK for GCC support.
liuhongt
1
-0
/
+15
2020-05-06
Enable GCC support for SERIALIZE
liuhongt
1
-0
/
+15
2020-04-29
[gcn] Set 'UI_NONE' for 'TARGET_EXCEPT_UNWIND_INFO' [PR94282]
Thomas Schwinge
1
-0
/
+9
2020-04-27
rs6000: enable -fweb for small loops unrolling
guojiufu
1
-3
/
+3
2020-04-03
AArch64: Fix options canonicalization for assembler
Tamar Christina
1
-1
/
+16
2020-03-16
[ARM][GCC][2/x]: MVE ACLE intrinsics framework patch.
Srinath Parvathaneni
1
-1
/
+2
2020-02-20
Remove trailing | in help message.
Martin Liska
1
-3
/
+3
2020-02-13
arc: Don't use if-conversion when optimizing for size.
Claudiu Zissulescu
1
-0
/
+1
2020-02-13
[ARC] Deprecate q-class option.
Claudiu Zissulescu
1
-1
/
+0
2020-01-09
avr-common.c (avr_option_optimization_table): Set -fsplit-wide-types-early.
Georg-Johann Lay
1
-0
/
+2
2020-01-01
Update copyright years.
Jakub Jelinek
54
-54
/
+54
2019-12-17
re PR target/92962 (Documentation: x86 Options - znver2 missing RDPID and WBN...
Jakub Jelinek
1
-5
/
+5
2019-12-09
Use OPTION_MASK_ISA2_$target_[SET,UNSET, ] to indicate those for
Hongtao Liu
1
-113
/
+113
2019-11-16
Delete common/config/powerpcspe
Segher Boessenkool
1
-321
/
+0
2019-11-12
Remove option_default_params and option_validate_param hooks.
Martin Liska
9
-130
/
+17
2019-11-12
Remove set_default_param_value from documentation.
Martin Liska
1
-4
/
+2
2019-11-12
Remove gcc/params.* files.
Martin Liska
6
-6
/
+0
2019-11-12
Apply mechanical replacement (generated patch).
Martin Liska
5
-16
/
+13
2019-11-11
rs6000: Refine small loop unroll in loop_unroll_adjust hook
Jiufu Guo
1
-1
/
+8
2019-11-07
Support 64-bit double and 64-bit long double configurations.
Georg-Johann Lay
1
-0
/
+95
2019-10-28
rs6000: Enable limited unrolling at -O2
Jiufu Guo
1
-0
/
+1
2019-10-17
Fix breakage introduced by r276985.
Georg-Johann Lay
1
-0
/
+5
2019-10-10
S/390: Add support for z15 as CPU name.
Andreas Krebbel
1
-2
/
+2
2019-09-09
GCC port for eBPF
Jose E. Marchesi
1
-0
/
+55
2019-09-03
Remove Cell Broadband Engine SPU targets
Ulrich Weigand
1
-56
/
+0
2019-08-20
Add TIGERLAKE and COOPERLAKE to GCC.
Hongtao Liu
1
-0
/
+4
2019-07-31
RISC-V: Raise error on unexpected ISA string at end.
Maxim Blinov
1
-0
/
+7
2019-07-23
i386-common.c: Use PROCESSOR_ZNVER2 scheduler for znver2.
Jan Hubicka
1
-1
/
+1
2019-07-08
subreg: Add -fsplit-wide-types-early (PR88233)
Segher Boessenkool
1
-0
/
+2
2019-06-26
Enable GCC support for AVX512_VP2INTERSECT which will be in tigerlaker.
Hongtao Liu
1
-1
/
+21
2019-06-12
Initial TI PRU GCC port
Dimitar Dimitrov
1
-0
/
+36
2019-05-28
Add GCC support to ENQCMD.
Xuepeng Guo
1
-0
/
+15
2019-05-24
[aarch64] Change two function declaration types
Matthew Malcomson
1
-1
/
+1
2019-05-22
[aarch64] Introduce flags for SVE2.
Matthew Malcomson
1
-16
/
+19
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