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AgeCommit message (Expand)AuthorFilesLines
2018-05-23[AArch64][PR target/84882] Add mno-strict-alignSudakshina Das1-1/+4
2018-05-19[NDS32] Add abssi2 pattern.Chung-Ju Wu1-0/+2
2018-05-18RISC-V: Add RV32E support.Kito Cheng1-1/+28
2018-05-14i386-common.c (OPTION_MASK_ISA_CLDEMOTE_SET, [...]): New defines.Sebastian Peryt1-0/+15
2018-05-11i386-common.c (OPTION_MASK_ISA_WAITPKG_SET, [...]): New defines.Sebastian Peryt1-0/+15
2018-05-04rs6000: Remove Xilinx FPSegher Boessenkool1-58/+0
2018-04-24x86/CET: Remove the -mcet command-lint optionH.J. Lu1-1/+0
2018-04-20Define __CET__ for -fcf-protection and remove -mibtH.J. Lu1-17/+0
2018-04-19i386-common.c (OPTION_MASK_ISA_MOVDIRI_SET, [...]): New defines.Sebastian Peryt1-0/+30
2018-04-10rs6000: Enable -fasynchronous-unwind-tables by defaultSegher Boessenkool1-0/+9
2018-04-06[NDS32] Add hard float support.Monk Chiang1-0/+2
2018-04-06[NDS32] Enable relax hint by default.Kuan-Lin Chen1-0/+2
2018-03-27[Patch AArch64] Turn on -fasynchronous-unwind-tables and -funwind-tables by d...Ramana Radhakrishnan1-0/+4
2018-03-09[arm] PR target/83193: Do not print arch/cpu hints twice on invalid -march/-mcpuKyrylo Tkachov1-10/+19
2018-03-05Enable WBOINVD and PCONFIG instructions.Olga Makhotina1-0/+30
2018-02-26[Patch AArch64] Turn on frame pointer / partial fix for PR84521Ramana Radhakrishnan1-0/+2
2018-02-22Add "native" as a valid option value for -mcpu/-mtune= on arm (PR driver/83193).Martin Liska1-0/+6
2018-02-21Add "native" as a valid option value for -march= on arm (PR driver/83193).Martin Liska1-0/+6
2018-02-01avr.c (avr_option_override): Move disabling of -fdelete-null-pointer-checks t...Georg-Johann Lay1-0/+6
2018-01-09Don't save registers in main().Georg-Johann Lay1-0/+1
2018-01-03Update copyright years.Jakub Jelinek51-51/+51
2017-12-25re PR target/83488 (ICE on a CET test-case)Jakub Jelinek1-31/+43
2017-12-22Enable AVX512BITALGJulia Koval1-3/+27
2017-12-22This is a follow up patch for pr83488 to fix an error in setting...Igor Tsimbalist1-8/+8
2017-12-21[arm] Fix assembler option rewrite alphabetical comparisonKyrylo Tkachov1-5/+5
2017-12-21re PR target/83488 (ICE on a CET test-case)Jakub Jelinek1-24/+23
2017-12-20Enable VPCLMULQDQ supportJulia Koval1-4/+19
2017-12-12Enable VAES support [1/5]Julia Koval1-0/+15
2017-12-08[arm] Don't strip off all architecture features from -march passed to assemblerRichard Earnshaw1-12/+87
2017-12-08[arm] Generate a -mfpu= option for passing to the assemblerRichard Earnshaw1-0/+80
2017-12-05Enable VNNI support [1/5]Julia Koval1-0/+17
2017-11-16Set default to -fomit-frame-pointerWilco Dijkstra35-168/+0
2017-11-16Add new options: -mext-perf, -mext-perf2, -mext-string.Chung-Ju Wu1-4/+8
2017-11-16Enable VBMI2 support [1/7]Julia Koval1-0/+17
2017-11-07Fix SSE bits dependencies.Julia Koval1-6/+9
2017-10-21Update x86 backend to enable Intel CET.Igor Tsimbalist1-0/+33
2017-10-20Add GFNI command line options and macrosJulia Koval1-0/+15
2017-10-08arm-common.c (arm_except_unwind_info): Handle DWARF2_UNWIND_INFO.Olivier Hainque1-1/+7
2017-09-22[arm] auto-generate arm-isa.h from CPU descriptionsRichard Earnshaw1-5/+5
2017-09-16Use -fsched-pressure and -fomit-frame-pointerChung-Ju Wu1-4/+6
2017-09-112017-09-11 Vidya Praveen <vidyapraveen@arm.com>Vidya Praveen1-5/+5
2017-09-06[arm] auto-generate arm-isa.h from CPU descriptionsRichard Earnshaw1-5/+5
2017-07-10Better ISR prologues by supporting GASes __gcc_isr pseudo insn.Georg-Johann Lay1-0/+1
2017-07-04[arm] Move some generated files out of the source treeRichard Earnshaw1-1/+1
2017-07-03[arm] Clean up generation of BE8 format images.Richard Earnshaw1-0/+57
2017-06-16[arm] Rewrite t-aprofile using new selector methodologyRichard Earnshaw1-1/+3
2017-06-16[arm] Make 'auto' the default FPU selection option.Richard Earnshaw1-1/+1
2017-06-16[arm] Generate a canonical form for -marchRichard Earnshaw1-0/+354
2017-06-16[arm] Use standard option parsing code for detectingRichard Earnshaw1-19/+47
2017-06-16[arm] Move cpu and architecture option name parsingRichard Earnshaw1-0/+190
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