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2016-04-30ira.c tidies: move pdx_subregs into reg_equivAlan Modra2-15/+21
Where pdx_subregs[regno] is used, reg_equiv[regno] is also used. * ira.c (pdx_subregs): Delete. (struct equivalence): Add pdx_subregs field. (set_paradoxical_subreg): Remove pdx_subregs param. Update pdx_subregs access. (update_equiv_regs): Don't create or free pdx_subregs. Update pdx_subregs access. From-SVN: r235656
2016-04-29altivec.h: Change definitions of vec_xl and vec_xst.Bill Schmidt13-5/+1214
[gcc] 2016-04-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/altivec.h: Change definitions of vec_xl and vec_xst. * config/rs6000/rs6000-builtin.def (LD_ELEMREV_V2DF): New. (LD_ELEMREV_V2DI): New. (LD_ELEMREV_V4SF): New. (LD_ELEMREV_V4SI): New. (LD_ELEMREV_V8HI): New. (LD_ELEMREV_V16QI): New. (ST_ELEMREV_V2DF): New. (ST_ELEMREV_V2DI): New. (ST_ELEMREV_V4SF): New. (ST_ELEMREV_V4SI): New. (ST_ELEMREV_V8HI): New. (ST_ELEMREV_V16QI): New. (XL): New. (XST): New. * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add descriptions for VSX_BUILTIN_VEC_XL and VSX_BUILTIN_VEC_XST. * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Map from TARGET_P9_VECTOR to RS6000_BTM_P9_VECTOR. (altivec_expand_builtin): Add handling for VSX_BUILTIN_ST_ELEMREV_<MODE> and VSX_BUILTIN_LD_ELEMREV_<MODE>. (rs6000_invalid_builtin): Add error-checking for RS6000_BTM_P9_VECTOR. (altivec_init_builtins): Define builtins used to implement vec_xl and vec_xst. (rs6000_builtin_mask_names): Define power9-vector. * config/rs6000/rs6000.h (MASK_P9_VECTOR): Define. (RS6000_BTM_P9_VECTOR): Define. (RS6000_BTM_COMMON): Include RS6000_BTM_P9_VECTOR. * config/rs6000/vsx.md (vsx_ld_elemrev_v2di): New define_insn. (vsx_ld_elemrev_v2df): Likewise. (vsx_ld_elemrev_v4sf): Likewise. (vsx_ld_elemrev_v4si): Likewise. (vsx_ld_elemrev_v8hi): Likewise. (vsx_ld_elemrev_v16qi): Likewise. (vsx_st_elemrev_v2df): Likewise. (vsx_st_elemrev_v2di): Likewise. (vsx_st_elemrev_v4sf): Likewise. (vsx_st_elemrev_v4si): Likewise. (vsx_st_elemrev_v8hi): Likewise. (vsx_st_elemrev_v16qi): Likewise. * doc/extend.texi: Add prototypes for vec_xl and vec_xst. Correct grammar. [gcc/testsuite] 2016-04-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.target/powerpc/vsx-elemrev-1.c: New. * gcc.target/powerpc/vsx-elemrev-2.c: New. * gcc.target/powerpc/vsx-elemrev-3.c: New. * gcc.target/powerpc/vsx-elemrev-4.c: New. From-SVN: r235654
2016-04-29tree-ssa-threadedge.c (simplify_control_stmt_condition): Split out into ...Patrick Palka5-46/+297
2016-04-29 Patrick Palka <ppalka@gcc.gnu.org> * tree-ssa-threadedge.c (simplify_control_stmt_condition): Split out into ... (simplify_control_stmt_condition_1): ... here. Recurse into BIT_AND_EXPRs and BIT_IOR_EXPRs. * gcc.dg/tree-ssa/ssa-thread-14.c: New test. * gcc.dg/tree-ssa/ssa-thread-11.c: Update expected output. From-SVN: r235653
2016-04-29re PR middle-end/70626 (bogus results in 'acc parallel loop' reductions)Cesar Philippidis16-15/+146
gcc/c-family/ PR middle-end/70626 * c-common.h (c_oacc_split_loop_clauses): Add boolean argument. * c-omp.c (c_oacc_split_loop_clauses): Use it to duplicate reduction clauses in acc parallel loops. gcc/c/ PR middle-end/70626 * c-parser.c (c_parser_oacc_loop): Don't augment mask with OACC_LOOP_CLAUSE_MASK. (c_parser_oacc_kernels_parallel): Update call to c_oacc_split_loop_clauses. gcc/cp/ PR middle-end/70626 * parser.c (cp_parser_oacc_loop): Don't augment mask with OACC_LOOP_CLAUSE_MASK. (cp_parser_oacc_kernels_parallel): Update call to c_oacc_split_loop_clauses. gcc/fortran/ PR middle-end/70626 * trans-openmp.c (gfc_trans_oacc_combined_directive): Duplicate the reduction clause in both parallel and loop directives. gcc/testsuite/ PR middle-end/70626 * c-c++-common/goacc/combined-reduction.c: New test. * gfortran.dg/goacc/reduction-2.f95: Add check for kernels reductions. libgomp/ PR middle-end/70626 * testsuite/libgomp.oacc-c++/template-reduction.C: Adjust test. * testsuite/libgomp.oacc-c-c++-common/combined-reduction.c: New test. * testsuite/libgomp.oacc-fortran/combined-reduction.f90: New test. From-SVN: r235651
2016-04-29escape: Remove previously existing analysis.Chris Manghane17-2742/+11
* Make-lang.in (GO_OBJS): Remove go/dataflow.o, go/escape.o. Reviewed-on: https://go-review.googlesource.com/18261 From-SVN: r235649
2016-04-29Update scan-assembler-not in PR target/70155 testsH.J. Lu12-11/+26
Since PIC leads to the *movdi_internal pattern, check for nonexistence of the *movdi_internal pattern in PR target/70155 tests only if PIC is off. * gcc.target/i386/pr70155-1.c: Check for nonexistence of the *movdi_internal pattern only if PIC off. * gcc.target/i386/pr70155-2.c: Likewise. * gcc.target/i386/pr70155-3.c: Likewise. * gcc.target/i386/pr70155-4.c: Likewise. * gcc.target/i386/pr70155-5.c: Likewise. * gcc.target/i386/pr70155-6.c: Likewise. * gcc.target/i386/pr70155-7.c: Likewise. * gcc.target/i386/pr70155-8.c: Likewise. * gcc.target/i386/pr70155-15.c: Likewise. * gcc.target/i386/pr70155-17.c: Likewise. * gcc.target/i386/pr70155-22.c: Likewise. From-SVN: r235647
2016-04-29re PR target/69810 (PowerPC64: unrecognizable insn)David Edelsohn2-9/+47
PR target/69810 * config/rs6000/rs6000.md (EXTQI): Don't allow extension to HImode. (zero_extendqi<mode>2_dot): Revert earlier conversion from define_insn_and_split to define_insn. (zero_extendqi<mode>2_dot2): Same. (extendqi<mode>2_dot): Same. (extendqi<mode>2_dot2): Same. From-SVN: r235646
2016-04-29Remove trailing whitespace from libstdc++-v3 filesChris Gregory471-12460/+12467
2016-04-29 Chris Gregory <czipperz@gmail.com> * config/*: Remove trailing whitespace. * src/*: Likewise. * testsuite/tr1/*: Likewise. * testsuite/util/*: Likewise. From-SVN: r235645
2016-04-29re PR tree-optimization/70803 (gcc.dg/vect/pr56625.c FAILs)Bin Cheng2-1/+6
gcc/testsuite/ChangeLog PR tree-optimization/70803 * gcc.dg/vect/pr56625.c: Require vect_int_mult. From-SVN: r235644
2016-04-29Add DW_LANG_RustTom Tromey2-2/+11
include/ * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust, DW_LANG_Rust_old>: New constants. From-SVN: r235643
2016-04-29i386.md (unspec): Add UNSPEC_PROBE_STACK.Uros Bizjak2-0/+31
* config/i386/i386.md (unspec): Add UNSPEC_PROBE_STACK. (probe_stack): New expander. (probe_stack_<mode>): New insn pattern. From-SVN: r235642
2016-04-29i386.md (operations with memory inputs setting flags peephole2): Remove ↵Uros Bizjak2-38/+48
uneeded REG_P checks. * config/i386/i386.md (operations with memory inputs setting flags peephole2): Remove uneeded REG_P checks. Cleanup pattern generation. From-SVN: r235641
2016-04-29crt1.S: Remove SH5 support.Oleg Endo9-2574/+21
libgcc/ * config/sh/crt1.S: Remove SH5 support. * config/sh/crti.S: Likewise. * config/sh/crtn.S: Likewise. * config/sh/lib1funcs-4-300.S: Likewise. * config/sh/lib1funcs-Os-4-200.S: Likewise. * config/sh/lib1funcs.S: Likewise. * config/sh/linux-unwind.h: Likewise. * config/sh/t-sh64: Delete. From-SVN: r235640
2016-04-29tree-vect-loop.c (vect_transform_loop): Fix nb_iterations_upper_bound ↵Ilya Enkovich8-5/+143
computation for vectorized loop. gcc/ * tree-vect-loop.c (vect_transform_loop): Fix nb_iterations_upper_bound computation for vectorized loop. gcc/testsuite/ * gcc.target/i386/vect-unpack-2.c (avx512bw_test): Avoid optimization of vector loop. * gcc.target/i386/vect-unpack-3.c: New test. * gcc.dg/vect/vect-nb-iter-ub-1.c: New test. * gcc.dg/vect/vect-nb-iter-ub-2.c: New test. * gcc.dg/vect/vect-nb-iter-ub-3.c: New test. From-SVN: r235639
2016-04-29re PR c/70852 (ice in warn_for_memset)Marek Polacek4-0/+20
PR c/70852 * c-common.c (warn_for_memset): Check domain before accessing it. * gcc.dg/pr70852.c: New test. From-SVN: r235638
2016-04-29re PR sanitizer/70342 (g++ -fsanitize=undefined never finishes compiling ↵Marek Polacek4-0/+39
(>24h) in qtxmlpatterns test suite) PR sanitizer/70342 * fold-const.c (tree_single_nonzero_warnv_p): For TARGET_EXPR, use TARGET_EXPR_SLOT as a base. * g++.dg/ubsan/null-7.C: New test. Co-Authored-By: Jakub Jelinek <jakub@redhat.com> From-SVN: r235637
2016-04-29arc.md (*loadqi_update): Replace use of 'rI' constraint with 'rCm2' ↵Andrew Burgess2-8/+21
constraints to limit possible... 2016-04-29 Andrew Burgess <andrew.burgess@embecosm.com> * config/arc/arc.md (*loadqi_update): Replace use of 'rI' constraint with 'rCm2' constraints to limit possible immediate size. (*load_zeroextendqisi_update): Likewise. (*load_signextendqisi_update): Likewise. (*loadhi_update): Likewise. (*load_zeroextendhisi_update): Likewise. (*load_signextendhisi_update): Likewise. (*loadsi_update): Likewise. (*loadsf_update): Likewise. From-SVN: r235636
2016-04-29predicates.md (constm1_operand): Fix comparison.Uros Bizjak2-1/+5
* config/i386/predicates.md (constm1_operand): Fix comparison. From-SVN: r235635
2016-04-29[ARC] Handle FPX NaN within optimized floating point library.Claudiu Zissulescu4-5/+65
gcc/ 2016-04-29 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gcc.target/arc/ieee_eq.c: New test. libgcc/ 2016-04-29 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/ieee-754/eqdf2.S: Handle FPX NaN. From-SVN: r235633
2016-04-29longlong.h (umul_ppmm): Remove SHMEDIA checks.Oleg Endo8-62/+39
include/ * longlong.h (umul_ppmm): Remove SHMEDIA checks. (__umulsidi3, count_leading_zeros): Remove SHMEDIA implementations. gcc/ * common/config/sh/sh-common.c (sh_option_optimization_table): Remove remaining SH5 related settings. * config/sh/sh-protos.h (shmedia_cleanup_truncate, shmedia_prepare_call_address): Delete. * config/sh/sh.c (sh_print_operand, output_stack_adjust, DWARF_CIE_DATA_ALIGNMENT, LOCAL_ALIGNMENT): Update comments. * config/sh/sh.h (SUBTARGET_ASM_RELAX_SPEC, UNSUPPORTED_SH2A): Remove m5 checks. (sh_divide_strategy_e): Remove SH5 division strategies. (TARGET_PTRMEMFUNC_VBIT_LOCATION): Remove and use default. * config/sh/sh.md (divsf3): Reinstate define_expand pattern. From-SVN: r235632
2016-04-29[ARC] Fix obsolete constraint.Claudiu Zissulescu2-6/+12
include/ 2016-04-29 Claudiu Zissulescu <claziss@synopsys.com> * longlong.h (add_ssaaaa): Replace obsolete 'J' constraint with 'Cal' constraint. (sub_ddmmss): Likewise. From-SVN: r235631
2016-04-29S/390: Improve documentation of s390_reload_costs.Dominik Vogt2-2/+8
gcc/ChangeLog: 2016-04-29 Dominik Vogt <vogt@linux.vnet.ibm.com> * config/s390/s390.c (s390_rtx_costs): Update documentation. From-SVN: r235630
2016-04-29PR/69089: C++-11: Ingore "alignas(0)".Dominik Vogt4-1/+41
gcc/c-family/ChangeLog: 2016-04-29 Dominik Vogt <vogt@linux.vnet.ibm.com> PR/69089 * c-common.c (handle_aligned_attribute): Allow 0 as an argument to the "aligned" attribute. gcc/testsuite/ChangeLog: 2016-04-29 Dominik Vogt <vogt@linux.vnet.ibm.com> PR/69089 * g++.dg/cpp0x/alignas6.C: New test. From-SVN: r235629
2016-04-29Clean up tests where a later dg-do completely overrides another.Dominik Vogt14-14/+20
The attached patch cleans up some (mostly unnecessary) dg-do directives in the gcc.dg and gcc.target test cases. gcc/testsuite/ChangeLog: 2016-04-29 Dominik Vogt <vogt@linux.vnet.ibm.com> * gcc/testsuite/gcc.dg/cpp/mac-dir-2.c: Remove pointless duplicate dg-do. * gcc/testsuite/gcc.dg/pr27003.c: Likewise. * gcc/testsuite/gcc.dg/tree-ssa/cswtch.c: Likewise. * gcc/testsuite/gcc.dg/tree-ssa/predcom-2.c: Likewise. * gcc/testsuite/gcc.dg/tree-ssa/predcom-4.c: Likewise. * gcc/testsuite/gcc.dg/tree-ssa/predcom-5.c: Likewise. * gcc.target/arc/mxy.c: Likewise. * gcc.target/arc/mswape.c: Likewise. * gcc.target/arc/mrtsc.c: Likewise. * gcc.target/arc/mcrc.c: Likewise. * gcc.target/arc/mdsp-packa.c: Likewise. * gcc.target/arc/mdvbf.c: Likewise. * gcc.target/arc/mlock.c: Likewise. * gcc.target/arc/mmac-24.c: Likewise. * gcc.dg/spec-options.c: Switch order of the two "dg-do run". From-SVN: r235628
2016-04-29S/390: Replace LDER with LDR.Andreas Krebbel4-10/+17
For performance reasons it is important to write the full 64 bits of an FPR target reg even when dealing with 32 bit values. So we chose lder over ler for 32 bit float register moves. lder zero-extends the 32 bit value from the source reg to 64 bit in the target. However, since it actually doesn't matter whether we write the upper 32 bits with zeros or with any other garbage we can also use ldr instead. It is bit shorter and therefore will do good for I-Cache usage. gcc/ChangeLog: 2016-04-29 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/2964.md ("z13_unit_fxu", "z13_0"): Remove lder. * config/s390/s390.md ("movsi_larl", "*movsi_esa", "mov<mode>"): Change lder to ldr. * config/s390/vector.md ("mov<mode>"): Likewise. From-SVN: r235627
2016-04-29S/390: Memory constraint cleanupUlrich Weigand6-230/+274
This fixes an issue with the long displacement memory address constraints S and T. These were defined to only accept long displacement addresses. This is wrong since a memory constraint must not reject an address with a 0 displacement. Reload relies on being able to turn an invalid memory address into a valid one by reloading the address into a base register. The S and T constraints would reject such an address. This isn't really a problem for the backend since we used the constraints with that knowledge there but it is a problem for people writing inline assemblies. gcc/ChangeLog: 2016-04-29 Ulrich Weigand <uweigand@de.ibm.com> * config/s390/constraints.md ("U", "W"): Invoke s390_mem_constraint with "ZR" and "ZT". * config/s390/s390.c (s390_check_qrst_address): Reject invalid addresses when using LRA. Accept also short displacements for S and T constraints. Do not check for long displacement target for S and T constraints. (s390_mem_constraint): Remove handling of U and W constraints. * config/s390/s390.md (various patterns): Remove the short displacement constraints (Q and R) if a long displacement constraint is present. Add longdisp as required CPU capability. * config/s390/vector.md: Likewise. * config/s390/vx-builtins.md: Likewise. From-SVN: r235626
2016-04-29avr-related reload fix from Senthil Kumar SelvarajBernd Schmidt5-5/+164
PR target/60040 * reload1.c (reload): Call finish_spills before restarting reload loop. Skip select_reload_regs if update_eliminables_and_spill returns true. testsuite/ PR target/60040 * gcc.target/avr/pr60040-1.c: New. * gcc.target/avr/pr60040-2.c: New. From-SVN: r235625
2016-04-29pr18589-10.c: Adjust.Richard Biener2-1/+5
2016-04-29 Richard Biener <rguenther@suse.de> * gcc.dg/tree-ssa/pr18589-10.c: Adjust. From-SVN: r235624
2016-04-29[ARC] Fix unwanted match for sign extend 16-bit constant.Claudiu Zissulescu6-5/+62
The combine pass may conclude umulhisi3_imm pattern can accept also sign extended 16-bit constants. This patch prohibits the combine in considering this pattern as suitable. gcc/ 2016-04-29 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc.h (UNSIGNED_INT12, UNSIGNED_INT16): Define. * config/arc/arc.md (umulhisi3): Use arc_short_operand predicate. (umulhisi3_imm): Update predicates and constraint letters. (umulhisi3_reg): Declare instruction as commutative. * config/arc/constraints.md (J12, J16): New constraints. * config/arc/predicates.md (short_unsigned_const_operand): New predicate. (arc_short_operand): Likewise. * testsuite/gcc.target/arc/umulsihi3_z.c: New file. From-SVN: r235623
2016-04-29re PR tree-optimization/13962 ([tree-ssa] make "fold" use alias information ↵Richard Biener6-0/+103
to optimize pointer comparisons) 2016-04-29 Richard Biener <rguenther@suse.de> PR tree-optimization/13962 PR tree-optimization/65686 * tree-ssa-alias.h (ptrs_compare_unequal): Declare. * tree-ssa-alias.c (ptrs_compare_unequal): New function using PTA to compare pointers. * match.pd: Add pattern for pointer equality compare simplification using ptrs_compare_unequal. * gcc.dg/uninit-pr65686.c: New testcase. From-SVN: r235622
2016-04-29stor-layout.c (layout_type): Do not build a pointer-to-element type for arrays.Richard Biener2-2/+5
2016-04-29 Richard Biener <rguenther@suse.de> * stor-layout.c (layout_type): Do not build a pointer-to-element type for arrays. From-SVN: r235621
2016-04-29i386.md (Load+RegOp to Mov+MemOp peephole2): Use SWI mode iterator.Uros Bizjak2-23/+39
* config/i386/i386.md (Load+RegOp to Mov+MemOp peephole2): Use SWI mode iterator. Use general_reg_operand predicate. (Load+RegOp to Mov+MemOp peephole2 with vector regs): Split peephole to MMX and SSE part. Use mmx_reg_operand and sse_reg_operand predicates. From-SVN: r235620
2016-04-29Daily bump.GCC Administrator1-1/+1
From-SVN: r235619
2016-04-29re PR middle-end/70843 (ICE in add_expr, at tree.c:7913)Jakub Jelinek5-6/+43
PR middle-end/70843 * fold-const.c (operand_equal_p): Don't verify hash value equality if arg0 == arg1. * tree.c (inchash::add_expr): Handle STATEMENT_LIST. Ignore BLOCK and OMP_CLAUSE. * gcc.dg/pr70843.c: New test. From-SVN: r235615
2016-04-28c-array-notation.c (fix_builtin_array_notation_fn): Fix final argument to ↵Andrew MacLeod2-2/+7
build_modify_expr in two cases. 2016-04-28 Andrew MacLeod <amacleod@redhat.com> * c-array-notation.c (fix_builtin_array_notation_fn): Fix final argument to build_modify_expr in two cases. From-SVN: r235614
2016-04-28compiler: Mark concurrent calls.Ian Lance Taylor3-4/+20
If a call expression is executed in an independent goroutine via use of a Go statement, mark it as concurrent. Reviewed-on: https://go-review.googlesource.com/18700 From-SVN: r235608
2016-04-28re PR target/70858 (__builtin_ia32_bextr_u64 ICE with '-m32 -march=core-avx2')Jakub Jelinek4-7/+66
PR target/70858 * config/i386/i386.c (bdesc_special_args): Add | OPTION_MASK_ISA_64BIT to __builtin_ia32_lwpval64 and __builtin_ia32_lwpins64. (bdesc_args): Add | OPTION_MASK_ISA_64BIT to __builtin_ia32_bextr_u64, __builtin_ia32_bextri_u64, __builtin_ia32_bzhi_di, __builtin_ia32_pdep_di and __builtin_ia32_pext_di. * gcc.target/i386/pr70858.c: New test. From-SVN: r235607
2016-04-28rs6000: Clean up rs6000_stack_info a bitSegher Boessenkool2-151/+133
- Rename "info_ptr" to "info", as in all other routines; - Don't set fields to 0, the whole struct already is set to 0; - Fix formatting a bit. * config/rs6000/rs6000.c (compute_save_world_info): Rename info_ptr to info. Don't initialize separate fields to 0. Clean up formatting a bit. From-SVN: r235606
2016-04-28nps400-1.c: New file.Andrew Burgess2-0/+27
2016-04-28 Andrew Burgess <andrew.burgess@embecosm.com> * gcc.target/arc/nps400-1.c: New file. From-SVN: r235603
2016-04-28compiler: Export String_index_expression.Ian Lance Taylor3-61/+76
Exports String_index_expression and adds the getter `string` that returns the underlying string. This will be used to handle string indexing different from array indexing in escape analysis. Reviewed-on: https://go-review.googlesource.com/18545 From-SVN: r235602
2016-04-28i386.md (peephole2s for operations with memory inputs): Use SWI mode iterator.Uros Bizjak2-52/+43
* config/i386/i386.md (peephole2s for operations with memory inputs): Use SWI mode iterator. (peephole2s for operations with memory outputs): Ditto. Do not check for stack checking probe. (probe_stack): Remove expander. From-SVN: r235601
2016-04-28arc.c (arc_print_operand): Print integer 'H' / 'L'Joern Rennecke4-7/+43
2016-04-28 Joern Rennecke <joern.rennecke@embecosm.com> Andrew Burgess <andrew.burgess@embecosm.com> gcc: * config/arc/arc.c (arc_print_operand): Print integer 'H' / 'L' gcc/testsuite: * gcc.target/arc/movh_cl-1.c: New file. Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com> From-SVN: r235600
2016-04-28* gdbinit.in: Skip line-map.h.Jason Merrill2-0/+7
From-SVN: r235598
2016-04-28Implement C++17 [[nodiscard]] attribute.Jason Merrill13-5/+399
PR c++/38172 PR c++/54379 gcc/c-family/ * c-lex.c (c_common_has_attribute): Handle nodiscard. gcc/cp/ * parser.c (cp_parser_std_attribute): Handle [[nodiscard]]. * tree.c (handle_nodiscard_attribute): New. (cxx_attribute_table): Add [[nodiscard]]. * cvt.c (cp_get_fndecl_from_callee, cp_get_callee_fndecl): New. (maybe_warn_nodiscard): New. (convert_to_void): Call it. From-SVN: r235597
2016-04-28cvt.c (cp_get_callee): New.Jason Merrill8-30/+32
* cvt.c (cp_get_callee): New. * constexpr.c (get_function_named_in_call): Use it. * cxx-pretty-print.c (postfix_expression): Use it. * except.c (check_noexcept_r): Use it. * method.c (check_nontriv): Use it. * tree.c (build_aggr_init_expr): Use it. * cp-tree.h: Declare it. From-SVN: r235596
2016-04-28arc.h (SYMBOL_FLAG_CMEM): Define.Joern Rennecke19-57/+648
2016-04-28 Joern Rennecke <joern.rennecke@embecosm.com> Andrew Burgess <andrew.burgess@embecosm.com> gcc: * config/arc/arc.h (SYMBOL_FLAG_CMEM): Define. (TARGET_NPS_CMEM_DEFAULT): Provide default definition. * config/arc/arc.c (arc_address_cost): Return 0 for cmem_address. (arc_encode_section_info): Set SYMBOL_FLAG_CMEM where indicated. * config/arc/arc.opt (mcmem): New option. * config/arc/arc.md (*extendqihi2_i): Add r/Uex alternative, supply length for r/m alternative. (*extendqisi2_ac): Likewise. (*extendhisi2_i): Add r/Uex alternative, supply length for r/m and r/Uex alternative. (movqi_insn): Add r/Ucm and Ucm/?Rac alternatives. (movhi_insn): Likewise. (movsi_insn): Add r/Ucm,Ucm/w alternatives. (*zero_extendqihi2_i): Add r/Ucm alternative. (*zero_extendqisi2_ac): Likewise. (*zero_extendhisi2_i): Likewise. * config/arc/constraints.md (Uex): New memory constraint. (Ucm): New define_constraint. * config/arc/predicates.md (long_immediate_loadstore_operand): Return 0 for MEM with cmem_address address. (cmem_address_0): New predicates. (cmem_address_1): Likewise. (cmem_address_2): Likewise. (cmem_address): Likewise. gcc/testsuite: * gcc.target/arc/cmem-1.c: New file. * gcc.target/arc/cmem-2.c: New file. * gcc.target/arc/cmem-3.c: New file. * gcc.target/arc/cmem-4.c: New file. * gcc.target/arc/cmem-5.c: New file. * gcc.target/arc/cmem-6.c: New file. * gcc.target/arc/cmem-7.c: New file. * gcc.target/arc/cmem-ld.inc: New file. * gcc.target/arc/cmem-st.inc: New file. Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com> From-SVN: r235595
2016-04-28sbitmap: Remove popcountSegher Boessenkool4-176/+39
In r193072 sbitmap_popcount was removed, so we cannot ask for the popcount of an sbitmap anymore. Nothing calls sbitmap_alloc_with_popcount either. This patch removes everything else popcount-related from sbitmap. * cfganal.c (bitmap_intersection_of_succs): Delete assert checking dst->popcount. (bitmap_intersection_of_preds): Ditto. (bitmap_union_of_succs): Ditto. (bitmap_union_of_preds): Ditto. * sbitmap.c (do_popcount): Delete. (BITMAP_DEBUGGING): Delete. (sbitmap_verify_popcount): Delete. (sbitmap_alloc): Don't initialize the popcount field. (sbitmap_alloc_with_popcount): Delete. (sbitmap_resize): Don't resize the popcount array. (sbitmap_vector_alloc): Don't initialize the popcount field. (bitmap_copy): Don't copy the popcount array. (bitmap_clear): Don't clear the popcount array. (bitmap_clear): Delete the popcount array handling. (bitmap_ior_and_compl): Delete the popcount assert. (bitmap_not): Ditto. (bitmap_and_compl): Ditto. (bitmap_and): Delete the popcount array handling. (bitmap_xor): Ditto. (bitmap_ior): Ditto. (bitmap_or_and): Delete the popcount assert. (bitmap_and_or): Ditto. (popcount_table): Delete. (sbitmap_elt_popcount): Delete. * sbitmap.h (simple_bitmap_def): Delete the popcount field. (bitmap_set_bit): Delete the popcount assert. (bitmap_clear_bit): Ditto. (sbitmap_free): Don't free the popcount array. (sbitmap_alloc_with_popcount): Delete declaration. (sbitmap_popcount): Ditto. From-SVN: r235592
2016-04-28* ChangeLog: Remove duplicate entry.Uros Bizjak1-6/+0
From-SVN: r235591
2016-04-28arc.h (SYMBOL_FLAG_CMEM): Define.Joern Rennecke17-52/+297
2016-04-28 Joern Rennecke <joern.rennecke@embecosm.com> Andrew Burgess <andrew.burgess@embecosm.com> gcc: * config/arc/arc.h (SYMBOL_FLAG_CMEM): Define. (TARGET_NPS_CMEM_DEFAULT): Provide default definition. * config/arc/arc.c (arc_address_cost): Return 0 for cmem_address. (arc_encode_section_info): Set SYMBOL_FLAG_CMEM where indicated. * config/arc/arc.opt (mcmem): New option. * config/arc/arc.md (*extendqihi2_i): Add r/Uex alternative, supply length for r/m alternative. (*extendqisi2_ac): Likewise. (*extendhisi2_i): Add r/Uex alternative, supply length for r/m and r/Uex alternative. (movqi_insn): Add r/Ucm and Ucm/?Rac alternatives. (movhi_insn): Likewise. (movsi_insn): Add r/Ucm,Ucm/w alternatives. (*zero_extendqihi2_i): Add r/Ucm alternative. (*zero_extendqisi2_ac): Likewise. (*zero_extendhisi2_i): Likewise. * config/arc/constraints.md (Uex): New memory constraint. (Ucm): New define_constraint. * config/arc/predicates.md (long_immediate_loadstore_operand): Return 0 for MEM with cmem_address address. (cmem_address_0): New predicates. (cmem_address_1): Likewise. (cmem_address_2): Likewise. (cmem_address): Likewise. gcc/testsuite: * gcc.target/arc/cmem-1.c: New file. * gcc.target/arc/cmem-2.c: New file. * gcc.target/arc/cmem-3.c: New file. * gcc.target/arc/cmem-4.c: New file. * gcc.target/arc/cmem-5.c: New file. * gcc.target/arc/cmem-6.c: New file. * gcc.target/arc/cmem-7.c: New file. * gcc.target/arc/cmem-ld.inc: New file. * gcc.target/arc/cmem-st.inc: New file. Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com> From-SVN: r235590
2016-04-28rs6000: Rename insn_chain_scanned_p to spe_insn_chain_scanned_pSegher Boessenkool2-4/+10
This makes it clearer this field is only for SPE. * config/rs6000/rs6000.c (machine_function): Rename insn_chain_scanned_p to spe_insn_chain_scanned_p. (rs6000_stack_info): Adjust. From-SVN: r235588
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