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author | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-04-29 13:07:31 +0100 |
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committer | Joern Rennecke <amylaar@gcc.gnu.org> | 2016-04-29 13:07:31 +0100 |
commit | a1f7021242e827f69cd1c2ed5d5eaf33ddfcd196 (patch) | |
tree | 5cdd635c59f7eae23dc64b9c72db5e3f6efa6347 | |
parent | 2ff0cbe5fe8b0a9e156befa67f4affa70d2b86d2 (diff) | |
download | gcc-a1f7021242e827f69cd1c2ed5d5eaf33ddfcd196.zip gcc-a1f7021242e827f69cd1c2ed5d5eaf33ddfcd196.tar.gz gcc-a1f7021242e827f69cd1c2ed5d5eaf33ddfcd196.tar.bz2 |
arc.md (*loadqi_update): Replace use of 'rI' constraint with 'rCm2' constraints to limit possible...
2016-04-29 Andrew Burgess <andrew.burgess@embecosm.com>
* config/arc/arc.md (*loadqi_update): Replace use of 'rI'
constraint with 'rCm2' constraints to limit possible immediate
size.
(*load_zeroextendqisi_update): Likewise.
(*load_signextendqisi_update): Likewise.
(*loadhi_update): Likewise.
(*load_zeroextendhisi_update): Likewise.
(*load_signextendhisi_update): Likewise.
(*loadsi_update): Likewise.
(*loadsf_update): Likewise.
From-SVN: r235636
-rw-r--r-- | gcc/ChangeLog | 13 | ||||
-rw-r--r-- | gcc/config/arc/arc.md | 16 |
2 files changed, 21 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 219d423..b98598f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2016-04-29 Andrew Burgess <andrew.burgess@embecosm.com> + + * config/arc/arc.md (*loadqi_update): Replace use of 'rI' + constraint with 'rCm2' constraints to limit possible immediate + size. + (*load_zeroextendqisi_update): Likewise. + (*load_signextendqisi_update): Likewise. + (*loadhi_update): Likewise. + (*load_zeroextendhisi_update): Likewise. + (*load_signextendhisi_update): Likewise. + (*loadsi_update): Likewise. + (*loadsf_update): Likewise. + 2016-04-29 Uros Bizjak <ubizjak@gmail.com> * config/i386/predicates.md (constm1_operand): Fix comparison. diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index d1a9159..c61107f 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -1254,7 +1254,7 @@ [(set (match_operand:QI 3 "dest_reg_operand" "=r,r") (match_operator:QI 4 "any_mem_operand" [(plus:SI (match_operand:SI 1 "register_operand" "0,0") - (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])) + (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])) (set (match_operand:SI 0 "dest_reg_operand" "=r,r") (plus:SI (match_dup 1) (match_dup 2)))] "" @@ -1266,7 +1266,7 @@ [(set (match_operand:SI 3 "dest_reg_operand" "=r,r") (zero_extend:SI (match_operator:QI 4 "any_mem_operand" [(plus:SI (match_operand:SI 1 "register_operand" "0,0") - (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))) + (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))) (set (match_operand:SI 0 "dest_reg_operand" "=r,r") (plus:SI (match_dup 1) (match_dup 2)))] "" @@ -1278,7 +1278,7 @@ [(set (match_operand:SI 3 "dest_reg_operand" "=r,r") (sign_extend:SI (match_operator:QI 4 "any_mem_operand" [(plus:SI (match_operand:SI 1 "register_operand" "0,0") - (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))) + (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))) (set (match_operand:SI 0 "dest_reg_operand" "=r,r") (plus:SI (match_dup 1) (match_dup 2)))] "" @@ -1304,7 +1304,7 @@ [(set (match_operand:HI 3 "dest_reg_operand" "=r,r") (match_operator:HI 4 "any_mem_operand" [(plus:SI (match_operand:SI 1 "register_operand" "0,0") - (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])) + (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])) (set (match_operand:SI 0 "dest_reg_operand" "=w,w") (plus:SI (match_dup 1) (match_dup 2)))] "" @@ -1316,7 +1316,7 @@ [(set (match_operand:SI 3 "dest_reg_operand" "=r,r") (zero_extend:SI (match_operator:HI 4 "any_mem_operand" [(plus:SI (match_operand:SI 1 "register_operand" "0,0") - (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))) + (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))) (set (match_operand:SI 0 "dest_reg_operand" "=r,r") (plus:SI (match_dup 1) (match_dup 2)))] "" @@ -1329,7 +1329,7 @@ [(set (match_operand:SI 3 "dest_reg_operand" "=r,r") (sign_extend:SI (match_operator:HI 4 "any_mem_operand" [(plus:SI (match_operand:SI 1 "register_operand" "0,0") - (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))) + (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))) (set (match_operand:SI 0 "dest_reg_operand" "=w,w") (plus:SI (match_dup 1) (match_dup 2)))] "" @@ -1354,7 +1354,7 @@ [(set (match_operand:SI 3 "dest_reg_operand" "=r,r") (match_operator:SI 4 "any_mem_operand" [(plus:SI (match_operand:SI 1 "register_operand" "0,0") - (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])) + (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])) (set (match_operand:SI 0 "dest_reg_operand" "=w,w") (plus:SI (match_dup 1) (match_dup 2)))] "" @@ -1378,7 +1378,7 @@ [(set (match_operand:SF 3 "dest_reg_operand" "=r,r") (match_operator:SF 4 "any_mem_operand" [(plus:SI (match_operand:SI 1 "register_operand" "0,0") - (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])) + (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])) (set (match_operand:SI 0 "dest_reg_operand" "=w,w") (plus:SI (match_dup 1) (match_dup 2)))] "" |