diff options
Diffstat (limited to 'gcc/testsuite')
827 files changed, 14305 insertions, 3972 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 860e030..75e4703 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,1796 @@ +2025-03-30 Jan Hubicka <hubicka@ucw.cz> + + * g++.dg/tree-ssa/pr80331.C: New test. + * g++.dg/tree-ssa/pr87502.C: New test. + +2025-03-30 Jakub Jelinek <jakub@redhat.com> + + * gcc.target/aarch64/atomic-inst-ldlogic.c: Fix another + unbalanced {} directive problem. Add space after all + scan-assembler-times counts. + +2025-03-30 Mariam Arutunian <mariamarutunian@gmail.com> + + * gcc.target/aarch64/crc-crc32c-data16.c: Fix iteration + count to match testname. + +2025-03-30 Maciej W. Rozycki <macro@orcam.me.uk> + + PR target/117759 + * gcc.target/alpha/memclr-a2-o1-c9-ptr.c: Add + `-mno-safe-partial'. + * gcc.target/alpha/memclr-a2-o1-c9-ptr-safe-partial.c: New file. + * gcc.target/alpha/memcpy-di-unaligned-dst.c: New file. + * gcc.target/alpha/memcpy-di-unaligned-dst-safe-partial.c: New + file. + * gcc.target/alpha/memcpy-di-unaligned-dst-safe-partial-bwx.c: + New file. + * gcc.target/alpha/memcpy-si-unaligned-dst.c: New file. + * gcc.target/alpha/memcpy-si-unaligned-dst-safe-partial.c: New + file. + * gcc.target/alpha/memcpy-si-unaligned-dst-safe-partial-bwx.c: + New file. + * gcc.target/alpha/stlx0.c: Add `-mno-safe-partial'. + * gcc.target/alpha/stlx0-safe-partial.c: New file. + * gcc.target/alpha/stlx0-safe-partial-bwx.c: New file. + * gcc.target/alpha/stqx0.c: Add `-mno-safe-partial'. + * gcc.target/alpha/stqx0-safe-partial.c: New file. + * gcc.target/alpha/stqx0-safe-partial-bwx.c: New file. + * gcc.target/alpha/stwx0.c: Add `-mno-safe-partial'. + * gcc.target/alpha/stwx0-bwx.c: Add `-mno-safe-partial'. Refer + to stwx0.c rather than copying its code and also verify no LDQ_U + or STQ_U instructions have been produced. + * gcc.target/alpha/stwx0-safe-partial.c: New file. + * gcc.target/alpha/stwx0-safe-partial-bwx.c: New file. + +2025-03-30 Maciej W. Rozycki <macro@orcam.me.uk> + + PR target/117759 + * gcc.target/alpha/stb.c: New file. + * gcc.target/alpha/stb-bwa.c: New file. + * gcc.target/alpha/stb-bwx.c: New file. + * gcc.target/alpha/stba.c: New file. + * gcc.target/alpha/stba-bwa.c: New file. + * gcc.target/alpha/stba-bwx.c: New file. + * gcc.target/alpha/stw.c: New file. + * gcc.target/alpha/stw-bwa.c: New file. + * gcc.target/alpha/stw-bwx.c: New file. + * gcc.target/alpha/stwa.c: New file. + * gcc.target/alpha/stwa-bwa.c: New file. + * gcc.target/alpha/stwa-bwx.c: New file. + +2025-03-30 Tobias Burnus <tburnus@baylibre.com> + + * g++.dg/gomp/append-args-8.C: Remove bogus '3' after \.\[0-9\]+ + pattern. + +2025-03-29 Sam James <sam@gentoo.org> + + * gcc.target/arm/short-vfp-1.c: Add whitespace around brace. + +2025-03-29 Jason Merrill <jason@redhat.com> + + * g++.dg/modules/friend-9_a.C: New test. + * g++.dg/modules/friend-9_b.C: New test. + +2025-03-29 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/118961 + * g++.dg/modules/lto-1.h: New test. + * g++.dg/modules/lto-1_a.H: New test. + * g++.dg/modules/lto-1_b.C: New test. + * g++.dg/modules/lto-1_c.C: New test. + * g++.dg/modules/lto-2_a.H: New test. + * g++.dg/modules/lto-2_b.C: New test. + * g++.dg/modules/lto-3_a.H: New test. + * g++.dg/modules/lto-3_b.C: New test. + +2025-03-28 Jakub Jelinek <jakub@redhat.com> + + * g++.dg/opt/musttail2.C (foo): Define the function instead of + just declaring it, add [[gnu::noipa]] attribute to it. + +2025-03-28 Jakub Jelinek <jakub@redhat.com> + + * lib/gfortran-dg.exp: Don't cycle through the option list if + dg-options or dg-additional-options contains -O after space, tab, + double quote or open curly bracket. + * gfortran.dg/cray_pointers_2.f90: Remove extraneous space between + dg-do and run and remove comment about it. + +2025-03-28 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/119504 + * gm2/iso/fail/conststrarray2.mod: New test. + * gm2/iso/run/pass/constarray2.mod: New test. + * gm2/pim/pass/hexstring.mod: New test. + +2025-03-28 Andrew MacLeod <amacleod@redhat.com> + + * gcc.dg/pr110992.c: New. + * gcc.dg/pr119471.c: New. + +2025-03-28 Christophe Lyon <christophe.lyon@linaro.org> + + PR target/119133 + * gcc.dg/torture/pr119133.c: Add options for float16. + +2025-03-28 Bob Dubner <rdubner@symas.com> + + * cobol.dg/group2/Complex_EVALUATE__1_.cob: New EVALUTE testcase. + * cobol.dg/group2/Complex_EVALUATE__2_.cob: Likewise. + * cobol.dg/group2/EVALUATE_WHEN_NEGATIVE.cob: Likewise. + * cobol.dg/group2/EVALUATE_condition__2_.cob: Likewise. + * cobol.dg/group2/EVALUATE_doubled_WHEN.cob: Likewise. + * cobol.dg/group2/EVALUATE_with_WHEN_using_condition-1.cob: Likewise. + * cobol.dg/group2/Complex_EVALUATE__1_.out: Known-good data for testcase. + * cobol.dg/group2/Complex_EVALUATE__2_.out: Likewise. + * cobol.dg/group2/EVALUATE_WHEN_NEGATIVE.out: Likewise. + * cobol.dg/group2/EVALUATE_condition__2_.out: Likewise. + * cobol.dg/group2/EVALUATE_doubled_WHEN.out: Likewise. + * cobol.dg/group2/EVALUATE_with_WHEN_using_condition-1.out: Likewise. + +2025-03-28 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/119483 + * c-c++-common/pr119483-1.c: New test. + * c-c++-common/pr119483-2.c: New test. + +2025-03-28 Jakub Jelinek <jakub@redhat.com> + + PR ipa/119484 + * c-c++-common/pr119484.c: New test. + +2025-03-28 David Malcolm <dmalcolm@redhat.com> + + * gcc.target/riscv/cmo-zicbop-1.c: Fix missing space before + trailing } in dg-do directive. + * gcc.target/riscv/cmo-zicbop-2.c: Likewise. + * gcc.target/riscv/prefetch-zicbop.c: Likewise. + * gcc.target/riscv/prefetch-zihintntl.c: Likewise. + +2025-03-28 David Malcolm <dmalcolm@redhat.com> + + * gcc.target/i386/strub-pr118006.c: Fix ordering of dg-do and + dg-require- directive so that dg-do is first. + +2025-03-28 David Malcolm <dmalcolm@redhat.com> + + * gcc.target/arm/cmse/cmse-17.c: Fix missing space before trailing + "}" in dg-options. + +2025-03-28 David Malcolm <dmalcolm@redhat.com> + + * gcc.target/aarch64/saturating_arithmetic_1.c: Fix dg-do compile. + * gcc.target/aarch64/saturating_arithmetic_2.c: Likewise. + +2025-03-28 David Malcolm <dmalcolm@redhat.com> + + * g++.dg/abi/pure-virtual1.C: Fix dg-require-weak directive. + * g++.target/i386/mangling-alias1.C: Fix dg-require-ifunc + directive. + +2025-03-27 Bob Dubner <rdubner@symas.com> + + * cobol.dg/group2/ACCEPT_DATE___DAY_and_intrinsic_functions__1_.cob: New testcase. + * cobol.dg/group2/ACCEPT_DATE___DAY_and_intrinsic_functions__2_.cob: Likewise. + * cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__1_.cob: Likewise. + * cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__2_.cob: Likewise. + * cobol.dg/group2/COMP-6_arithmetic.cob: Likewise. + * cobol.dg/group2/COMP-6_numeric_test.cob: Likewise. + * cobol.dg/group2/COMP-6_used_with_DISPLAY.cob: Likewise. + * cobol.dg/group2/COMP-6_used_with_MOVE.cob: Likewise. + * cobol.dg/group2/COMPUTE_multiplication_to_FIX4.cob: Likewise. + * cobol.dg/group2/DISPLAY__Sign_ASCII__2_.cob: Likewise. + * cobol.dg/group2/DISPLAY__Sign_ASCII.cob: Likewise. + * cobol.dg/group2/Floating_continuation_indicator__1_.cob: Likewise. + * cobol.dg/group2/floating-point_ADD_FORMAT_1.cob: Likewise. + * cobol.dg/group2/floating-point_ADD_FORMAT_2.cob: Likewise. + * cobol.dg/group2/floating-point_DIVIDE_FORMAT_1.cob: Likewise. + * cobol.dg/group2/floating-point_DIVIDE_FORMAT_2.cob: Likewise. + * cobol.dg/group2/floating-point_literals.cob: Likewise. + * cobol.dg/group2/floating-point_MULTIPLY_FORMAT_1.cob: Likewise. + * cobol.dg/group2/floating-point_MULTIPLY_FORMAT_2.cob: Likewise. + * cobol.dg/group2/floating-point_SUBTRACT_FORMAT_1.cob: Likewise. + * cobol.dg/group2/floating-point_SUBTRACT_FORMAT_2.cob: Likewise. + * cobol.dg/group2/IBM_dialect_COMP_redefined_by_POINTER_as_64-bit.cob: Likewise. + * cobol.dg/group2/Indicators_______________-____D__.cob: Likewise. + * cobol.dg/group2/MULTIPLY_to_FIX4.cob: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_arithmetic.cob: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__1_.cob: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__2_.cob: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_dump.cob: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_numeric_test__1_.cob: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_numeric_test__2_.cob: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_used_with_DISPLAY.cob: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_used_with_INITIALIZE.cob: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_used_with_MOVE.cob: Likewise. + * cobol.dg/group2/POINTER__display.cob: Likewise. + * cobol.dg/group2/Simple_floating-point_MOVE.cob: Likewise. + * cobol.dg/group2/Simple_floating-point_VALUE_and_MOVE.cob: Likewise. + * cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__2_.out: Known-good result. + * cobol.dg/group2/COMP-6_arithmetic.out: Likewise. + * cobol.dg/group2/COMP-6_numeric_test.out: Likewise. + * cobol.dg/group2/COMP-6_used_with_DISPLAY.out: Likewise. + * cobol.dg/group2/COMP-6_used_with_MOVE.out: Likewise. + * cobol.dg/group2/COMPUTE_multiplication_to_FIX4.out: Likewise. + * cobol.dg/group2/DISPLAY__Sign_ASCII__2_.out: Likewise. + * cobol.dg/group2/DISPLAY__Sign_ASCII.out: Likewise. + * cobol.dg/group2/Floating_continuation_indicator__1_.out: Likewise. + * cobol.dg/group2/floating-point_ADD_FORMAT_1.out: Likewise. + * cobol.dg/group2/floating-point_ADD_FORMAT_2.out: Likewise. + * cobol.dg/group2/floating-point_DIVIDE_FORMAT_1.out: Likewise. + * cobol.dg/group2/floating-point_DIVIDE_FORMAT_2.out: Likewise. + * cobol.dg/group2/floating-point_literals.out: Likewise. + * cobol.dg/group2/floating-point_MULTIPLY_FORMAT_1.out: Likewise. + * cobol.dg/group2/floating-point_MULTIPLY_FORMAT_2.out: Likewise. + * cobol.dg/group2/floating-point_SUBTRACT_FORMAT_1.out: Likewise. + * cobol.dg/group2/floating-point_SUBTRACT_FORMAT_2.out: Likewise. + * cobol.dg/group2/IBM_dialect_COMP_redefined_by_POINTER_as_64-bit.out: Likewise. + * cobol.dg/group2/Indicators_______________-____D__.out: Likewise. + * cobol.dg/group2/MULTIPLY_to_FIX4.out: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_arithmetic.out: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__1_.out: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__2_.out: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_dump.out: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_numeric_test__1_.out: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_numeric_test__2_.out: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_used_with_DISPLAY.out: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_used_with_INITIALIZE.out: Likewise. + * cobol.dg/group2/PACKED-DECIMAL_used_with_MOVE.out: Likewise. + * cobol.dg/group2/POINTER__display.out: Likewise. + * cobol.dg/group2/Simple_floating-point_MOVE.out: Likewise. + * cobol.dg/group2/Simple_floating-point_VALUE_and_MOVE.out: Likewise. + +2025-03-27 Jakub Jelinek <jakub@redhat.com> + + * g++.dg/strub-internal-pr112938.C: Add dg-warning for c++20. + +2025-03-27 Marek Polacek <polacek@redhat.com> + + * g++.dg/template/explicit-args6.C: Remove an extra set of {} in + a dg-message. + +2025-03-27 Dimitar Dimitrov <dimitar@dinux.eu> + + * gcc.misc-tests/gcov-31.c: Require effective target sigsetjmp. + * gcc.misc-tests/gcov-32.c: Ditto. + +2025-03-27 Marek Polacek <polacek@redhat.com> + + * g++.dg/tree-ssa/initlist-opt2.C: Match _M_range_initialize_n + instead of _M_range_initialize. + +2025-03-27 Sam James <sam@gentoo.org> + + * gfortran.dg/cray_pointers_2.f90: Restore whitespace. + +2025-03-27 Edwin Lu <ewlu@rivosinc.com> + + * gcc.target/riscv/rvv/autovec/vls/merge-4.c: Fix typo + +2025-03-27 Sam James <sam@gentoo.org> + + * gcc.target/aarch64/atomic-inst-ldlogic.c: Add another closing brace. + +2025-03-27 Sam James <sam@gentoo.org> + + * gcc.dg/analyzer/fd-datagram-socket.c: Fix 'dg-message' spelling. + * gcc.dg/analyzer/out-of-bounds-zero.c: Fix whitespace in 'dg-additional-options'. + * gcc.dg/analyzer/strchr-1.c: Fix 'dg-message' whitespace. + * gnat.dg/sso/q11.adb: Fix 'dg-output' whitespace. + +2025-03-27 Sam James <sam@gentoo.org> + + * g++.dg/warn/Winvalid-memory-model.C: Fix typo in comment. + * gcc.dg/builtin-dynamic-object-size-19.c: Ditto. + * gcc.dg/builtin-object-size-19.c: Ditto. + * gcc.dg/strlenopt-40.c: Ditto. + * gcc.dg/strlenopt-44.c: Ditto. + * gcc.dg/strlenopt-45.c: Ditto. + * gcc.dg/strlenopt-50.c: Ditto. + * gcc.dg/strlenopt-51.c: Ditto. + * gcc.dg/strlenopt-52.c: Ditto. + * gcc.dg/strlenopt-53.c: Ditto. + * gcc.dg/strlenopt-54.c: Ditto. + * gcc.dg/strlenopt-55.c: Ditto. + * gcc.dg/strlenopt-58.c: Ditto. + * gcc.dg/strlenopt-59.c: Ditto. + * gcc.dg/strlenopt-62.c: Ditto. + * gcc.dg/strlenopt-65.c: Ditto. + * gcc.dg/strlenopt-70.c: Ditto. + * gcc.dg/strlenopt-72.c: Ditto. + * gcc.dg/strlenopt-73.c: Ditto. + * gcc.dg/strlenopt-77.c: Ditto. + * gcc.dg/strlenopt-82.c: Ditto. + * gcc.dg/tree-ssa/builtin-snprintf-4.c: Ditto. + * gcc.dg/tree-ssa/builtin-snprintf-6.c: Ditto. + * gcc.dg/tree-ssa/builtin-snprintf-7.c: Ditto. + * gcc.dg/tree-ssa/builtin-sprintf-10.c: Ditto. + * gcc.dg/tree-ssa/builtin-sprintf-9.c: Ditto. + * gcc.dg/tree-ssa/phi-opt-value-5.c: Ditto. + * lib/multiline.exp: Ditto. + * lib/target-supports.exp: Ditto. + +2025-03-27 Sam James <sam@gentoo.org> + + * c-c++-common/goacc/pr69916.c: Fix unusual whitespace in dg-*. + * g++.old-deja/g++.abi/vtable2.C: Ditto. + * g++.old-deja/g++.bugs/900330_02.C: Ditto. + * g++.old-deja/g++.bugs/900406_02.C: Ditto. + * g++.old-deja/g++.bugs/900519_13.C: Ditto. + * g++.old-deja/g++.mike/p9068.C: Ditto. + * gcc.dg/20040203-1.c: Ditto. + * gcc.dg/980502-1.c: Ditto. + * gcc.dg/ipa/ipa-sra-14.c: Ditto. + * gcc.dg/pr35468.c: Ditto. + * gcc.dg/pr82597.c: Ditto. + * gcc.dg/tree-ssa/phi-opt-7.c: Ditto. + * gfortran.dg/assumed_charlen_in_main.f90: Ditto. + * gfortran.dg/cray_pointers_2.f90: Ditto. + +2025-03-27 Tobias Burnus <tburnus@baylibre.com> + + * g++.dg/gomp/append-args-1.C: Remove expected dg-sorry. + * g++.dg/gomp/append-args-8.C: New test. + +2025-03-27 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/118920 + * g++.dg/modules/attrib-3_a.H: New test. + * g++.dg/modules/attrib-3_b.C: New test. + * g++.dg/modules/pr118920.h: New test. + * g++.dg/modules/pr118920_a.H: New test. + * g++.dg/modules/pr118920_b.H: New test. + * g++.dg/modules/pr118920_c.C: New test. + +2025-03-27 Nathaniel Shead <nathanieloshead@gmail.com> + Jason Merrill <jason@redhat.com> + + PR c++/118920 + * g++.dg/modules/tpl-friend-17.h: New test. + * g++.dg/modules/tpl-friend-17_a.C: New test. + * g++.dg/modules/tpl-friend-17_b.C: New test. + +2025-03-27 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/fmaxmin.c: Move scan-assembler checks to ... + * gcc.target/arm/fmaxmin-2.c: ... here. New test. + +2025-03-27 Hu, Lin1 <lin1.hu@intel.com> + + PR target/119425 + * gcc.target/i386/pr119425.c: New test. + Co-authered-by: Hongyu Wang <hongyu.wang@intel.com> + +2025-03-27 Martin Uecker <uecker@tugraz.at> + + PR c/118765 + * gcc.dg/pr118765-2.c: New test. + * gcc.dg/pr118765-3.c: New test. + * gcc.dg/typedef-redecl3.c: New test. + +2025-03-27 Lulu Cheng <chenglulu@loongson.cn> + + PR target/119408 + * gcc.target/loongarch/pr119408.c: New test. + +2025-03-27 Sandra Loosemore <sloosemore@baylibre.com> + + * c-c++-common/gomp/append-args-interop.c: Fix declaration of base + function to be correct for pre-C23 dialects. + +2025-03-27 Sam James <sam@gentoo.org> + + PR testsuite/119489 + * g++.dg/strub-internal-pr112938.C: Adjust pattern. + +2025-03-27 Sam James <sam@gentoo.org> + + * gcc.target/arc/taux-1.c: Add missing brace. + * gcc.target/arc/taux-2.c: Ditto. + * gcc.target/i386/addr-space-1.c: Ditto. + * gcc.target/ia64/mfused-madd-vect.c: Ditto. + * gcc.target/ia64/mfused-madd.c: Ditto. + * gcc.target/ia64/mno-fused-madd-vect.c: Ditto. + * gcc.target/ia64/mno-fused-madd.c: Ditto. + * gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c: Ditto. + * gcc.target/riscv/rvv/autovec/vls/merge-4.c: Ditto. + * gcc.target/s390/target-attribute/tattr-1.c: Ditto. + * gcc.target/s390/target-attribute/tattr-2.c: Ditto. + +2025-03-27 Sam James <sam@gentoo.org> + + PR target/98743 + PR tree-optimization/105820 + * g++.dg/cpp0x/udlit-namespace-ambiguous.C: Fix whitespace. + * g++.dg/cpp2a/constexpr-init21.C: Ditto. + * g++.dg/diagnostic/wrong-tag-1.C: Ditto. + * g++.dg/init/self1.C: Ditto. + * g++.dg/opt/pr98743.C: Add missing '}' to terminate dg directive. + * g++.dg/parse/error8.C: Fix whitespace. + * g++.dg/template/explicit-args6.C: Add missing '{' to begin dg directive. + * g++.dg/template/unify9.C: Fix whitespace. + * g++.dg/tree-ssa/pr105820.C: Ditto. + * g++.dg/warn/Wmismatched-tags-8.C: Add missing braces. + * gcc.dg/cpp/cmdlne-dM-M.c: Ditto. + * gcc.dg/tree-ssa/reassoc-32.c: Ditto. + * gcc.dg/tree-ssa/reassoc-33.c: Ditto. + * gcc.dg/tree-ssa/reassoc-34.c: Ditto. + * gcc.dg/tree-ssa/reassoc-35.c: Ditto. + * gcc.dg/tree-ssa/reassoc-36.c: Ditto. + * gcc.dg/tree-ssa/reassoc-39.c: Ditto. + * gcc.dg/tree-ssa/reassoc-41.c: Ditto. + +2025-03-27 Sam James <sam@gentoo.org> + + * g++.dg/diagnostic/unclosed-extern-c.C: Fix 'dg-message' typo. + * g++.dg/warn/Wno-attributes-1.C: Ditto. + +2025-03-27 Sam James <sam@gentoo.org> + + * g++.dg/cpp0x/gen-attrs-6.C: Surround 'target' by whitespace. + * gcc.target/aarch64/atomic-inst-ldlogic.c: Fix 'dg-final' whitespace. + * gcc.target/arm/short-vfp-1.c: Ditto. + * gcc.target/bfin/l2.c: Fix 'dg-bfin-processors' whitespace. + * gcc.target/i386/avx512fp16-vmovw-1b.c: Surround 'target' by whitespace. + * gcc.target/i386/sse2-float16-5.c: Ditto. + * gcc.target/powerpc/fold-vec-perm-longlong.c: Ditto. + +2025-03-27 Sam James <sam@gentoo.org> + + PR middle-end/93437 + * g++.dg/warn/Wstringop-overflow-5.C: Fix -Wstringop-overflow casing. + +2025-03-27 Sam James <sam@gentoo.org> + + * gfortran.dg/associate_70.f90: Replace parenthesis with '}'. + * gfortran.dg/bessel_3.f90: Drop extraneous parenthesis. + * gfortran.dg/c_funloc_tests_6.f90: Ditto. + * gfortran.dg/parity_2.f90: Ditto. + +2025-03-27 Sam James <sam@gentoo.org> + + PR ipa/98265 + * g++.dg/tree-ssa/pr98265.C: Use -std=c++14. + Use scan-tree-dump instead of scan-tree-dump-times. + +2025-03-27 Sam James <sam@gentoo.org> + + PR tree-optimization/37143 + * g++.dg/vect/pr37143.C: Move to... + * g++.dg/vect/pr37143.cc: ...here. + +2025-03-27 Sam James <sam@gentoo.org> + + PR ipa/98265 + * gcc.dg/tree-ssa/pr98265.C: Move to... + * g++.dg/tree-ssa/pr98265.C: ...here. + +2025-03-27 Sam James <sam@gentoo.org> + + PR middle-end/112938 + * g++.dg/strub-internal-pr112938.cc: Move to... + * g++.dg/strub-internal-pr112938.C: ...here. + +2025-03-26 Jørgen Kvalsvik <j@lambda.is> + + * lib/gcov.exp: Add prime paths test function. + * g++.dg/gcov/gcov-22.C: New test. + * g++.dg/gcov/gcov-23-1.h: New test. + * g++.dg/gcov/gcov-23-2.h: New test. + * g++.dg/gcov/gcov-23.C: New test. + * gcc.misc-tests/gcov-29.c: New test. + * gcc.misc-tests/gcov-30.c: New test. + * gcc.misc-tests/gcov-31.c: New test. + * gcc.misc-tests/gcov-32.c: New test. + * gcc.misc-tests/gcov-33.c: New test. + * gcc.misc-tests/gcov-34.c: New test. + +2025-03-26 Harald Anlauf <anlauf@gmx.de> + + PR fortran/118796 + * gfortran.dg/derived_result_4.f90: New test. + +2025-03-26 David Malcolm <dmalcolm@redhat.com> + + * gcc.target/powerpc/pr70243.c: Fix missing trailing " }" in + dg-do directive. + * gcc.target/powerpc/pr91903.c: Likewise. + +2025-03-26 David Malcolm <dmalcolm@redhat.com> + + * c-c++-common/gomp/metadirective-target-device-2.c: Fix missing + trailing " }" on dg-do directive. + * gcc.dg/gomp/attrs-21.c: Likewise for dg-options. + * gcc.dg/gomp/parallel-2.c: Drop ":" from dg-message. + +2025-03-26 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/ipa/pr110377.c: Fix missing trailing " }" in dg-do + directive. + * gcc.dg/plugin/infoleak-1.c: Fix dg-bogus directive. + * gcc.dg/pr101364-1.c: Fix missing trailing " }" in dg-options + directive. + * gcc.dg/pr113207.c: Fix dg-do. + * gcc.dg/sarif-output/include-chain-2.c: Fix ordering of dg-do + and dg-require-effective-target. + * gcc.dg/strub-pr118007.c: Likewise. + * gcc.dg/tanhbysinh.c: Fix missing whitespace after opening + brace and before closing brace in 6 dg-final directives. + * gcc.dg/uninit-pred-3_c.c: Fix missing whitespace after opening + brace in 6 dg-final directive. + * gcc.dg/uninit-pred-3_d.c: Likewise. + * gcc.dg/variable-sized-type-flex-array.c: Fix missing space + between dg-bogus and message in 2 places. + +2025-03-26 Jonathan Wakely <jwakely@redhat.com> + + * g++.dg/tree-ssa/initlist-opt1.C: Match _M_range_initialize_n + instead of _M_range_initialize. + +2025-03-26 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * c-c++-common/gomp/metadirective-device.c + (dg-additional-options): Use on all x86 targets. Restrict to lp64. + * c-c++-common/gomp/metadirective-target-device-1.c: Likewise. + +2025-03-26 Jakub Jelinek <jakub@redhat.com> + + * gfortran.dg/gomp/append-args-interop.f90: Don't use omp_lib, + instead use iso_c_binding and define omp_interop_kind parameter + locally. + +2025-03-26 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/119417 + * gcc.dg/torture/pr119417.c: New test. + +2025-03-26 Jakub Jelinek <jakub@redhat.com> + Andi Kleen <ak@gcc.gnu.org> + + PR gcov-profile/118442 + * c-c++-common/pr118442.c: New test. + +2025-03-26 Jakub Jelinek <jakub@redhat.com> + + PR target/55583 + PR target/119465 + * gcc.target/i386/pr55583.c: Add -mno-sse -mno-mmx to + dg-additional-options. Expect 4 shrdl and 2 shldl instructions on + ia32. + +2025-03-26 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * gcc.target/i386/pr117946.c: Require dfp support. + * gcc.target/i386/pr118017.c: Likewise. Use + dg-require-effective-target for both this and int128. + +2025-03-26 Jakub Jelinek <jakub@redhat.com> + + PR target/119450 + * gcc.target/i386/pr119450.c: New test. + +2025-03-26 Richard Biener <rguenther@suse.de> + + PR middle-end/118795 + * g++.dg/torture/pr118795.C: New testcase. + +2025-03-26 Sam James <sam@gentoo.org> + Andrew Pinski <quic_apinski@quicinc.com> + + PR testsuite/119382 + * gcc.dg/ipa/ipa-icf-40.c: New test. + +2025-03-26 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx10_2-512-convert-1.c: Modify function name + to follow the latest version. + * gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-convert-1.c: Ditto. + +2025-03-25 Bob Dubner <rdubner@symas.com> + Richard Biener <rguenth@suse.de> + Jakub Jelinek <jakub@redhat.com> + James K. Lowden <jklowden@cobolworx.com> + Robert Dubner <rdubher@symas.com> + + * cobol.dg/literal1.cob: New testcase. + * cobol.dg/output1.cob: Likewise + * cobol.dg/data1.cob: New file. + +2025-03-25 Marek Polacek <polacek@redhat.com> + + PR c++/101881 + * g++.dg/ext/vector44.C: New test. + +2025-03-25 Simon Martin <simon@nasilyan.com> + + PR c++/114525 + * g++.dg/expr/cond18.C: New test. + +2025-03-25 yxj-github-437 <2457369732@qq.com> + + * g++.dg/cpp2a/lambda-uneval25.C: New test. + +2025-03-25 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/mtp_1.c: Require arm32. + * gcc.target/arm/mtp_2.c: Likewise. + * gcc.target/arm/mtp_3.c: Likewise. + * gcc.target/arm/mtp_4.c: Likewise. + +2025-03-25 Sandra Loosemore <sloosemore@baylibre.com> + Tobias Burnus <tburnus@baylibre.com> + + * c-c++-common/gomp/append-args-1.c: Adjust expected behavior. + * c-c++-common/gomp/append-args-interop.c: New. + * c-c++-common/gomp/dispatch-11.c: Adjust expected behavior. + * g++.dg/gomp/append-args-1.C: Likewise. + * gfortran.dg/gomp/append-args-interop.f90: New. + * gfortran.dg/gomp/declare-variant-mod-2.f90: Adjust expected behavior. + +2025-03-25 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/ftest-armv4t-thumb.c: Expect __ARM_FEATURE_CLZ to be + defined. Remove redundant dg-skip-if rules. + * gcc.target/arm/ftest-armv5t-thumb.c: Likewise. + * gcc.target/arm/ftest-armv5te-thumb.c: Likewise. + * gcc.target/arm/ftest-armv6-thumb.c: Likewise. + * gcc.target/arm/ftest-armv6k-thumb.c: Likewise. + * gcc.target/arm/ftest-armv6z-thumb.c: Likewise. + * gcc.target/arm/ftest-armv7em-thumb.c: Remove redundant dg-skip-if + rules. Add a require-effective-target for armv7em. + * gcc.target/arm/ftest-armv7a-arm.c: Likewise. + * gcc.target/arm/ftest-armv7a-thumb.c: Likewise. + * gcc.target/arm/ftest-armv7r-arm.c: Likewise. + * gcc.target/arm/ftest-armv7r-thumb.c: Likewise. + * gcc.target/arm/ftest-armv7ve-arm.c: Likewise. + * gcc.target/arm/ftest-armv7ve-thumb.c: Likewise. + * gcc.target/arm/ftest-armv8a-arm.c: Likewise. + * gcc.target/arm/ftest-armv8a-thumb.c: Likewise. + * gcc.target/arm/ftest-armv4-arm.c: Remove redundant dg-skip-if rules. + * gcc.target/arm/ftest-armv4t-arm.c: Likewise. + * gcc.target/arm/ftest-armv5t-arm.c: Likewise. + * gcc.target/arm/ftest-armv5te-arm.c: Likewise. + * gcc.target/arm/ftest-armv6-arm.c: Likewise. + * gcc.target/arm/ftest-armv6k-arm.c: Likewise. + * gcc.target/arm/ftest-armv6m-thumb.c: Likewise. + * gcc.target/arm/ftest-armv6t2-arm.c: Likewise. + * gcc.target/arm/ftest-armv6t2-thumb.c: Likewise. + * gcc.target/arm/ftest-armv6z-arm.c: Likewise. + +2025-03-25 Jakub Jelinek <jakub@redhat.com> + + PR target/96226 + PR target/119428 + * gcc.c-torture/execute/pr119428.c: New test. + +2025-03-25 Vineet Gupta <vineetg@rivosinc.com> + + PR target/119224 + * gcc.target/riscv/rvv/autovec/pr117722.c: Adjust output insn. + * gcc.target/riscv/rvv/autovec/pr119224.c: Add new test. + +2025-03-25 Paul-Antoine Arras <parras@baylibre.com> + + * gfortran.dg/gomp/interop-5.f90: Declare omp_interop_kind explicitly + instead of use'ing omp_lib. Update scan-dumps to allow for 4-byte + pointers. + +2025-03-25 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/lto/pr96939_0.c (dg-options): Delete. Move the + options from here ... + (dg-lto-options): ... to here. + +2025-03-25 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/vect-early-break-cbranch.c: Allow BEQ as well as BNE. + +2025-03-25 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/pr65647.c (dg-options): Add -std=gnu17. + +2025-03-25 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c: Remove + dg-do directive. + * gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld1x3.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vld1x4.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst1x2.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst1x3.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vst1x4.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: Likewise. + +2025-03-25 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/aarch64/advsimd-intrinsics/vmla_float_not_fused.c: + Remove dg-options. + * gcc.target/aarch64/advsimd-intrinsics/vmls_float_not_fused.c: + Likewise. + +2025-03-25 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c: Remove + dg-options. + +2025-03-25 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect.inc: + Move to gcc.target/aarch64/simd/. + * gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_1.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_2.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_3.c: Likewise. + * gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_4.c: Likewise. + * gcc.target/aarch64/simd/saturating_arithmetic_autovect.inc: New file. + * gcc.target/aarch64/simd/saturating_arithmetic_autovect_1.c: New file. + * gcc.target/aarch64/simd/saturating_arithmetic_autovect_2.c: New file. + * gcc.target/aarch64/simd/saturating_arithmetic_autovect_3.c: New file. + * gcc.target/aarch64/simd/saturating_arithmetic_autovect_4.c: New file. + +2025-03-25 Christophe Lyon <christophe.lyon@linaro.org> + + * lib/target-supports.exp + (check_effective_target_arm_v8_1_lob_ok): Remove duplicate + -mcpu=unset. + +2025-03-25 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/pr42575.c: Skip test if thumb1. + +2025-03-25 Richard Earnshaw <rearnsha@arm.com> + + PR middle-end/117811 + * gcc.dg/torture/pr117811.c: New test. + +2025-03-25 Jakub Jelinek <jakub@redhat.com> + + PR ipa/119376 + * g++.dg/torture/musttail1.C: New test. + * g++.dg/opt/musttail2.C: New test. + +2025-03-25 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/119449 + * gm2/pim/pass/minmaxreal.mod: New test. + * gm2/pim/pass/minmaxreal2.mod: New test. + * gm2/pim/pass/minmaxreal3.mod: New test. + +2025-03-25 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c: Modify testcase. + +2025-03-24 Jason Merrill <jason@redhat.com> + + * g++.dg/cpp26/pack-indexing16.C: New test. + +2025-03-24 Iain Buclaw <ibuclaw@gdcproject.org> + + * gdc.dg/Wbuiltin_declaration_mismatch2.d: Split test into ... + * gdc.dg/Wbuiltin_declaration_mismatch3.d: New test. + * gdc.dg/Wbuiltin_declaration_mismatch4.d: New test. + * gdc.dg/Wbuiltin_declaration_mismatch5.d: New test. + * gdc.dg/Wbuiltin_declaration_mismatch6.d: New test. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/execute/torture/issue-3502.rs: New test. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + * rust/compile/redef_error2.rs: Modify expected error. + * rust/compile/redef_error5.rs: Likewise. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove self-path2.rs + * rust/compile/self-path2.rs: Adjust expected errors. + +2025-03-24 Ryutaro Okada <1015ryu88@gmail.com> + + * rust/compile/extern_generics.rs: New test. + +2025-03-24 Liam Naddell <liamnprg@gmail.com> + + * rust/compile/issue-3315-1.rs: Add test for module with same name + as builtin + * rust/compile/issue-3315-2.rs: Test with utilization of i32 + type + * rust/compile/nr2/exclude: issue-3315-2.rs Does not work with + NR2.0 + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/compile.exp: Adjust to cover tests in the + torture subdirectory. + * rust/compile/nr2/exclude: Add entries. + +2025-03-24 Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com> + + * rust/compile/nr2/exclude: Remove two mangling tests from exclusion + file. + +2025-03-24 Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com> + + * rust/compile/nr2/exclude: Remove issue-1786 and issue-3033 from + exclusion list. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/execute/torture/issue-3126.rs: New test. + +2025-03-24 Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com> + + * rust/compile/enum_variant_name.rs: New test. + +2025-03-24 Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com> + + * rust/compile/nr2/exclude: Remove test. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/execute/crate-metavar1.rs: New test. + * rust/compile/crate-metavar1.rs: New test. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/try-expr1.rs: New test. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/macros/mbe/macro43.rs: Adjust expected errors. + * rust/compile/macros/mbe/macro44.rs: Likewise. + * rust/compile/nested_macro_use2.rs: Likewise. + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/issue-2015.rs: New test. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/additional-trait-bounds2.rs: Adjust expected + errors. + * rust/compile/const_generics_4.rs: Likewise. + * rust/compile/const_generics_7.rs: Likewise. + * rust/compile/generic-default1.rs: Likewise. + * rust/compile/generics5.rs: Likewise. + * rust/compile/generics9.rs: Likewise. + * rust/compile/issue-2423.rs: Likewise. + * rust/compile/method2.rs: Likewise. + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/derive-hash1.rs: New test. + * rust/compile/nr2/exclude: Add testcase to exclusion list. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/macros/mbe/macro-expand-module.rs: New test. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/derive-eq-invalid.rs: Declare StructuralPartialEq. + * rust/compile/derive-partialeq1.rs: Likewise. + * rust/execute/torture/derive-partialeq1.rs: Likewise. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/derive-eq-invalid.rs: Mark PartialEq def as a lang item. + * rust/compile/derive-partialeq1.rs: New test. + * rust/execute/torture/derive-partialeq1.rs: New test. + * rust/compile/nr2/exclude: Exclude all of them. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/derive-eq-invalid.rs: New test. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Benjamin Thos <benjamin.thos@epita.fr> + + * rust/compile/implicit_returns_err3.rs: Change test to be valid. + * rust/compile/torture/if.rs: Likewise. + * rust/compile/if-without-else.rs: New test. + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/compile/generics4.rs: cleanup + * rust/compile/generics6.rs: likewise + * rust/compile/type-bindings1.rs: likewise + * rust/compile/unconstrained_type_param.rs: likewise + * rust/compile/issue-2035.rs: New test. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/compile/issue-3022.rs: New test. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/compile/issue-3031.rs: New test. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/compile/issue-2369.rs: New test. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/execute/torture/enum_intrinsics2.rs: New test. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/execute/torture/enum_intrinsics1.rs: New test. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/compile/nr2/exclude: nr2 cant handle this + * rust/compile/issue-3403.rs: New test. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/for-loop1.rs: New test. + * rust/compile/for-loop2.rs: New test. + * rust/execute/torture/for-loop1.rs: New test. + * rust/execute/torture/for-loop2.rs: New test. + * rust/compile/nr2/exclude: Exclude for-loop1.rs + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/compile/nr2/exclude: nr2 cant handle this + * rust/compile/issue-3402-1.rs: New test. + * rust/compile/issue-3402-2.rs: New test. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/derive-default1.rs: New test. + * rust/execute/torture/derive-default1.rs: New test. + * rust/compile/nr2/exclude: Exclude them. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/execute/torture/issue-3381.rs: New test. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/compile/nr2/exclude: nr2 cant handle this. + * rust/compile/issue-3382.rs: New test. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/compile/reference1.rs: fix error message + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Remove entries. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/derive-debug1.rs: New test. + * rust/compile/nr2/exclude: Exclude it. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/structural-eq-peq.rs: New test. + +2025-03-24 Liam Naddell <liamnprg@gmail.com> + + * rust/compile/macros/builtin/option_env1.rs: Add success case for option_env + * rust/compile/macros/builtin/option_env2.rs: Add failure case for option_env + * rust/execute/torture/builtin_macro_option_env.rs: Add + execution case for option_env + * rust/compile/macros/builtin/option_env3.rs: New file. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/compile/nr2/exclude: nr2 cant handle this + * rust/compile/issue-3174.rs: New test. + +2025-03-24 Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com> + + * rust/compile/nr2/exclude: Remove some tests. + +2025-03-24 Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com> + + * rust/compile/nr2/exclude: Remove passing tests. + +2025-03-24 Philip Herron <herron.philip@googlemail.com> + + * rust/compile/nr2/exclude: these tests now work it seems + +2025-03-24 Owen Avery <powerboat9.gamer@gmail.com> + + * rust/compile/nr2/exclude: Add entries. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/try-trait.rs: New test. + +2025-03-24 Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com> + + * rust/compile/nr2/exclude: Remove break-rust3.rs from exclude list. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/derive_macro6.rs: Add lang item attribute to Copy trait. + +2025-03-24 lishin <lishin1008@gmail.com> + + * rust/compile/issue-2954.rs: New test. + +2025-03-24 Arthur Cohen <arthur.cohen@embecosm.com> + + * rust/compile/nr2/exclude: Some parts of nr2.0 can't handle auto traits yet. + * rust/compile/auto_traits3.rs: Removed in favor of... + * rust/compile/auto_traits2.rs: ...this one. + * rust/compile/auto_traits4.rs: New test. + +2025-03-24 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/unaligned-memcpy-4.c: Tighten scan-assembler-not + pattern. + +2025-03-24 Thomas Schwinge <tschwinge@baylibre.com> + + * gcc.target/nvptx/march-map=sm_30.c: Adjust. + * gcc.target/nvptx/march-map=sm_32.c: Likewise. + * gcc.target/nvptx/march-map=sm_35.c: Likewise. + * gcc.target/nvptx/march-map=sm_37.c: Likewise. + * gcc.target/nvptx/march-map=sm_50.c: Likewise. + * gcc.target/nvptx/march=sm_30.c: Likewise. + * gcc.target/nvptx/march=sm_35.c: Likewise. + * gcc.target/nvptx/march=sm_37.c: Likewise. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + * gcc.target/i386/avx10-check.h: Change to avx10.1. + * gcc.target/i386/avx10_1-1.c: Add warning check. + * gcc.target/i386/avx10_1-10.c: Ditto. + * gcc.target/i386/avx10_1-11.c: Ditto. + * gcc.target/i386/avx10_1-12.c: Ditto. + * gcc.target/i386/avx10_1-13.c: Ditto. + * gcc.target/i386/avx10_1-15.c: Ditto. + * gcc.target/i386/avx10_1-16.c: Ditto. + * gcc.target/i386/avx10_1-18.c: Ditto. + * gcc.target/i386/avx10_1-19.c: Ditto. + * gcc.target/i386/avx10_1-2.c: Ditto. + * gcc.target/i386/avx10_1-20.c: Ditto. + * gcc.target/i386/avx10_1-21.c: Ditto. + * gcc.target/i386/avx10_1-22.c: Ditto. + * gcc.target/i386/avx10_1-23.c: Ditto. + * gcc.target/i386/avx10_1-26.c: Ditto. + * gcc.target/i386/avx10_1-3.c: Ditto. + * gcc.target/i386/avx10_1-4.c: Ditto. + * gcc.target/i386/avx10_1-7.c: Ditto. + * gcc.target/i386/avx10_1-8.c: Ditto. + * gcc.target/i386/avx10_1-9.c: Ditto. + * gcc.target/i386/noevex512-1.c: Ditto. + * gcc.target/i386/noevex512-2.c: Ditto. + * gcc.target/i386/pr111068.c: Ditto. + * gcc.target/i386/pr111907.c: Ditto. + * gcc.target/i386/pr117240_avx512f.c: Ditto. + * gcc.target/i386/pr117304-1.c: Ditto. + * gcc.target/i386/pr117946.c: Ditto. + * gcc.target/i386/avx10_1-24.c: Removed. + * gcc.target/i386/avx10_1-25.c: Removed. + * gcc.target/i386/avx10_1-5.c: Removed. + * gcc.target/i386/avx10_1-6.c: Removed. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + * g++.dg/other/i386-2.C: Use -mavx10.2. + * g++.dg/other/i386-3.C: Ditto. + * gcc.target/i386/avx-1.c: Ditto. + * gcc.target/i386/avx10_2-512-bf16-1.c: Ditto. + * gcc.target/i386/avx10_2-512-bf16-vector-cmp-1.c: Ditto. + * gcc.target/i386/avx10_2-512-bf16-vector-fma-1.c: Ditto. + * gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c: Ditto. + * gcc.target/i386/avx10_2-512-bf16-vector-smaxmin-1.c: Ditto. + * gcc.target/i386/avx10_2-512-convert-1.c: Ditto. + * gcc.target/i386/avx10_2-512-media-1.c: Ditto. + * gcc.target/i386/avx10_2-512-minmax-1.c: Ditto. + * gcc.target/i386/avx10_2-512-movrs-1.c: Ditto. + * gcc.target/i386/avx10_2-512-satcvt-1.c: Ditto. + * gcc.target/i386/avx10_2-512-vaddbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcmpbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvt2ph2bf8-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvt2ph2hf8-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvthf82ph-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtph2bf8-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtph2hf8-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vdivbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vdpphps-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vfmaddXXXbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vfmsubXXXbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vfnmaddXXXbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vfnmsubXXXbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vfpclassbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vgetexpbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vgetmantbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vmaxbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vminbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vminmaxbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vminmaxpd-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vminmaxph-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vminmaxps-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vmpsadbw-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vmulbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpbssd-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpbssds-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpbsud-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpbsuds-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpbuud-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpbuuds-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpwsud-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpwsuds-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpwusd-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpwusds-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpwuud-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vpdpwuuds-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vrcpbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vreducebf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vrndscalebf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vrsqrtbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vscalefbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vsqrtbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vsubbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-bf16-1.c: Ditto. + * gcc.target/i386/avx10_2-bf16-vector-cmp-1.c: Ditto. + * gcc.target/i386/avx10_2-bf16-vector-fma-1.c: Ditto. + * gcc.target/i386/avx10_2-bf16-vector-operations-1.c: Ditto. + * gcc.target/i386/avx10_2-bf16-vector-smaxmin-1.c: Ditto. + * gcc.target/i386/avx10_2-builtin-1.c: Ditto. + * gcc.target/i386/avx10_2-builtin-2.c: Ditto. + * gcc.target/i386/avx10_2-comibf-1.c: Ditto. + * gcc.target/i386/avx10_2-comibf-2.c: Ditto. + * gcc.target/i386/avx10_2-comibf-3.c: Ditto. + * gcc.target/i386/avx10_2-comibf-4.c: Ditto. + * gcc.target/i386/avx10_2-compare-1.c: Ditto. + * gcc.target/i386/avx10_2-compare-1b.c: Ditto. + * gcc.target/i386/avx10_2-convert-1.c: Ditto. + * gcc.target/i386/avx10_2-media-1.c: Ditto. + * gcc.target/i386/avx10_2-minmax-1.c: Ditto. + * gcc.target/i386/avx10_2-movrs-1.c: Ditto. + * gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c: Ditto. + * gcc.target/i386/avx10_2-partial-bf16-vector-fma-1.c: Ditto. + * gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c: Ditto. + * gcc.target/i386/avx10_2-partial-bf16-vector-smaxmin-1.c: Ditto. + * gcc.target/i386/avx10_2-satcvt-1.c: Ditto. + * gcc.target/i386/avx10_2-vaddbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vcmpbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vcomisbf16-1.c: Ditto. + * gcc.target/i386/avx10_2-vcomisbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvt2ph2bf8-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvt2ph2bf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvt2ph2hf8-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvt2ph2hf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvt2ps2phx-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtbf162ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtbf162iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtbiasph2bf8-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtbiasph2bf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtbiasph2hf8-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtbiasph2hf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvthf82ph-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtph2bf8-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtph2bf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtph2hf8-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtph2hf8s-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtph2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtph2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtps2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvtps2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttbf162ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttbf162iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttpd2dqs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttpd2qqs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttpd2udqs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttpd2uqqs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttph2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttph2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttps2dqs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttps2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttps2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttps2qqs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttps2udqs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttps2uqqs-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttsd2sis-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttsd2usis-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttss2sis-2.c: Ditto. + * gcc.target/i386/avx10_2-vcvttss2usis-2.c: Ditto. + * gcc.target/i386/avx10_2-vdivbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vdpphps-2.c: Ditto. + * gcc.target/i386/avx10_2-vfmaddXXXbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vfmsubXXXbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vfnmaddXXXbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vfnmsubXXXbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vfpclassbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vgetexpbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vgetmantbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vmaxbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vminbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vminmaxbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vminmaxpd-2.c: Ditto. + * gcc.target/i386/avx10_2-vminmaxph-2.c: Ditto. + * gcc.target/i386/avx10_2-vminmaxps-2.c: Ditto. + * gcc.target/i386/avx10_2-vminmaxsd-2.c: Ditto. + * gcc.target/i386/avx10_2-vminmaxsh-2.c: Ditto. + * gcc.target/i386/avx10_2-vminmaxss-2.c: Ditto. + * gcc.target/i386/avx10_2-vmovd-1.c: Ditto. + * gcc.target/i386/avx10_2-vmovd-2.c: Ditto. + * gcc.target/i386/avx10_2-vmovw-1.c: Ditto. + * gcc.target/i386/avx10_2-vmovw-2.c: Ditto. + * gcc.target/i386/avx10_2-vmpsadbw-2.c: Ditto. + * gcc.target/i386/avx10_2-vmulbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpbssd-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpbssds-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpbsud-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpbsuds-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpbuud-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpbuuds-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpwsud-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpwsuds-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpwusd-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpwusds-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpwuud-2.c: Ditto. + * gcc.target/i386/avx10_2-vpdpwuuds-2.c: Ditto. + * gcc.target/i386/avx10_2-vrcpbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vreducebf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vrndscalebf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vrsqrtbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vscalefbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vsqrtbf16-2.c: Ditto. + * gcc.target/i386/avx10_2-vsubbf16-2.c: Ditto. + * gcc.target/i386/funcspec-56.inc: Ditto. + * gcc.target/i386/part-vect-vec_cmpbf.c: Ditto. + * gcc.target/i386/pr117495.c: Ditto. + * gcc.target/i386/pr118815.c: Ditto. + * gcc.target/i386/sm4-avx10_2-1.c: Ditto. + * gcc.target/i386/sm4-avx10_2-512-1.c: Ditto. + * gcc.target/i386/sm4key4-avx10_2-512-2.c: Ditto. + * gcc.target/i386/sm4rnds4-avx10_2-512-2.c: Ditto. + * gcc.target/i386/sse-12.c: Ditto. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Ditto. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/vnniint16-auto-vectorize-3.c: Ditto. + * gcc.target/i386/vnniint16-auto-vectorize-4.c: Ditto. + * gcc.target/i386/vnniint8-auto-vectorize-3.c: Ditto. + * gcc.target/i386/vnniint8-auto-vectorize-4.c: Ditto. + * gcc.target/i386/avx10-check.h: Remove avx10.2-512 and + use avx10.2. + * gcc.target/i386/sm4-check.h: Ditto. + * lib/target-supports.exp: Ditto. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add -mavx10.2 and new builtin test. + * gcc.target/i386/avx-2.c: Ditto. + * gcc.target/i386/sse-13.c: Add new tests. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Ditto. + * gcc.target/i386/avx10_2-rounding-1.c: New test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/sse-14.c: Add new macro test. + * gcc.target/i386/sse-22.c: Ditto. + * gcc.target/i386/avx10_2-rounding-1.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/sse-14.c: Add new macro test. + * gcc.target/i386/sse-22.c: Ditto. + * gcc.target/i386/avx10_2-rounding-1.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-1.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-1.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-1.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-2.c: New test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-2.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-2.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: New test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: New test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: New test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + Revert: + 2025-03-24 Hu, Lin1 <lin1.hu@intel.com> + + * gcc.target/i386/avx-1.c: Add new builtin test. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Add new macro test. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/avx10_2-rounding-3.c: Add test. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + * gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c: Adjust condition + for rounding test. + * gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c: Ditto. + * gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c: Ditto. + * gcc.target/i386/avx-1.c: Remove rounding tests. + * gcc.target/i386/avx10_2-satcvt-1.c: Ditto. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Ditto. + * gcc.target/i386/sse-23.c: Ditto. + +2025-03-24 Haochen Jiang <haochen.jiang@intel.com> + + * gcc.target/i386/avx-1.c: Remove rounding tests. + * gcc.target/i386/avx10_2-convert-1.c: Ditto. + * gcc.target/i386/avx10_2-minmax-1.c: Ditto. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-14.c: Ditto. + * gcc.target/i386/sse-22.c: Ditto. + * gcc.target/i386/sse-23.c: Ditto. + +2025-03-23 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/119154 + * g++.dg/modules/pr119154_a.C: Move to... + * g++.dg/modules/gnu-inline-1_a.C: ...here, and add decl. + * g++.dg/modules/pr119154_b.C: Move to... + * g++.dg/modules/gnu-inline-1_b.C: here, and add check. + * g++.dg/modules/gnu-inline-1_c.C: New test. + * g++.dg/modules/gnu-inline-1_d.C: New test. + * g++.dg/modules/gnu-inline-2_a.C: New test. + * g++.dg/modules/gnu-inline-2_b.C: New test. + * g++.dg/modules/extern-tpl-3_a.C: New test. + * g++.dg/modules/extern-tpl-3_b.C: New test. + * g++.dg/modules/extern-tpl-4_a.H: New test. + * g++.dg/modules/extern-tpl-4_b.C: New test. + * g++.dg/modules/extern-tpl-4_c.C: New test. + +2025-03-23 Iain Buclaw <ibuclaw@gdcproject.org> + + PR d/117621 + * gdc.dg/pr117621.d: New test. + +2025-03-22 Georg-Johann Lay <avr@gjlay.de> + + PR target/119421 + * gcc.target/avr/torture/pr119421-sreg.c: New test. + +2025-03-22 Patrick Palka <ppalka@redhat.com> + + PR c++/119379 + * g++.dg/cpp2a/class-deduction-alias24.C: New test. + 2025-03-21 Surya Kumari Jangala <jskumari@linux.ibm.com> Jakub Jelinek <jakub@redhat.com> diff --git a/gcc/testsuite/c-c++-common/goacc/pr69916.c b/gcc/testsuite/c-c++-common/goacc/pr69916.c index e037af34..5c46bb7 100644 --- a/gcc/testsuite/c-c++-common/goacc/pr69916.c +++ b/gcc/testsuite/c-c++-common/goacc/pr69916.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-O2" } */ +/* { dg-additional-options "-O2" } */ /* PR 69916, an loop determined to be empty sometime after omp-lower and before oacc-device-lower can evaporate leading to no GOACC_LOOP diff --git a/gcc/testsuite/c-c++-common/gomp/append-args-1.c b/gcc/testsuite/c-c++-common/gomp/append-args-1.c index 2a47063..e03b8de 100644 --- a/gcc/testsuite/c-c++-common/gomp/append-args-1.c +++ b/gcc/testsuite/c-c++-common/gomp/append-args-1.c @@ -23,25 +23,19 @@ float base0(); float repl1(omp_interop_t, omp_interop_t); #pragma omp declare variant(repl1) match(construct={dispatch}) append_args(interop(target), interop(targetsync)) float base1(); -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'repl1', except when specifying all 2 objects in the 'interop' clause of the 'dispatch' directive" "" { target c } .-2 } */ -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'float repl1\\(omp_interop_t, omp_interop_t\\)', except when specifying all 2 objects in the 'interop' clause of the 'dispatch' directive" "" { target c++ } .-3 } */ void repl2(int *, int *, omp_interop_t, omp_interop_t); #pragma omp declare variant(repl2) match(construct={dispatch}) adjust_args(need_device_ptr : y) \ append_args(interop(target, targetsync, prefer_type(1)), \ interop(prefer_type({fr(3), attr("ompx_nop")},{fr(2)},{attr("ompx_all")}))) void base2(int *x, int *y); -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'repl2', except when specifying all 2 objects in the 'interop' clause of the 'dispatch' directive" "" { target c } .-3 } */ -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'void repl2\\(int\\*, int\\*, omp_interop_t, omp_interop_t\\)', except when specifying all 2 objects in the 'interop' clause of the 'dispatch' directive" "" { target c++ } .-4 } */ void repl3(int, omp_interop_t, ...); #pragma omp declare variant(repl3) match(construct={dispatch}) \ append_args(interop(prefer_type("cuda", "hsa"))) void base3(int, ...); -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'repl3', except when specifying all 1 objects in the 'interop' clause of the 'dispatch' directive" "" { target c } .-2 } */ -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'void repl3\\(int, omp_interop_t, \\.\\.\\.\\)', except when specifying all 1 objects in the 'interop' clause of the 'dispatch' directive" "" { target c++ } .-3 } */ -/* { dg-note "'declare variant' candidate 'repl3' declared here" "" { target c } .-4 } */ -/* { dg-note "'declare variant' candidate 'void repl3\\(int, omp_interop_t, \\.\\.\\.\\)' declared here" "" { target c++ } .-5 } */ +/* { dg-note "'declare variant' candidate 'repl3' declared here" "" { target c } .-2 } */ +/* { dg-note "'declare variant' candidate 'void repl3\\(int, omp_interop_t, \\.\\.\\.\\)' declared here" "" { target c++ } .-3 } */ float repl4(short, short, omp_interop_t, short); #pragma omp declare variant(repl4) match(construct={dispatch}) append_args(interop(target)) append_args(interop(targetsync)) /* { dg-error "too many 'append_args' clauses" } */ @@ -75,15 +69,12 @@ test (int *a, int *b) #pragma omp dispatch interop ( obj1 ) x = base1 (); - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-2 } */ #pragma omp dispatch interop ( obj1 ) base2 (a, b); - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-2 } */ #pragma omp dispatch base3 (5, 1, 2, 3); - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-2 } */ #pragma omp dispatch interop (obj2) base3 (5, 1, 2, 3); @@ -92,7 +83,6 @@ test (int *a, int *b) base3 (5, 1, 2, 3); /* { dg-error "number of list items in 'interop' clause \\(2\\) exceeds the number of 'append_args' items \\(1\\) for 'declare variant' candidate 'repl3'" "" { target c } .-2 } */ /* { dg-error "number of list items in 'interop' clause \\(2\\) exceeds the number of 'append_args' items \\(1\\) for 'declare variant' candidate 'void repl3\\(int, omp_interop_t, \\.\\.\\.\\)'" "" { target c++ } .-3 } */ - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-4 } */ return x; } diff --git a/gcc/testsuite/c-c++-common/gomp/append-args-interop.c b/gcc/testsuite/c-c++-common/gomp/append-args-interop.c new file mode 100644 index 0000000..1211450 --- /dev/null +++ b/gcc/testsuite/c-c++-common/gomp/append-args-interop.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-fdump-tree-gimple" } */ + +/* Test that interop objects are implicitly created/destroyed when a dispatch + construct doesn't provide enough of them to satisfy the declare variant + append_args clause. */ + +/* The following definitions are in omp_lib, which cannot be included + in gcc/testsuite/ */ + +#if __cplusplus >= 201103L +# define __GOMP_UINTPTR_T_ENUM : __UINTPTR_TYPE__ +#else +# define __GOMP_UINTPTR_T_ENUM +#endif + +typedef enum omp_interop_t __GOMP_UINTPTR_T_ENUM +{ + omp_interop_none = 0, + __omp_interop_t_max__ = __UINTPTR_MAX__ +} omp_interop_t; + +float repl1(omp_interop_t, omp_interop_t, omp_interop_t); + +#pragma omp declare variant(repl1) match(construct={dispatch}) append_args(interop(target), interop(targetsync), interop (target)) +float base1(void); + +float +test (int *a, int *b) +{ + omp_interop_t obj1; + float x; + + /* repl1 takes 3 interop arguments, one will come from the dispatch + construct and the other 2 will be consed up. */ + #pragma omp dispatch interop ( obj1 ) + x = base1 (); + + return x; +} + +/* { dg-final { scan-tree-dump "__builtin_GOMP_interop \\(D\.\[0-9\]+, 2, interopobjs\.\[0-9\]+, tgt_tgtsync\.\[0-9\]+," "gimple" } } */ +/* { dg-final { scan-tree-dump "__builtin_GOMP_interop \\(D\.\[0-9\]+, 0, 0B, 0B, 0B, 0, 0B, 2, interopobjs\.\[0-9\]+," "gimple" } } */ +/* { dg-final { scan-tree-dump "repl1 \\(obj1, interop\.\[0-9\]+, interop\.\[0-9\]+\\)" "gimple" } } */ diff --git a/gcc/testsuite/c-c++-common/gomp/dispatch-11.c b/gcc/testsuite/c-c++-common/gomp/dispatch-11.c index e59985a..79dcd0a 100644 --- a/gcc/testsuite/c-c++-common/gomp/dispatch-11.c +++ b/gcc/testsuite/c-c++-common/gomp/dispatch-11.c @@ -87,12 +87,9 @@ test (int *a, int *b) base3 (a, b); /* { dg-error "number of list items in 'interop' clause \\(2\\) exceeds the number of 'append_args' items \\(1\\) for 'declare variant' candidate 'repl3'" "" { target c } .-2 } */ /* { dg-error "number of list items in 'interop' clause \\(2\\) exceeds the number of 'append_args' items \\(1\\) for 'declare variant' candidate 'void repl3\\(int\\*, int\\*, omp_interop_t\\)'" "" { target c++ } .-3 } */ - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-4 } */ #pragma omp dispatch interop(obj3) base3 (a, b); - /* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'repl3'" "" { target c } 28 } */ - /* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'void repl3\\(int\\*, int\\*, omp_interop_t\\)'" "" { target c++ } 28 } */ return x + y; } diff --git a/gcc/testsuite/c-c++-common/gomp/metadirective-device.c b/gcc/testsuite/c-c++-common/gomp/metadirective-device.c index 3807624..d7f736d 100644 --- a/gcc/testsuite/c-c++-common/gomp/metadirective-device.c +++ b/gcc/testsuite/c-c++-common/gomp/metadirective-device.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-additional-options "-foffload=disable -fdump-tree-optimized" } */ -/* { dg-additional-options "-DDEVICE_ARCH=x86_64 -DDEVICE_ISA=sse -msse" { target { x86_64-*-* && { ! ia32 } } } } */ +/* { dg-additional-options "-DDEVICE_ARCH=x86_64 -DDEVICE_ISA=sse -msse" { target { x86 && lp64 } } } */ #include <stdlib.h> diff --git a/gcc/testsuite/c-c++-common/gomp/metadirective-target-device-1.c b/gcc/testsuite/c-c++-common/gomp/metadirective-target-device-1.c index 5d3a4c3..284f35f 100644 --- a/gcc/testsuite/c-c++-common/gomp/metadirective-target-device-1.c +++ b/gcc/testsuite/c-c++-common/gomp/metadirective-target-device-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-additional-options "-fdump-tree-optimized" } */ -/* { dg-additional-options "-DDEVICE_ARCH=x86_64 -DDEVICE_ISA=mmx -mmmx" { target { x86_64-*-* && { ! ia32 } } } } */ +/* { dg-additional-options "-DDEVICE_ARCH=x86_64 -DDEVICE_ISA=mmx -mmmx" { target { x86 && lp64 } } } */ #include <stdlib.h> diff --git a/gcc/testsuite/c-c++-common/gomp/metadirective-target-device-2.c b/gcc/testsuite/c-c++-common/gomp/metadirective-target-device-2.c index 24584f2..4de1921 100644 --- a/gcc/testsuite/c-c++-common/gomp/metadirective-target-device-2.c +++ b/gcc/testsuite/c-c++-common/gomp/metadirective-target-device-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-additional-options "-fdump-tree-optimized" } */ /* In configurations without offloading configured, we can resolve many diff --git a/gcc/testsuite/c-c++-common/pr118442.c b/gcc/testsuite/c-c++-common/pr118442.c new file mode 100644 index 0000000..2472aa6 --- /dev/null +++ b/gcc/testsuite/c-c++-common/pr118442.c @@ -0,0 +1,17 @@ +/* PR118442 */ +/* { dg-do compile { target { struct_musttail && { external_musttail && { c || c++11 } } } } } */ +/* { dg-options "-fprofile-generate -O2" } */ +/* { dg-require-profiling "-fprofile-generate" } */ + +struct Span { + int test[5]; +}; + +extern void resolveToBufferSlow (struct Span *buffer); + +void +resolveToBuffer (struct Span *buffer) +{ + buffer->test[0] = 4; + [[clang::musttail]] return resolveToBufferSlow (buffer); +} diff --git a/gcc/testsuite/c-c++-common/pr119483-1.c b/gcc/testsuite/c-c++-common/pr119483-1.c new file mode 100644 index 0000000..b2d7b57 --- /dev/null +++ b/gcc/testsuite/c-c++-common/pr119483-1.c @@ -0,0 +1,29 @@ +/* PR tree-optimization/119483 */ +/* { dg-do compile { target musttail } } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times "bar\[.a-z0-9]* \\\(\[^\n\r]*\\\); \\\[tail call\\\] \\\[must tail call\\\]" 1 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "baz \\\(\[^\n\r]*\\\); \\\[tail call\\\] \\\[must tail call\\\]" 1 "optimized" } } */ + +[[gnu::noreturn]] extern void foo (void); + +[[gnu::noinline]] static int +bar (int x) +{ + (void) x; + foo (); + return 0; +} + +[[gnu::noipa]] int +baz (int x) +{ + return x + 42; +} + +int +qux (int x) +{ + if (x == 1) + [[gnu::musttail]] return bar (1); + [[gnu::musttail]] return baz (x); +} diff --git a/gcc/testsuite/c-c++-common/pr119483-2.c b/gcc/testsuite/c-c++-common/pr119483-2.c new file mode 100644 index 0000000..e7b692d --- /dev/null +++ b/gcc/testsuite/c-c++-common/pr119483-2.c @@ -0,0 +1,12 @@ +/* PR tree-optimization/119483 */ +/* { dg-do compile { target musttail } } */ +/* { dg-options "-O2" } */ + +[[noreturn]] int +foo (int x) +{ + if (x > 10) + [[gnu::musttail]] return foo (x - 1); /* { dg-warning "function declared 'noreturn' has a 'return' statement" } */ + for (;;) + ; +} diff --git a/gcc/testsuite/c-c++-common/pr119484.c b/gcc/testsuite/c-c++-common/pr119484.c new file mode 100644 index 0000000..6ae7c9a --- /dev/null +++ b/gcc/testsuite/c-c++-common/pr119484.c @@ -0,0 +1,21 @@ +/* PR ipa/119484 */ +/* { dg-do compile { target musttail } } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times "bar\[.a-z0-9]* \\\(\[^\n\r]*\\\); \\\[tail call\\\] \\\[must tail call\\\]" 1 "optimized" } } */ + +void foo (int); + +[[gnu::noinline]] static int +bar (int x) +{ + foo (x); + return 0; +} + +int +baz (int x) +{ + if (x == 1) + [[gnu::musttail]] return bar (x); + return 0; +} diff --git a/gcc/testsuite/cobol.dg/data1.cob b/gcc/testsuite/cobol.dg/data1.cob new file mode 100644 index 0000000..5830195 --- /dev/null +++ b/gcc/testsuite/cobol.dg/data1.cob @@ -0,0 +1,14 @@ +*> { dg-do run } +*> { dg-output {1.2345678E\+07(\n|\r\n|\r)} } +*> { dg-output {1.2345678E\+07(\n|\r\n|\r)} } + IDENTIFICATION DIVISION. + PROGRAM-ID. data1. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 FLOATLONG FLOAT-LONG VALUE 12345678. + 01 FLOATEXT FLOAT-EXTENDED VALUE 12345678. + PROCEDURE DIVISION. + DISPLAY FLOATLONG + DISPLAY FLOATEXT + GOBACK. + END PROGRAM data1. diff --git a/gcc/testsuite/cobol.dg/group2/ACCEPT_DATE___DAY_and_intrinsic_functions__1_.cob b/gcc/testsuite/cobol.dg/group2/ACCEPT_DATE___DAY_and_intrinsic_functions__1_.cob new file mode 100644 index 0000000..69eb283 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/ACCEPT_DATE___DAY_and_intrinsic_functions__1_.cob @@ -0,0 +1,30 @@ + *> { dg-do run } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + *> one byte longer to make sure there is no garbage in + 01 WS-YYYYMMDD PIC 9(9). + 01 WS-YYYYDDD PIC 9(8). + PROCEDURE DIVISION. + ACCEPT WS-YYYYMMDD FROM DATE YYYYMMDD + END-ACCEPT + ACCEPT WS-YYYYDDD FROM DAY YYYYDDD + END-ACCEPT + IF FUNCTION INTEGER-OF-DATE (WS-YYYYMMDD) + NOT = FUNCTION INTEGER-OF-DAY (WS-YYYYDDD) + DISPLAY "DIFFERENCES FOUND!" + END-DISPLAY + DISPLAY "YYYYMMDD = " WS-YYYYMMDD ", " + "YYYYDDD = " WS-YYYYDDD + END-DISPLAY + DISPLAY "INTEGER-OF-DATE = " + FUNCTION INTEGER-OF-DATE (WS-YYYYMMDD) ", " + "INTEGER-OF-DAY = " + FUNCTION INTEGER-OF-DAY (WS-YYYYDDD) + END-DISPLAY + MOVE 1 TO RETURN-CODE + END-IF + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/ACCEPT_DATE___DAY_and_intrinsic_functions__2_.cob b/gcc/testsuite/cobol.dg/group2/ACCEPT_DATE___DAY_and_intrinsic_functions__2_.cob new file mode 100644 index 0000000..7a404fd --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/ACCEPT_DATE___DAY_and_intrinsic_functions__2_.cob @@ -0,0 +1,31 @@ + *> { dg-do run } + *> { dg-set-target-env-var COB_CURRENT_DATE "2020/06/12 18:45:22" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + *> one byte longer to make sure there is no garbage in + 01 WS-YYYYMMDD PIC 9(9). + 01 WS-YYYYDDD PIC 9(8). + PROCEDURE DIVISION. + ACCEPT WS-YYYYMMDD FROM DATE YYYYMMDD + END-ACCEPT + ACCEPT WS-YYYYDDD FROM DAY YYYYDDD + END-ACCEPT + IF FUNCTION INTEGER-OF-DATE (WS-YYYYMMDD) + NOT = FUNCTION INTEGER-OF-DAY (WS-YYYYDDD) + DISPLAY "DIFFERENCES FOUND!" + END-DISPLAY + DISPLAY "YYYYMMDD = " WS-YYYYMMDD ", " + "YYYYDDD = " WS-YYYYDDD + END-DISPLAY + DISPLAY "INTEGER-OF-DATE = " + FUNCTION INTEGER-OF-DATE (WS-YYYYMMDD) ", " + "INTEGER-OF-DAY = " + FUNCTION INTEGER-OF-DAY (WS-YYYYDDD) + END-DISPLAY + MOVE 1 TO RETURN-CODE + END-IF + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__1_.cob b/gcc/testsuite/cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__1_.cob new file mode 100644 index 0000000..6c1e479 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__1_.cob @@ -0,0 +1,58 @@ + *> { dg-do run } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + *> one byte longer to make sure there is no garbage in + 01 X PIC X(9). + PROCEDURE DIVISION. + ACCEPT X FROM TIME + END-ACCEPT + IF X (1:2) >= "00" AND <= "23" AND + X (3:2) >= "00" AND <= "59" AND + X (5:2) >= "00" AND <= "60" AND + X (7:2) >= "00" AND <= "99" AND + X (9: ) = SPACE + CONTINUE + ELSE + DISPLAY "TIME " X "!" + END-DISPLAY + END-IF + ACCEPT X FROM DATE + END-ACCEPT + INSPECT X CONVERTING "012345678" TO "999999999" + IF X NOT = "999999" + DISPLAY "DATE " X "!" + END-DISPLAY + END-IF + ACCEPT X FROM DATE YYYYMMDD + END-ACCEPT + INSPECT X CONVERTING "012345678" TO "999999999" + IF X NOT = "99999999" + DISPLAY "YYYYMMDD " X "!" + END-DISPLAY + END-IF + ACCEPT X FROM DAY + END-ACCEPT + INSPECT X CONVERTING "012345678" TO "999999999" + IF X NOT = "99999" + DISPLAY "DAY " X "!" + END-DISPLAY + END-IF + ACCEPT X FROM DAY YYYYDDD + END-ACCEPT + INSPECT X CONVERTING "012345678" TO "999999999" + IF X NOT = "9999999" + DISPLAY "YYYYDDD " X "!" + END-DISPLAY + END-IF + ACCEPT X FROM DAY-OF-WEEK + END-ACCEPT + INSPECT X CONVERTING "1234567" TO "9999999" + IF X NOT = "9" + DISPLAY "DAY-OF-WEEK " X "!" + END-DISPLAY + END-IF + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__2_.cob b/gcc/testsuite/cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__2_.cob new file mode 100644 index 0000000..6014220 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__2_.cob @@ -0,0 +1,74 @@ + *> { dg-do run } + *> { dg-set-target-env-var COB_CURRENT_DATE "2015/04/05 18:45:22" } + *> { dg-output-file "group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__2_.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + *> one byte longer to make sure there is no garbage in + 01 WS-YYYYMMDD PIC X(9). + 01 WS-YYYYDDD PIC X(8). + 01 WS-DAYOFWEEK PIC X(2). + 01 WS-DATE-TODAY. + 05 WS-TODAYS-YY PIC 9(02) VALUE 0. + 05 WS-TODAYS-MM PIC 9(02) VALUE 0. + 05 WS-TODAYS-DD PIC 9(02) VALUE 0. + + 01 WS-DATE. + 05 WS-DATE-MM PIC 9(02) VALUE 0. + 05 FILLER PIC X(01) VALUE '/'. + 05 WS-DATE-DD PIC 9(02) VALUE 0. + 05 FILLER PIC X(01) VALUE '/'. + 05 WS-DATE-YY PIC 9(02) VALUE 0. + + 01 WS-TIME-NOW. + 05 WS-NOW-HH PIC 9(02) VALUE 0. + 05 WS-NOW-MM PIC 9(02) VALUE 0. + 05 WS-NOW-SS PIC 9(02) VALUE 0. + 05 WS-NOW-HS PIC 9(02) VALUE 0. + + 01 WS-TIME. + 05 WS-TIME-HH PIC 9(02) VALUE 0. + 05 FILLER PIC X(01) VALUE ':'. + 05 WS-TIME-MM PIC 9(02) VALUE 0. + 05 FILLER PIC X(01) VALUE ':'. + 05 WS-TIME-SS PIC 9(02) VALUE 0. + + PROCEDURE DIVISION. + ACCEPT WS-DATE-TODAY FROM DATE + ACCEPT WS-TIME-NOW FROM TIME + MOVE WS-TODAYS-YY TO WS-DATE-YY + MOVE WS-TODAYS-MM TO WS-DATE-MM + MOVE WS-TODAYS-DD TO WS-DATE-DD + MOVE WS-NOW-HH TO WS-TIME-HH + MOVE WS-NOW-MM TO WS-TIME-MM + MOVE WS-NOW-SS TO WS-TIME-SS + DISPLAY 'PROCESS DATE/TIME : ' WS-DATE SPACE WS-TIME + END-DISPLAY + ACCEPT WS-YYYYMMDD FROM DATE YYYYMMDD + DISPLAY WS-YYYYMMDD(1:8) + IF WS-YYYYMMDD not = "20150405" + DISPLAY 'Wrong date DATE YYYYMMDD: ' WS-YYYYMMDD + ' expected: 20150405' + UPON STDERR + END-DISPLAY + END-IF + ACCEPT WS-YYYYDDD FROM DAY YYYYDDD + DISPLAY WS-YYYYDDD(1:7) + IF WS-YYYYDDD not = "2015095" + DISPLAY 'Wrong date YYYYDDD: ' WS-YYYYDDD + ' expected: 2015095' + UPON STDERR + END-DISPLAY + END-IF + ACCEPT WS-DAYOFWEEK FROM DAY-OF-WEEK + DISPLAY WS-DAYOFWEEK(1:1) + IF WS-DAYOFWEEK not = "7" + DISPLAY 'Wrong date DAYOFWEEK: ' WS-DAYOFWEEK + ' expected: 7' + UPON STDERR + END-DISPLAY + END-IF + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__2_.out b/gcc/testsuite/cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__2_.out new file mode 100644 index 0000000..a6ac8c4 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/ACCEPT_FROM_TIME___DATE___DAY___DAY-OF-WEEK__2_.out @@ -0,0 +1,5 @@ +PROCESS DATE/TIME : 04/05/15 18:45:22 +20150405 +2015095 +7 + diff --git a/gcc/testsuite/cobol.dg/group2/COMP-6_arithmetic.cob b/gcc/testsuite/cobol.dg/group2/COMP-6_arithmetic.cob new file mode 100644 index 0000000..6e8dc5c --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/COMP-6_arithmetic.cob @@ -0,0 +1,23 @@ + *> { dg-do run } + *> { dg-options "-dialect mf" } + *> { dg-output-file "group2/COMP-6_arithmetic.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 X-99 PIC 99 USAGE COMP-6. + 01 X-999 PIC 999 USAGE COMP-6. + 01 B-99 USAGE BINARY-LONG UNSIGNED. + 01 B-999 USAGE BINARY-LONG UNSIGNED. + PROCEDURE DIVISION. + MOVE 99 TO B-99 + MOVE B-99 TO X-99 + MOVE 123 TO B-999 + MOVE B-999 TO X-999 + ADD X-99 X-999 GIVING B-99 + END-ADD + DISPLAY B-99 + END-DISPLAY + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/COMP-6_arithmetic.out b/gcc/testsuite/cobol.dg/group2/COMP-6_arithmetic.out new file mode 100644 index 0000000..fce98b0 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/COMP-6_arithmetic.out @@ -0,0 +1,2 @@ +0000000222 + diff --git a/gcc/testsuite/cobol.dg/group2/COMP-6_numeric_test.cob b/gcc/testsuite/cobol.dg/group2/COMP-6_numeric_test.cob new file mode 100644 index 0000000..3628628 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/COMP-6_numeric_test.cob @@ -0,0 +1,75 @@ + *> { dg-do run } + *> { dg-options "-dialect mf" } + *> { dg-output-file "group2/COMP-6_numeric_test.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 G. + 02 X-2 PIC X(2). + 02 N-3 REDEFINES X-2 PIC 999 USAGE COMP-6. + 02 N-4 REDEFINES X-2 PIC 9999 USAGE COMP-6. + PROCEDURE DIVISION. + MOVE X"0000" TO X-2. + IF N-3 IS NUMERIC + DISPLAY "OK" + END-DISPLAY + ELSE + DISPLAY "1 NG" + END-DISPLAY + END-IF. + IF N-4 IS NUMERIC + DISPLAY "OK" + END-DISPLAY + ELSE + DISPLAY "2 NG" + END-DISPLAY + END-IF. + MOVE X"000c" TO X-2. + IF N-3 IS NUMERIC + DISPLAY "3 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + IF N-4 IS NUMERIC + DISPLAY "4 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + MOVE X"1234" TO X-2. + IF N-3 IS NUMERIC + DISPLAY "5 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + IF N-4 IS NUMERIC + DISPLAY "OK" + END-DISPLAY + ELSE + DISPLAY "6 NG" + END-DISPLAY + END-IF. + MOVE X"ffff" TO X-2. + IF N-3 IS NUMERIC + DISPLAY "7 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + IF N-4 IS NUMERIC + DISPLAY "7 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/COMP-6_numeric_test.out b/gcc/testsuite/cobol.dg/group2/COMP-6_numeric_test.out new file mode 100644 index 0000000..09117b6 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/COMP-6_numeric_test.out @@ -0,0 +1,9 @@ +OK +OK +OK +OK +OK +OK +OK +OK + diff --git a/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_DISPLAY.cob b/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_DISPLAY.cob new file mode 100644 index 0000000..33d048e --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_DISPLAY.cob @@ -0,0 +1,25 @@ + *> { dg-do run } + *> { dg-options "-dialect mf" } + *> { dg-output-file "group2/COMP-6_used_with_DISPLAY.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 X-99 PIC 99 USAGE COMP-6. + 01 X-999 PIC 999 USAGE COMP-6. + PROCEDURE DIVISION. + MOVE 0 TO X-99. + DISPLAY X-99 + END-DISPLAY. + MOVE 99 TO X-99. + DISPLAY X-99 + END-DISPLAY. + MOVE 0 TO X-999. + DISPLAY X-999 + END-DISPLAY. + MOVE 123 TO X-999. + DISPLAY X-999 + END-DISPLAY. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_DISPLAY.out b/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_DISPLAY.out new file mode 100644 index 0000000..901408e --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_DISPLAY.out @@ -0,0 +1,5 @@ +00 +99 +000 +123 + diff --git a/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_MOVE.cob b/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_MOVE.cob new file mode 100644 index 0000000..9f319fa --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_MOVE.cob @@ -0,0 +1,34 @@ + *> { dg-do run } + *> { dg-options "-dialect mf" } + *> { dg-output-file "group2/COMP-6_used_with_MOVE.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 X-99 PIC 99 USAGE COMP-6. + 01 X-999 PIC 999 USAGE COMP-6. + 01 B-99 USAGE BINARY-LONG. + 01 B-999 USAGE BINARY-LONG. + PROCEDURE DIVISION. + MOVE 0 TO B-99. + MOVE B-99 TO X-99. + DISPLAY X-99 + END-DISPLAY. + MOVE 99 TO B-99. + MOVE B-99 TO X-99. + DISPLAY X-99 + END-DISPLAY. + MOVE 0 TO B-999. + MOVE B-999 TO X-999. + DISPLAY X-999 + END-DISPLAY. + MOVE 123 TO B-999. + MOVE B-999 TO X-999. + DISPLAY X-999 + END-DISPLAY. + MOVE B-999 TO X-99. + DISPLAY X-99 + END-DISPLAY. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_MOVE.out b/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_MOVE.out new file mode 100644 index 0000000..19f3704 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/COMP-6_used_with_MOVE.out @@ -0,0 +1,6 @@ +00 +99 +000 +123 +23 + diff --git a/gcc/testsuite/cobol.dg/group2/COMPUTE_multiplication_to_FIX4.cob b/gcc/testsuite/cobol.dg/group2/COMPUTE_multiplication_to_FIX4.cob new file mode 100644 index 0000000..4ea8b35 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/COMPUTE_multiplication_to_FIX4.cob @@ -0,0 +1,154 @@ + *> { dg-do run } + *> { dg-output-file "group2/COMPUTE_multiplication_to_FIX4.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. onsize. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 FIX4DISPLAY PIC 9(4) DISPLAY. + 01 FIX8DISPLAY PIC 9(8) DISPLAY VALUE 12345678. + 01 FIX8BINARY PIC 9(8) BINARY VALUE 12345678. + 01 FIX8PACKED PIC 9(8) PACKED-DECIMAL VALUE 12345678. + 01 FIX8NUMEDT PIC 9(8).0 VALUE 12345678. + 01 FLOATSHORT FLOAT-SHORT VALUE 12345678. + 01 FLOATLONG FLOAT-LONG VALUE 12345678. + 01 FLOATEXT FLOAT-EXTENDED VALUE 12345678. + + PROCEDURE DIVISION. + + *> FIX8DISPLAY + DISPLAY "COMPUTE FIX4DISPLAY = FIX8DISPLAY without SIZE ERROR" + MOVE 9876 TO FIX4DISPLAY + COMPUTE FIX4DISPLAY = FIX8DISPLAY + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 5678" + DISPLAY "." + + DISPLAY "COMPUTE FIX4DISPLAY = FIX8DISPLAY with SIZE ERROR" + COMPUTE FIX4DISPLAY = FIX8DISPLAY + MOVE 9876 TO FIX4DISPLAY + COMPUTE FIX4DISPLAY = FIX8DISPLAY + ON SIZE ERROR Display "Proper size error" + NOT ON SIZE ERROR Display "Improper no error" + END-COMPUTE + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 9876" + DISPLAY "." + + *> FIX8BINARY + + DISPLAY "COMPUTE FIX4DISPLAY = FIX8BINARY without SIZE ERROR" + COMPUTE FIX4DISPLAY = FIX8BINARY + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 5678" + DISPLAY "." + + DISPLAY "COMPUTE FIX4DISPLAY = FIX8BINARY with SIZE ERROR" + COMPUTE FIX4DISPLAY = FIX8BINARY + MOVE 9876 TO FIX4DISPLAY + COMPUTE FIX4DISPLAY = FIX8BINARY + ON SIZE ERROR Display "Proper size error" + NOT ON SIZE ERROR Display "Improper no error" + END-COMPUTE + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 9876" + DISPLAY "." + + *> FIX8PACKED + + DISPLAY "COMPUTE FIX4DISPLAY = FIX8PACKED without SIZE ERROR" + COMPUTE FIX4DISPLAY = FIX8PACKED + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 5678" + DISPLAY "." + + DISPLAY "COMPUTE FIX4DISPLAY = FIX8PACKED with SIZE ERROR" + COMPUTE FIX4DISPLAY = FIX8PACKED + MOVE 9876 TO FIX4DISPLAY + COMPUTE FIX4DISPLAY = FIX8PACKED + ON SIZE ERROR Display "Proper size error" + NOT ON SIZE ERROR Display "Improper no error" + END-COMPUTE + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 9876" + DISPLAY "." + + *> FIX8NUMEDT + + DISPLAY "COMPUTE FIX4DISPLAY = FIX8NUMEDT without SIZE ERROR" + COMPUTE FIX4DISPLAY = FIX8NUMEDT + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 5678" + DISPLAY "." + + DISPLAY "COMPUTE FIX4DISPLAY = FIX8NUMEDT with SIZE ERROR" + COMPUTE FIX4DISPLAY = FIX8NUMEDT + MOVE 9876 TO FIX4DISPLAY + COMPUTE FIX4DISPLAY = FIX8NUMEDT + ON SIZE ERROR Display "Proper size error" + NOT ON SIZE ERROR Display "Improper no error" + END-COMPUTE + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 9876" + DISPLAY "." + + *> FLOATSHORT + + DISPLAY "COMPUTE FIX4DISPLAY = FLOATSHORT without SIZE ERROR" + COMPUTE FIX4DISPLAY = FLOATSHORT + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 5678" + DISPLAY "." + + DISPLAY "COMPUTE FIX4DISPLAY = FLOATSHORT with SIZE ERROR" + COMPUTE FIX4DISPLAY = FLOATSHORT + MOVE 9876 TO FIX4DISPLAY + COMPUTE FIX4DISPLAY = FLOATSHORT + ON SIZE ERROR Display "Proper size error" + NOT ON SIZE ERROR Display "Improper no error" + END-COMPUTE + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 9876" + DISPLAY "." + + *> FLOATLONG + + DISPLAY "COMPUTE FIX4DISPLAY = FLOATLONG without SIZE ERROR" + COMPUTE FIX4DISPLAY = FLOATLONG + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 5678" + DISPLAY "." + + DISPLAY "COMPUTE FIX4DISPLAY = FLOATLONG with SIZE ERROR" + COMPUTE FIX4DISPLAY = FLOATLONG + MOVE 9876 TO FIX4DISPLAY + COMPUTE FIX4DISPLAY = FLOATLONG + ON SIZE ERROR Display "Proper size error" + NOT ON SIZE ERROR Display "Improper no error" + END-COMPUTE + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 9876" + DISPLAY "." + + *> FLOATEXT + + DISPLAY "COMPUTE FIX4DISPLAY = FLOATEXT without SIZE ERROR" + COMPUTE FIX4DISPLAY = FLOATEXT + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 5678" + DISPLAY "." + + DISPLAY "COMPUTE FIX4DISPLAY = FLOATEXT with SIZE ERROR" + COMPUTE FIX4DISPLAY = FLOATEXT + MOVE 9876 TO FIX4DISPLAY + COMPUTE FIX4DISPLAY = FLOATEXT + ON SIZE ERROR Display "Proper size error" + NOT ON SIZE ERROR Display "Improper no error" + END-COMPUTE + DISPLAY "FIX4DISPLAY is " FIX4DISPLAY + DISPLAY "Should be 9876" + DISPLAY ".". + + STOP RUN. + END PROGRAM onsize. + diff --git a/gcc/testsuite/cobol.dg/group2/COMPUTE_multiplication_to_FIX4.out b/gcc/testsuite/cobol.dg/group2/COMPUTE_multiplication_to_FIX4.out new file mode 100644 index 0000000..8970a6c --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/COMPUTE_multiplication_to_FIX4.out @@ -0,0 +1,64 @@ +COMPUTE FIX4DISPLAY = FIX8DISPLAY without SIZE ERROR +FIX4DISPLAY is 5678 +Should be 5678 +. +COMPUTE FIX4DISPLAY = FIX8DISPLAY with SIZE ERROR +Proper size error +FIX4DISPLAY is 9876 +Should be 9876 +. +COMPUTE FIX4DISPLAY = FIX8BINARY without SIZE ERROR +FIX4DISPLAY is 5678 +Should be 5678 +. +COMPUTE FIX4DISPLAY = FIX8BINARY with SIZE ERROR +Proper size error +FIX4DISPLAY is 9876 +Should be 9876 +. +COMPUTE FIX4DISPLAY = FIX8PACKED without SIZE ERROR +FIX4DISPLAY is 5678 +Should be 5678 +. +COMPUTE FIX4DISPLAY = FIX8PACKED with SIZE ERROR +Proper size error +FIX4DISPLAY is 9876 +Should be 9876 +. +COMPUTE FIX4DISPLAY = FIX8NUMEDT without SIZE ERROR +FIX4DISPLAY is 5678 +Should be 5678 +. +COMPUTE FIX4DISPLAY = FIX8NUMEDT with SIZE ERROR +Proper size error +FIX4DISPLAY is 9876 +Should be 9876 +. +COMPUTE FIX4DISPLAY = FLOATSHORT without SIZE ERROR +FIX4DISPLAY is 5678 +Should be 5678 +. +COMPUTE FIX4DISPLAY = FLOATSHORT with SIZE ERROR +Proper size error +FIX4DISPLAY is 9876 +Should be 9876 +. +COMPUTE FIX4DISPLAY = FLOATLONG without SIZE ERROR +FIX4DISPLAY is 5678 +Should be 5678 +. +COMPUTE FIX4DISPLAY = FLOATLONG with SIZE ERROR +Proper size error +FIX4DISPLAY is 9876 +Should be 9876 +. +COMPUTE FIX4DISPLAY = FLOATEXT without SIZE ERROR +FIX4DISPLAY is 5678 +Should be 5678 +. +COMPUTE FIX4DISPLAY = FLOATEXT with SIZE ERROR +Proper size error +FIX4DISPLAY is 9876 +Should be 9876 +. + diff --git a/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__1_.cob b/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__1_.cob new file mode 100644 index 0000000..a070d16 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__1_.cob @@ -0,0 +1,46 @@ + *> { dg-do run } + *> { dg-output-file "group2/Complex_EVALUATE__1_.out" } + + identification division. + function-id. bumper. + data division. + working-storage section. + 77 bump pic 9999 value zero. + linkage section. + 77 bumped pic 9999. + procedure division returning bumped. + add 1 to bump. + move bump to bumped. + goback. + end function bumper. + + identification division. + program-id. prog. + environment division. + configuration section. + repository. + function bumper. + data division. + working-storage section. + 77 bump pic 9999 value zero. + 77 bump1 pic 9999 value zero. + 77 bump2 pic 9999 value zero. + 77 bump3 pic 9999 value zero. + procedure division. + move function bumper to bump + display bump + move function bumper to bump + display bump + move function bumper to bump + display bump + evaluate function bumper also function bumper also function bumper + when 4 also 5 also 6 + display "properly 4 also 5 also 6" + when 7 also 8 also 9 + display "IMPROPERLY 6 then 7 then 8" + when other + display "we don't know what's going on" + end-evaluate + goback. + end program prog. + diff --git a/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__1_.out b/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__1_.out new file mode 100644 index 0000000..d634a79 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__1_.out @@ -0,0 +1,5 @@ +0001 +0002 +0003 +properly 4 also 5 also 6 + diff --git a/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__2_.cob b/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__2_.cob new file mode 100644 index 0000000..0e88d74 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__2_.cob @@ -0,0 +1,52 @@ + *> { dg-do run } + *> { dg-output-file "group2/Complex_EVALUATE__2_.out" } + + identification division. + function-id. bumper. + data division. + working-storage section. + 77 bump pic 9999 value zero. + linkage section. + 77 bumped pic 9999. + procedure division returning bumped. + add 1 to bump. + move bump to bumped. + display " bumper is returning " bumped + goback. + end function bumper. + + identification division. + program-id. prog. + environment division. + configuration section. + repository. + function bumper. + data division. + working-storage section. + 77 bump pic 9999 value zero. + procedure division. + display " Prime the pump with three calls to bumper" + move function bumper to bump + move function bumper to bump + move function bumper to bump + display " Three calls to BUMPER should follow" + evaluate function bumper also function bumper also function bumper + when 4 also 5 also 6 + display "properly 4 also 5 also 6" + when 7 also 8 also 9 + display "IMPROPERLY 7 also 8 also 9" + when other + display "IMPROPERLY we don't know what's going on" + end-evaluate + display " Three more calls to BUMPER should follow" + evaluate function bumper also function bumper also function bumper + when 4 also 5 also 6 + display "IMPROPERLY 4 also 5 also 6" + when 7 also 8 also 9 + display "properly 7 also 8 also 9" + when other + display "IMPROPERLY we don't know what's going on" + end-evaluate + goback. + end program prog. + diff --git a/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__2_.out b/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__2_.out new file mode 100644 index 0000000..b0e9bdb --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Complex_EVALUATE__2_.out @@ -0,0 +1,15 @@ + Prime the pump with three calls to bumper + bumper is returning 0001 + bumper is returning 0002 + bumper is returning 0003 + Three calls to BUMPER should follow + bumper is returning 0004 + bumper is returning 0005 + bumper is returning 0006 +properly 4 also 5 also 6 + Three more calls to BUMPER should follow + bumper is returning 0007 + bumper is returning 0008 + bumper is returning 0009 +properly 7 also 8 also 9 + diff --git a/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII.cob b/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII.cob new file mode 100644 index 0000000..6225c20 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII.cob @@ -0,0 +1,40 @@ + *> { dg-do run } + *> { dg-output-file "group2/DISPLAY__Sign_ASCII.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 G. + 02 X PIC X(5). + 02 X-9 REDEFINES X PIC 9(4). + 02 X-S9 REDEFINES X PIC S9(4). + 02 X-S9-L REDEFINES X PIC S9(4) LEADING. + 02 X-S9-LS REDEFINES X PIC S9(4) LEADING SEPARATE. + 02 X-S9-T REDEFINES X PIC S9(4) TRAILING. + 02 X-S9-TS REDEFINES X PIC S9(4) TRAILING SEPARATE. + PROCEDURE DIVISION. + MOVE ZERO TO X. MOVE 1234 TO X-9. DISPLAY X + END-DISPLAY. + MOVE ZERO TO X. MOVE 1234 TO X-S9. DISPLAY X + END-DISPLAY. + MOVE ZERO TO X. MOVE -1234 TO X-S9. DISPLAY X + END-DISPLAY. + MOVE ZERO TO X. MOVE 1234 TO X-S9-L. DISPLAY X + END-DISPLAY. + MOVE ZERO TO X. MOVE -1234 TO X-S9-L. DISPLAY X + END-DISPLAY. + MOVE ZERO TO X. MOVE 1234 TO X-S9-LS. DISPLAY X + END-DISPLAY. + MOVE ZERO TO X. MOVE -1234 TO X-S9-LS. DISPLAY X + END-DISPLAY. + MOVE ZERO TO X. MOVE 1234 TO X-S9-T. DISPLAY X + END-DISPLAY. + MOVE ZERO TO X. MOVE -1234 TO X-S9-T. DISPLAY X + END-DISPLAY. + MOVE ZERO TO X. MOVE 1234 TO X-S9-TS. DISPLAY X + END-DISPLAY. + MOVE ZERO TO X. MOVE -1234 TO X-S9-TS. DISPLAY X + END-DISPLAY. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII.out b/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII.out new file mode 100644 index 0000000..bda63c7 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII.out @@ -0,0 +1,12 @@ +12340 +12340 +123t0 +12340 +q2340 ++1234 +-1234 +12340 +123t0 +1234+ +1234- + diff --git a/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII__2_.cob b/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII__2_.cob new file mode 100644 index 0000000..585e60c --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII__2_.cob @@ -0,0 +1,38 @@ + *> { dg-do run } + *> { dg-output-file "group2/DISPLAY__Sign_ASCII__2_.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 G. + 02 X PIC X(10). + 02 X-S99 REDEFINES X PIC S99. + 02 X-S9 REDEFINES X PIC S9 OCCURS 10. + PROCEDURE DIVISION. + MOVE 0 TO X-S9(1). + MOVE 1 TO X-S9(2). + MOVE 2 TO X-S9(3). + MOVE 3 TO X-S9(4). + MOVE 4 TO X-S9(5). + MOVE 5 TO X-S9(6). + MOVE 6 TO X-S9(7). + MOVE 7 TO X-S9(8). + MOVE 8 TO X-S9(9). + MOVE 9 TO X-S9(10). + DISPLAY X NO ADVANCING + END-DISPLAY. + MOVE -10 TO X-S99. MOVE X(2:1) TO X(1:1). + MOVE -1 TO X-S9(2). + MOVE -2 TO X-S9(3). + MOVE -3 TO X-S9(4). + MOVE -4 TO X-S9(5). + MOVE -5 TO X-S9(6). + MOVE -6 TO X-S9(7). + MOVE -7 TO X-S9(8). + MOVE -8 TO X-S9(9). + MOVE -9 TO X-S9(10). + DISPLAY X NO ADVANCING + END-DISPLAY. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII__2_.out b/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII__2_.out new file mode 100644 index 0000000..6717b6e --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/DISPLAY__Sign_ASCII__2_.out @@ -0,0 +1 @@ +0123456789pqrstuvwxy diff --git a/gcc/testsuite/cobol.dg/group2/EVALUATE_WHEN_NEGATIVE.cob b/gcc/testsuite/cobol.dg/group2/EVALUATE_WHEN_NEGATIVE.cob new file mode 100644 index 0000000..798f18b --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/EVALUATE_WHEN_NEGATIVE.cob @@ -0,0 +1,16 @@ + *> { dg-do run } + *> { dg-output-file "group2/EVALUATE_WHEN_NEGATIVE.out" } + + identification division. + program-id. prog. + data division. + working-storage section. + 77 num pic s9. + procedure division. + move -1 to num + evaluate num + when negative + display "negative" + end-evaluate. + end program prog. + diff --git a/gcc/testsuite/cobol.dg/group2/EVALUATE_WHEN_NEGATIVE.out b/gcc/testsuite/cobol.dg/group2/EVALUATE_WHEN_NEGATIVE.out new file mode 100644 index 0000000..126adb7 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/EVALUATE_WHEN_NEGATIVE.out @@ -0,0 +1,2 @@ +negative + diff --git a/gcc/testsuite/cobol.dg/group2/EVALUATE_condition__2_.cob b/gcc/testsuite/cobol.dg/group2/EVALUATE_condition__2_.cob new file mode 100644 index 0000000..84bc885 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/EVALUATE_condition__2_.cob @@ -0,0 +1,38 @@ + *> { dg-do run } + *> { dg-output-file "group2/EVALUATE_condition__2_.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 XVAL PIC X VALUE '_'. + 88 UNDERSCORE VALUE '_'. + PROCEDURE DIVISION. + DISPLAY 'Next line should be "UNDERSCORE evaluates to TRUE"' + EVALUATE TRUE + WHEN NOT UNDERSCORE + DISPLAY + "***IMPROPERLY*** NOT UNDERSCORE evaluates to TRUE" + END-DISPLAY + END-EVALUATE. + EVALUATE TRUE + WHEN UNDERSCORE + DISPLAY "UNDERSCORE evaluates to TRUE" + END-DISPLAY + END-EVALUATE. + + DISPLAY + 'Next line should be "NOT UNDERSCORE evaluates to FALSE"' + EVALUATE FALSE + WHEN NOT UNDERSCORE + DISPLAY "NOT UNDERSCORE evaluates to FALSE" + END-DISPLAY + END-EVALUATE. + EVALUATE FALSE + WHEN UNDERSCORE + DISPLAY + "***IMPROPERLY*** UNDERSCORE evaluates to FALSE" + END-DISPLAY + END-EVALUATE. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/EVALUATE_condition__2_.out b/gcc/testsuite/cobol.dg/group2/EVALUATE_condition__2_.out new file mode 100644 index 0000000..adff5ca --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/EVALUATE_condition__2_.out @@ -0,0 +1,5 @@ +Next line should be "UNDERSCORE evaluates to TRUE" +UNDERSCORE evaluates to TRUE +Next line should be "NOT UNDERSCORE evaluates to FALSE" +NOT UNDERSCORE evaluates to FALSE + diff --git a/gcc/testsuite/cobol.dg/group2/EVALUATE_doubled_WHEN.cob b/gcc/testsuite/cobol.dg/group2/EVALUATE_doubled_WHEN.cob new file mode 100644 index 0000000..50ff958 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/EVALUATE_doubled_WHEN.cob @@ -0,0 +1,30 @@ + *> { dg-do run } + *> { dg-output-file "group2/EVALUATE_doubled_WHEN.out" } + + identification division. + program-id. prog. + data division. + working-storage section. + 77 eval pic x(4). + procedure division. + move "open" to eval + display "about to EVALUATE eval " """" eval """" + evaluate true + when eval = 'open' + when eval = 'OPEN' + display "Good: We got us an " """" eval """" + when other + display "BAD!!! It shoulda been " """" eval """" + end-evaluate + move "OPEN" to eval + display "about to EVALUATE eval " """" eval """" + evaluate true + when eval = 'open' + when eval = 'OPEN' + display "Good: We got us an " """" eval """" + when other + display "BAD!!! It shoulda been " """" eval """" + end-evaluate + goback. + end program prog. + diff --git a/gcc/testsuite/cobol.dg/group2/EVALUATE_doubled_WHEN.out b/gcc/testsuite/cobol.dg/group2/EVALUATE_doubled_WHEN.out new file mode 100644 index 0000000..c4fa148 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/EVALUATE_doubled_WHEN.out @@ -0,0 +1,5 @@ +about to EVALUATE eval "open" +Good: We got us an "open" +about to EVALUATE eval "OPEN" +Good: We got us an "OPEN" + diff --git a/gcc/testsuite/cobol.dg/group2/EVALUATE_with_WHEN_using_condition-1.cob b/gcc/testsuite/cobol.dg/group2/EVALUATE_with_WHEN_using_condition-1.cob new file mode 100644 index 0000000..ed4c89a --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/EVALUATE_with_WHEN_using_condition-1.cob @@ -0,0 +1,18 @@ + *> { dg-do run } + *> { dg-output-file "group2/EVALUATE_with_WHEN_using_condition-1.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 77 var-1 PIC 99V9. + 88 var-1-big VALUE 20 THRU 40. + 88 var-1-huge VALUE 40 THRU 99. + PROCEDURE DIVISION. + EVALUATE TRUE *> not: var-1 + WHEN var-1-big DISPLAY "big" + WHEN var-1-huge DISPLAY "huge" + WHEN OTHER DISPLAY "not" + END-EVALUATE. + END PROGRAM prog. + diff --git a/gcc/testsuite/cobol.dg/group2/EVALUATE_with_WHEN_using_condition-1.out b/gcc/testsuite/cobol.dg/group2/EVALUATE_with_WHEN_using_condition-1.out new file mode 100644 index 0000000..3043bcc --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/EVALUATE_with_WHEN_using_condition-1.out @@ -0,0 +1,2 @@ +not + diff --git a/gcc/testsuite/cobol.dg/group2/Floating_continuation_indicator__1_.cob b/gcc/testsuite/cobol.dg/group2/Floating_continuation_indicator__1_.cob new file mode 100644 index 0000000..53211b2 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Floating_continuation_indicator__1_.cob @@ -0,0 +1,21 @@ + *> { dg-do run } + *> { dg-options "-ffixed-form" } + *> { dg-output-file "group2/Floating_continuation_indicator__1_.out" } + IDENTIFICATION DIVISION. + * testing floating continuation literals ("'-" and '"-') + PROGRAM-ID. FF2. + PROCEDURE DIVISION. + DISPLAY "hello "- + "world.". + DISPLAY 'hello '- + 'world.'. + DISPLAY "hello "- + * non-interrupting comment + "world.". + DISPLAY 'hello '- + *> non-interrupting comment + + 'world.'. + EXIT PROGRAM. + + diff --git a/gcc/testsuite/cobol.dg/group2/Floating_continuation_indicator__1_.out b/gcc/testsuite/cobol.dg/group2/Floating_continuation_indicator__1_.out new file mode 100644 index 0000000..fe031c3 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Floating_continuation_indicator__1_.out @@ -0,0 +1,5 @@ +hello world. +hello world. +hello world. +hello world. + diff --git a/gcc/testsuite/cobol.dg/group2/IBM_dialect_COMP_redefined_by_POINTER_as_64-bit.cob b/gcc/testsuite/cobol.dg/group2/IBM_dialect_COMP_redefined_by_POINTER_as_64-bit.cob new file mode 100644 index 0000000..071b88a --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/IBM_dialect_COMP_redefined_by_POINTER_as_64-bit.cob @@ -0,0 +1,34 @@ + *> { dg-do run } + *> { dg-options "-dialect ibm" } + *> { dg-output-file "group2/IBM_dialect_COMP_redefined_by_POINTER_as_64-bit.out" } + + identification division. + program-id. prog. + data division. + working-storage section. + *> This is a test of the "-dialect ibm" special interpretation of a common + *> construction in IBM mainframe code. That machine is a 32-bit + *> big-endian architecture. We are assuming a 64-bit little-endian + *> x86_64 architecture. So, the COMP PIC S8(8) would usually be an 32-bit + *> big-endian value. But "-dialect ibm" means that the following + *> REDEFINES USAGE POINTER causes the prior "COMP" to actually be defined + *> as a 64-bit little-endian binary value. + 77 pointer-value COMP PIC S9(8) VALUE ZERO. + 77 point-at REDEFINES pointer-value USAGE POINTER. + procedure division. + *> The following value is 0x123456789 + move 4886718345 to pointer-value + display point-at " should be 0x0000000123456789" + set point-at down by 4886718345 + display point-at " should be 0x0000000000000000" + set point-at down by 4886718345 + display point-at " should be 0xfffffffedcba9877" + set point-at up by 4886718345 + display point-at " should be 0x0000000000000000" + subtract 1 from pointer-value + display point-at " should be 0xffffffffffffffff" + add 1 to pointer-value + display point-at " should be 0x0000000000000000" + goback. + end program prog. + diff --git a/gcc/testsuite/cobol.dg/group2/IBM_dialect_COMP_redefined_by_POINTER_as_64-bit.out b/gcc/testsuite/cobol.dg/group2/IBM_dialect_COMP_redefined_by_POINTER_as_64-bit.out new file mode 100644 index 0000000..cd7fa5b --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/IBM_dialect_COMP_redefined_by_POINTER_as_64-bit.out @@ -0,0 +1,7 @@ +0x0000000123456789 should be 0x0000000123456789 +0x0000000000000000 should be 0x0000000000000000 +0xfffffffedcba9877 should be 0xfffffffedcba9877 +0x0000000000000000 should be 0x0000000000000000 +0xffffffffffffffff should be 0xffffffffffffffff +0x0000000000000000 should be 0x0000000000000000 + diff --git a/gcc/testsuite/cobol.dg/group2/Indicators_______________-____D__.cob b/gcc/testsuite/cobol.dg/group2/Indicators_______________-____D__.cob new file mode 100644 index 0000000..fe988ee --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Indicators_______________-____D__.cob @@ -0,0 +1,26 @@ + *> { dg-do run } + *> { dg-options "-ffixed-form" } + *> { dg-output-file "group2/Indicators_______________-____D__.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. FF2. + *Asterisk in correct column + / + PROCEDURE DIVISION. + DISPLAY "gekk + -"os rule". + DISPLAY "gerb + * ISO says blank and comment lines do not interfere with + * literal continuation + + -"ils don't rule". + * "D" is a deprecated feature of COBOL dropped from + * the ISO-IEC standard. Lines with "D" in the indicator + * column were enabled when OBJECT COMPUTER contained + * "WITH DEBUG MODE". Otherwise they were treated as + * comments. This behavior is a "vendor extension" to + * the current standard but allows old code to be used + * as it was prior to the deprecation. + D DISPLAY 'Should not display'. + EXIT PROGRAM. + diff --git a/gcc/testsuite/cobol.dg/group2/Indicators_______________-____D__.out b/gcc/testsuite/cobol.dg/group2/Indicators_______________-____D__.out new file mode 100644 index 0000000..8ad4d0a --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Indicators_______________-____D__.out @@ -0,0 +1,3 @@ +gekkos rule +gerbils don't rule + diff --git a/gcc/testsuite/cobol.dg/group2/MULTIPLY_to_FIX4.cob b/gcc/testsuite/cobol.dg/group2/MULTIPLY_to_FIX4.cob new file mode 100644 index 0000000..1f9b8dc --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/MULTIPLY_to_FIX4.cob @@ -0,0 +1,101 @@ + *> { dg-do run } + *> { dg-output-file "group2/MULTIPLY_to_FIX4.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. onsize. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 FIX4DISPLAY PIC 9(4) DISPLAY. + 01 FIX4PACKED PIC 9(4) PACKED-DECIMAL. + 01 FIX4BINARY PIC 9(4) BINARY. + 01 FIX4COMP5 PIC 9(4) COMP-5. + 01 FLTSHORT FLOAT-SHORT. + 01 FLTLONG FLOAT-LONG. + 01 FLTEXT FLOAT-EXTENDED. + + PROCEDURE DIVISION. + + DISPLAY "Checking size error on FIX4DISPLAY" + MOVE 1 TO FIX4DISPLAY + PERFORM 10 TIMEs + DISPLAY " FIX4DISPLAY is : " FIX4DISPLAY + MULTIPLY 10 BY FIX4DISPLAY + ON SIZE ERROR DISPLAY " Got size error" GO TO DONE1 + END-MULTIPLY + END-PERFORM. + DONE1. + DISPLAY " Final is : " FIX4DISPLAY + DISPLAY "." + + DISPLAY "Checking size error on FIX4PACKED" + MOVE 1 TO FIX4PACKED + PERFORM 10 TIMEs + DISPLAY " FIX4PACKED is : " FIX4PACKED + MULTIPLY 10 BY FIX4PACKED + ON SIZE ERROR DISPLAY " Got size error" GO TO DONE2 + END-MULTIPLY + END-PERFORM. + DONE2. + DISPLAY " Final is : " FIX4PACKED + DISPLAY "." + + DISPLAY "Checking size error on FIX4BINARY" + MOVE 1 TO FIX4BINARY + PERFORM 10 TIMEs + DISPLAY " FIX4BINARY is : " FIX4BINARY + MULTIPLY 10 BY FIX4BINARY + ON SIZE ERROR DISPLAY " Got size error" GO TO DONE3 + END-MULTIPLY + END-PERFORM. + DONE3. + DISPLAY " Final is : " FIX4BINARY + DISPLAY "." + + DISPLAY "Checking size error on FIX4COMP5" + MOVE 1 TO FIX4COMP5 + PERFORM 10 TIMEs + DISPLAY " FIX4COMP5 is : " FIX4COMP5 + MULTIPLY 10 BY FIX4COMP5 + ON SIZE ERROR DISPLAY " Got size error" GO TO DONE4 + END-MULTIPLY + END-PERFORM. + DONE4. + DISPLAY " Final is : " FIX4COMP5 + DISPLAY "." + + DISPLAY "Checking size error on FLTSHORT" + MOVE 1.E34 TO FLTSHORT + PERFORM 10 TIMEs + DISPLAY " FLTSHORT is : " FLTSHORT + MULTIPLY 10 BY FLTSHORT + ON SIZE ERROR DISPLAY " Got size error" GO TO DONE5 + END-MULTIPLY + END-PERFORM. + DONE5. + DISPLAY " Final is : " FLTSHORT + DISPLAY "." + + MOVE 1.E304 TO FLTLONG + PERFORM 1000 TIMEs + DISPLAY " FLTLONG is : " FLTLONG + MULTIPLY 10 BY FLTLONG + ON SIZE ERROR DISPLAY " Got size error" GO TO DONE6 + END-MULTIPLY + END-PERFORM. + DONE6. + DISPLAY " Final is : " FLTLONG + DISPLAY "." + + MOVE 1.E4928 TO FLTEXT + PERFORM 10 TIMEs + DISPLAY " FLTEXT is : " FLTEXT + MULTIPLY 10 BY FLTEXT + ON SIZE ERROR DISPLAY " Got size error" GO TO DONE7 + END-MULTIPLY + END-PERFORM. + DONE7. + DISPLAY " Final is : " FLTEXT + DISPLAY ".". + + END PROGRAM onsize. + diff --git a/gcc/testsuite/cobol.dg/group2/MULTIPLY_to_FIX4.out b/gcc/testsuite/cobol.dg/group2/MULTIPLY_to_FIX4.out new file mode 100644 index 0000000..90cf292 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/MULTIPLY_to_FIX4.out @@ -0,0 +1,58 @@ +Checking size error on FIX4DISPLAY + FIX4DISPLAY is : 0001 + FIX4DISPLAY is : 0010 + FIX4DISPLAY is : 0100 + FIX4DISPLAY is : 1000 + Got size error + Final is : 1000 +. +Checking size error on FIX4PACKED + FIX4PACKED is : 0001 + FIX4PACKED is : 0010 + FIX4PACKED is : 0100 + FIX4PACKED is : 1000 + Got size error + Final is : 1000 +. +Checking size error on FIX4BINARY + FIX4BINARY is : 0001 + FIX4BINARY is : 0010 + FIX4BINARY is : 0100 + FIX4BINARY is : 1000 + Got size error + Final is : 1000 +. +Checking size error on FIX4COMP5 + FIX4COMP5 is : 0001 + FIX4COMP5 is : 0010 + FIX4COMP5 is : 0100 + FIX4COMP5 is : 1000 + Got size error + Final is : 1000 +. +Checking size error on FLTSHORT + FLTSHORT is : 9.99999979E+33 + FLTSHORT is : 9.999999419E+34 + FLTSHORT is : 9.999999617E+35 + FLTSHORT is : 9.999999934E+36 + FLTSHORT is : 9.99999968E+37 + Got size error + Final is : 9.99999968E+37 +. + FLTLONG is : 9.99999999999999939E+303 + FLTLONG is : 9.99999999999999939E+304 + FLTLONG is : 9.99999999999999861E+305 + FLTLONG is : 9.99999999999999861E+306 + FLTLONG is : 9.99999999999999811E+307 + Got size error + Final is : 9.99999999999999811E+307 +. + FLTEXT is : 9.999999999999999999999999999999999576E+4927 + FLTEXT is : 9.999999999999999999999999999999999856E+4928 + FLTEXT is : 1.000000000000000000000000000000000053E+4930 + FLTEXT is : 1.000000000000000000000000000000000124E+4931 + FLTEXT is : 1.000000000000000000000000000000000124E+4932 + Got size error + Final is : 1.000000000000000000000000000000000124E+4932 +. + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_arithmetic.cob b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_arithmetic.cob new file mode 100644 index 0000000..09303a2 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_arithmetic.cob @@ -0,0 +1,24 @@ + *> { dg-do run } + *> { dg-output-file "group2/PACKED-DECIMAL_arithmetic.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 X PIC 99 USAGE PACKED-DECIMAL VALUE 0. + 01 Y PIC 99 USAGE PACKED-DECIMAL VALUE 9. + PROCEDURE DIVISION. + COMPUTE X = 1 + END-COMPUTE. + DISPLAY X + END-DISPLAY. + COMPUTE X = Y + END-COMPUTE. + DISPLAY X + END-DISPLAY. + COMPUTE X = X + Y + END-COMPUTE. + DISPLAY X + END-DISPLAY. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_arithmetic.out b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_arithmetic.out new file mode 100644 index 0000000..79f7d9d --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_arithmetic.out @@ -0,0 +1,4 @@ +01 +09 +18 + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__1_.cob b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__1_.cob new file mode 100644 index 0000000..f718cf4 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__1_.cob @@ -0,0 +1,52 @@ + *> { dg-do run } + *> { dg-options "-dialect mf" } + *> { dg-output-file "group2/PACKED-DECIMAL_basic_comp-3_comp-6__1_.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 x1 PIC 9 COMP-3. + 01 x2 PIC 99 COMP-3. + 01 x3 PIC 999 COMP-3. + 01 x4 PIC 9999 COMP-3. + 01 x5 PIC 99999 COMP-3. + 01 x6 PIC 999999 COMP-3. + 01 y1 PIC 9 COMP-6. + 01 y2 PIC 99 COMP-6. + 01 y3 PIC 999 COMP-6. + 01 y4 PIC 9999 COMP-6. + 01 y5 PIC 99999 COMP-6. + 01 y6 PIC 999999 COMP-6. + procedure division. + display "check lengths of comp-3" + display FUNCTION LENGTH(x1) " should be 1" + display FUNCTION LENGTH(x2) " should be 2" + display FUNCTION LENGTH(x3) " should be 2" + display FUNCTION LENGTH(x4) " should be 3" + display FUNCTION LENGTH(x5) " should be 3" + display FUNCTION LENGTH(x6) " should be 4" + display "check lengths of comp-6" + display FUNCTION LENGTH(y1) " should be 1" + display FUNCTION LENGTH(y2) " should be 1" + display FUNCTION LENGTH(y3) " should be 2" + display FUNCTION LENGTH(y4) " should be 2" + display FUNCTION LENGTH(y5) " should be 3" + display FUNCTION LENGTH(y6) " should be 3" + move 654321 to x1 x2 x3 x4 x5 x6 y1 y2 y3 y4 y5 y6 + display "results of MOVE TO COMP-3" + display x1 + display x2 + display x3 + display x4 + display x5 + display x6 + display "results of MOVE TO COMP-6" + display y1 + display y2 + display y3 + display y4 + display y5 + display y6 + goback. + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__1_.out b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__1_.out new file mode 100644 index 0000000..ae8169d --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__1_.out @@ -0,0 +1,29 @@ +check lengths of comp-3 +1 should be 1 +2 should be 2 +2 should be 2 +3 should be 3 +3 should be 3 +4 should be 4 +check lengths of comp-6 +1 should be 1 +1 should be 1 +2 should be 2 +2 should be 2 +3 should be 3 +3 should be 3 +results of MOVE TO COMP-3 +1 +21 +321 +4321 +54321 +654321 +results of MOVE TO COMP-6 +1 +21 +321 +4321 +54321 +654321 + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__2_.cob b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__2_.cob new file mode 100644 index 0000000..52a4e0a --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__2_.cob @@ -0,0 +1,41 @@ + *> { dg-do run } + *> { dg-options "-dialect mf" } + *> { dg-output-file "group2/PACKED-DECIMAL_basic_comp-3_comp-6__2_.out" } + + identification division. + program-id. prog. + data division. + working-storage section. + 01 vars. + 05 var1d . + 10 var01 pic 99v99 comp-3 value 43.21 . + 10 filler binary-double value zero . + 05 var1 redefines var1d pointer . + 05 var2d . + 10 var02 pic s99v99 comp-3 value 43.21 . + 10 filler binary-double value zero . + 05 var2 redefines var2d pointer . + 05 var3d . + 10 var03 pic s99v99 comp-3 value -43.21 . + 10 filler binary-double value zero . + 05 var3 redefines var3d pointer . + 05 var4d . + 10 var04 pic 99v99 comp-6 value 43.21 . + 10 filler binary-double value zero . + 05 var4 redefines var4d pointer . + procedure division. + display length of var01 space var1 space space var01 + display length of var02 space var2 space var02 + display length of var03 space var3 space var03 + display length of var04 space var4 space space var04 + move 12.34 to var01 + move 12.34 to var02 + move 12.34 to var03 + move 12.34 to var04 + display function length(var01) space var1 space space var01 + display function length(var02) space var2 space var02 + display function length(var03) space var3 space var03 + display function length(var04) space var4 space space var04 + goback. + end program prog. + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__2_.out b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__2_.out new file mode 100644 index 0000000..6acdee4 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_basic_comp-3_comp-6__2_.out @@ -0,0 +1,9 @@ +3 0x00000000001f3204 43.21 +3 0x00000000001c3204 +43.21 +3 0x00000000001d3204 -43.21 +2 0x0000000000002143 43.21 +3 0x00000000004f2301 12.34 +3 0x00000000004c2301 +12.34 +3 0x00000000004c2301 +12.34 +2 0x0000000000003412 12.34 + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_dump.cob b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_dump.cob new file mode 100644 index 0000000..f4c7550 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_dump.cob @@ -0,0 +1,486 @@ + *> { dg-do run } + *> { dg-output-file "group2/PACKED-DECIMAL_dump.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 G-1. + 02 X-1 PIC 9(1) VALUE 1 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-2. + 02 X-2 PIC 9(2) VALUE 12 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-3. + 02 X-3 PIC 9(3) VALUE 123 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-4. + 02 X-4 PIC 9(4) VALUE 1234 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-5. + 02 X-5 PIC 9(5) VALUE 12345 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-6. + 02 X-6 PIC 9(6) VALUE 123456 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-7. + 02 X-7 PIC 9(7) VALUE 1234567 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-8. + 02 X-8 PIC 9(8) VALUE 12345678 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-9. + 02 X-9 PIC 9(9) VALUE 123456789 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-10. + 02 X-10 PIC 9(10) VALUE 1234567890 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-11. + 02 X-11 PIC 9(11) VALUE 12345678901 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-12. + 02 X-12 PIC 9(12) VALUE 123456789012 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-13. + 02 X-13 PIC 9(13) VALUE 1234567890123 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-14. + 02 X-14 PIC 9(14) VALUE 12345678901234 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-15. + 02 X-15 PIC 9(15) VALUE 123456789012345 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-16. + 02 X-16 PIC 9(16) VALUE 1234567890123456 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-17. + 02 X-17 PIC 9(17) VALUE 12345678901234567 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-18. + 02 X-18 PIC 9(18) VALUE 123456789012345678 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S1. + 02 X-S1 PIC S9(1) VALUE -1 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S2. + 02 X-S2 PIC S9(2) VALUE -12 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S3. + 02 X-S3 PIC S9(3) VALUE -123 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S4. + 02 X-S4 PIC S9(4) VALUE -1234 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S5. + 02 X-S5 PIC S9(5) VALUE -12345 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S6. + 02 X-S6 PIC S9(6) VALUE -123456 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S7. + 02 X-S7 PIC S9(7) VALUE -1234567 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S8. + 02 X-S8 PIC S9(8) VALUE -12345678 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S9. + 02 X-S9 PIC S9(9) VALUE -123456789 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S10. + 02 X-S10 PIC S9(10) VALUE -1234567890 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S11. + 02 X-S11 PIC S9(11) VALUE -12345678901 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S12. + 02 X-S12 PIC S9(12) VALUE -123456789012 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S13. + 02 X-S13 PIC S9(13) VALUE -1234567890123 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S14. + 02 X-S14 PIC S9(14) VALUE -12345678901234 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S15. + 02 X-S15 PIC S9(15) VALUE -123456789012345 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S16. + 02 X-S16 PIC S9(16) VALUE -1234567890123456 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S17. + 02 X-S17 PIC S9(17) VALUE -12345678901234567 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + 01 G-S18. + 02 X-S18 PIC S9(18) VALUE -123456789012345678 + COMP-3. + 02 FILLER PIC X(18) VALUE SPACE. + PROCEDURE DIVISION. + *> Dump all values + CALL "dump" USING G-1 + END-CALL. + CALL "dump" USING G-2 + END-CALL. + CALL "dump" USING G-3 + END-CALL. + CALL "dump" USING G-4 + END-CALL. + CALL "dump" USING G-5 + END-CALL. + CALL "dump" USING G-6 + END-CALL. + CALL "dump" USING G-7 + END-CALL. + CALL "dump" USING G-8 + END-CALL. + CALL "dump" USING G-9 + END-CALL. + CALL "dump" USING G-10 + END-CALL. + CALL "dump" USING G-11 + END-CALL. + CALL "dump" USING G-12 + END-CALL. + CALL "dump" USING G-13 + END-CALL. + CALL "dump" USING G-14 + END-CALL. + CALL "dump" USING G-15 + END-CALL. + CALL "dump" USING G-16 + END-CALL. + CALL "dump" USING G-17 + END-CALL. + CALL "dump" USING G-18 + END-CALL. + CALL "dump" USING G-S1 + END-CALL. + CALL "dump" USING G-S2 + END-CALL. + CALL "dump" USING G-S3 + END-CALL. + CALL "dump" USING G-S4 + END-CALL. + CALL "dump" USING G-S5 + END-CALL. + CALL "dump" USING G-S6 + END-CALL. + CALL "dump" USING G-S7 + END-CALL. + CALL "dump" USING G-S8 + END-CALL. + CALL "dump" USING G-S9 + END-CALL. + CALL "dump" USING G-S10 + END-CALL. + CALL "dump" USING G-S11 + END-CALL. + CALL "dump" USING G-S12 + END-CALL. + CALL "dump" USING G-S13 + END-CALL. + CALL "dump" USING G-S14 + END-CALL. + CALL "dump" USING G-S15 + END-CALL. + CALL "dump" USING G-S16 + END-CALL. + CALL "dump" USING G-S17 + END-CALL. + CALL "dump" USING G-S18 + END-CALL. + INITIALIZE X-1. + CALL "dump" USING G-1 + END-CALL. + INITIALIZE X-2. + CALL "dump" USING G-2 + END-CALL. + INITIALIZE X-3. + CALL "dump" USING G-3 + END-CALL. + INITIALIZE X-4. + CALL "dump" USING G-4 + END-CALL. + INITIALIZE X-5. + CALL "dump" USING G-5 + END-CALL. + INITIALIZE X-6. + CALL "dump" USING G-6 + END-CALL. + INITIALIZE X-7. + CALL "dump" USING G-7 + END-CALL. + INITIALIZE X-8. + CALL "dump" USING G-8 + END-CALL. + INITIALIZE X-9. + CALL "dump" USING G-9 + END-CALL. + INITIALIZE X-10. + CALL "dump" USING G-10 + END-CALL. + INITIALIZE X-11. + CALL "dump" USING G-11 + END-CALL. + INITIALIZE X-12. + CALL "dump" USING G-12 + END-CALL. + INITIALIZE X-13. + CALL "dump" USING G-13 + END-CALL. + INITIALIZE X-14. + CALL "dump" USING G-14 + END-CALL. + INITIALIZE X-15. + CALL "dump" USING G-15 + END-CALL. + INITIALIZE X-16. + CALL "dump" USING G-16 + END-CALL. + INITIALIZE X-17. + CALL "dump" USING G-17 + END-CALL. + INITIALIZE X-18. + CALL "dump" USING G-18 + END-CALL. + INITIALIZE X-S1. + CALL "dump" USING G-S1 + END-CALL. + INITIALIZE X-S2. + CALL "dump" USING G-S2 + END-CALL. + INITIALIZE X-S3. + CALL "dump" USING G-S3 + END-CALL. + INITIALIZE X-S4. + CALL "dump" USING G-S4 + END-CALL. + INITIALIZE X-S5. + CALL "dump" USING G-S5 + END-CALL. + INITIALIZE X-S6. + CALL "dump" USING G-S6 + END-CALL. + INITIALIZE X-S7. + CALL "dump" USING G-S7 + END-CALL. + INITIALIZE X-S8. + CALL "dump" USING G-S8 + END-CALL. + INITIALIZE X-S9. + CALL "dump" USING G-S9 + END-CALL. + INITIALIZE X-S10. + CALL "dump" USING G-S10 + END-CALL. + INITIALIZE X-S11. + CALL "dump" USING G-S11 + END-CALL. + INITIALIZE X-S12. + CALL "dump" USING G-S12 + END-CALL. + INITIALIZE X-S13. + CALL "dump" USING G-S13 + END-CALL. + INITIALIZE X-S14. + CALL "dump" USING G-S14 + END-CALL. + INITIALIZE X-S15. + CALL "dump" USING G-S15 + END-CALL. + INITIALIZE X-S16. + CALL "dump" USING G-S16 + END-CALL. + INITIALIZE X-S17. + CALL "dump" USING G-S17 + END-CALL. + INITIALIZE X-S18. + CALL "dump" USING G-S18 + END-CALL. + MOVE ZERO TO X-1. + CALL "dump" USING G-1 + END-CALL. + MOVE ZERO TO X-2. + CALL "dump" USING G-2 + END-CALL. + MOVE ZERO TO X-3. + CALL "dump" USING G-3 + END-CALL. + MOVE ZERO TO X-4. + CALL "dump" USING G-4 + END-CALL. + MOVE ZERO TO X-5. + CALL "dump" USING G-5 + END-CALL. + MOVE ZERO TO X-6. + CALL "dump" USING G-6 + END-CALL. + MOVE ZERO TO X-7. + CALL "dump" USING G-7 + END-CALL. + MOVE ZERO TO X-8. + CALL "dump" USING G-8 + END-CALL. + MOVE ZERO TO X-9. + CALL "dump" USING G-9 + END-CALL. + MOVE ZERO TO X-10. + CALL "dump" USING G-10 + END-CALL. + MOVE ZERO TO X-11. + CALL "dump" USING G-11 + END-CALL. + MOVE ZERO TO X-12. + CALL "dump" USING G-12 + END-CALL. + MOVE ZERO TO X-13. + CALL "dump" USING G-13 + END-CALL. + MOVE ZERO TO X-14. + CALL "dump" USING G-14 + END-CALL. + MOVE ZERO TO X-15. + CALL "dump" USING G-15 + END-CALL. + MOVE ZERO TO X-16. + CALL "dump" USING G-16 + END-CALL. + MOVE ZERO TO X-17. + CALL "dump" USING G-17 + END-CALL. + MOVE ZERO TO X-18. + CALL "dump" USING G-18 + END-CALL. + MOVE ZERO TO X-S1. + CALL "dump" USING G-S1 + END-CALL. + MOVE ZERO TO X-S2. + CALL "dump" USING G-S2 + END-CALL. + MOVE ZERO TO X-S3. + CALL "dump" USING G-S3 + END-CALL. + MOVE ZERO TO X-S4. + CALL "dump" USING G-S4 + END-CALL. + MOVE ZERO TO X-S5. + CALL "dump" USING G-S5 + END-CALL. + MOVE ZERO TO X-S6. + CALL "dump" USING G-S6 + END-CALL. + MOVE ZERO TO X-S7. + CALL "dump" USING G-S7 + END-CALL. + MOVE ZERO TO X-S8. + CALL "dump" USING G-S8 + END-CALL. + MOVE ZERO TO X-S9. + CALL "dump" USING G-S9 + END-CALL. + MOVE ZERO TO X-S10. + CALL "dump" USING G-S10 + END-CALL. + MOVE ZERO TO X-S11. + CALL "dump" USING G-S11 + END-CALL. + MOVE ZERO TO X-S12. + CALL "dump" USING G-S12 + END-CALL. + MOVE ZERO TO X-S13. + CALL "dump" USING G-S13 + END-CALL. + MOVE ZERO TO X-S14. + CALL "dump" USING G-S14 + END-CALL. + MOVE ZERO TO X-S15. + CALL "dump" USING G-S15 + END-CALL. + MOVE ZERO TO X-S16. + CALL "dump" USING G-S16 + END-CALL. + MOVE ZERO TO X-S17. + CALL "dump" USING G-S17 + END-CALL. + MOVE ZERO TO X-S18. + CALL "dump" USING G-S18 + END-CALL. + STOP RUN. + END PROGRAM prog. + IDENTIFICATION DIVISION. + PROGRAM-ID. dump. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 HEXCHARS. + 02 HEXCHART PIC X(16) VALUE "0123456789abcdef". + 02 HEXCHAR REDEFINES HEXCHART PIC X OCCURS 16. + 01 BYTE-TO-DUMP PIC X(1). + 01 FILLER. + 02 DUMPER1 PIC 9999 COMP-5. + 02 DUMPER2 REDEFINES DUMPER1 PIC X(1). + 01 THE-BYTE PIC 99. + 01 LADVANCE PIC 9. + LINKAGE SECTION. + 01 G-VAL PIC X(20). + 01 G-PTR REDEFINES G-VAL USAGE POINTER. + PROCEDURE DIVISION USING G-VAL. + MOVE 1 TO THE-BYTE + MOVE 0 TO LADVANCE + PERFORM UNTIL THE-BYTE GREATER THAN 10 + MOVE G-VAL(THE-BYTE:1) TO BYTE-TO-DUMP + IF THE-BYTE EQUAL TO 10 MOVE 1 TO LADVANCE END-IF + PERFORM DUMP-BYTE + ADD 1 TO THE-BYTE + END-PERFORM. + GOBACK. + DUMP-BYTE. + MOVE ZERO TO DUMPER1 + MOVE BYTE-TO-DUMP TO DUMPER2 + DIVIDE DUMPER1 BY 16 GIVING DUMPER1 + ADD 1 TO DUMPER1 + DISPLAY HEXCHAR(DUMPER1) NO ADVANCING. + MOVE ZERO TO DUMPER1 + MOVE BYTE-TO-DUMP TO DUMPER2 + MOVE FUNCTION MOD(DUMPER1 16) TO DUMPER1 + ADD 1 TO DUMPER1 + IF LADVANCE EQUAL TO 1 THEN + DISPLAY HEXCHAR(DUMPER1) + ELSE + DISPLAY HEXCHAR(DUMPER1) NO ADVANCING + END-IF. + END PROGRAM dump. + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_dump.out b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_dump.out new file mode 100644 index 0000000..31a5a79 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_dump.out @@ -0,0 +1,109 @@ +1f202020202020202020 +012f2020202020202020 +123f2020202020202020 +01234f20202020202020 +12345f20202020202020 +0123456f202020202020 +1234567f202020202020 +012345678f2020202020 +123456789f2020202020 +01234567890f20202020 +12345678901f20202020 +0123456789012f202020 +1234567890123f202020 +012345678901234f2020 +123456789012345f2020 +01234567890123456f20 +12345678901234567f20 +0123456789012345678f +1d202020202020202020 +012d2020202020202020 +123d2020202020202020 +01234d20202020202020 +12345d20202020202020 +0123456d202020202020 +1234567d202020202020 +012345678d2020202020 +123456789d2020202020 +01234567890d20202020 +12345678901d20202020 +0123456789012d202020 +1234567890123d202020 +012345678901234d2020 +123456789012345d2020 +01234567890123456d20 +12345678901234567d20 +0123456789012345678d +0f202020202020202020 +000f2020202020202020 +000f2020202020202020 +00000f20202020202020 +00000f20202020202020 +0000000f202020202020 +0000000f202020202020 +000000000f2020202020 +000000000f2020202020 +00000000000f20202020 +00000000000f20202020 +0000000000000f202020 +0000000000000f202020 +000000000000000f2020 +000000000000000f2020 +00000000000000000f20 +00000000000000000f20 +0000000000000000000f +0c202020202020202020 +000c2020202020202020 +000c2020202020202020 +00000c20202020202020 +00000c20202020202020 +0000000c202020202020 +0000000c202020202020 +000000000c2020202020 +000000000c2020202020 +00000000000c20202020 +00000000000c20202020 +0000000000000c202020 +0000000000000c202020 +000000000000000c2020 +000000000000000c2020 +00000000000000000c20 +00000000000000000c20 +0000000000000000000c +0f202020202020202020 +000f2020202020202020 +000f2020202020202020 +00000f20202020202020 +00000f20202020202020 +0000000f202020202020 +0000000f202020202020 +000000000f2020202020 +000000000f2020202020 +00000000000f20202020 +00000000000f20202020 +0000000000000f202020 +0000000000000f202020 +000000000000000f2020 +000000000000000f2020 +00000000000000000f20 +00000000000000000f20 +0000000000000000000f +0c202020202020202020 +000c2020202020202020 +000c2020202020202020 +00000c20202020202020 +00000c20202020202020 +0000000c202020202020 +0000000c202020202020 +000000000c2020202020 +000000000c2020202020 +00000000000c20202020 +00000000000c20202020 +0000000000000c202020 +0000000000000c202020 +000000000000000c2020 +000000000000000c2020 +00000000000000000c20 +00000000000000000c20 +0000000000000000000c + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__1_.cob b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__1_.cob new file mode 100644 index 0000000..a117325 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__1_.cob @@ -0,0 +1,119 @@ + *> { dg-do run } + *> { dg-output-file "group2/PACKED-DECIMAL_numeric_test__1_.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 G. + 02 X-2 PIC X(2). + 02 N-2 REDEFINES X-2 PIC 999 USAGE PACKED-DECIMAL. + 02 N-S2 REDEFINES X-2 PIC S999 USAGE PACKED-DECIMAL. + PROCEDURE DIVISION. + MOVE X"0000" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "1 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "2 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + MOVE X"000c" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "3 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "OK" + END-DISPLAY + ELSE + DISPLAY "4 NG" + END-DISPLAY + END-IF. + MOVE X"000d" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "5 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "OK" + END-DISPLAY + ELSE + DISPLAY "6 NG" + END-DISPLAY + END-IF. + MOVE X"000f" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "OK" + END-DISPLAY + ELSE + DISPLAY "7 NG" + END-DISPLAY + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "8 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + MOVE X"1234" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "9 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "10 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + MOVE X"999f" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "OK" + END-DISPLAY + ELSE + DISPLAY "11 NG" + END-DISPLAY + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "12 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + MOVE X"ffff" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "13 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "14 NG" + END-DISPLAY + ELSE + DISPLAY "OK" + END-DISPLAY + END-IF. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__1_.out b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__1_.out new file mode 100644 index 0000000..b2fdeb2 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__1_.out @@ -0,0 +1,15 @@ +OK +OK +OK +OK +OK +OK +OK +OK +OK +OK +OK +OK +OK +OK + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__2_.cob b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__2_.cob new file mode 100644 index 0000000..7c7d2b0 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__2_.cob @@ -0,0 +1,91 @@ + *> { dg-do run } + *> { dg-output-file "group2/PACKED-DECIMAL_numeric_test__2_.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 G. + 02 X-2 PIC X(2). + 02 N-2 REDEFINES X-2 PIC 999 USAGE PACKED-DECIMAL. + 02 N-S2 REDEFINES X-2 PIC S999 USAGE PACKED-DECIMAL. + PROCEDURE DIVISION. + MOVE X"0000" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "NG 1" + ELSE + DISPLAY "OK" + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "NG 2" + ELSE + DISPLAY "OK" + END-IF. + MOVE X"000c" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "NG 3" + ELSE + DISPLAY "OK" + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "OK" + ELSE + DISPLAY "NG 4" + END-IF. + MOVE X"000d" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "NG 5" + ELSE + DISPLAY "OK" + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "OK" + ELSE + DISPLAY "NG 6" + END-IF. + MOVE X"000f" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "OK" + ELSE + DISPLAY "NG 7" + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "NG 8" + ELSE + DISPLAY "OK" + END-IF. + MOVE X"1234" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "NG 9" + ELSE + DISPLAY "OK" + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "NG 10" + ELSE + DISPLAY "OK" + END-IF. + MOVE X"999f" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "OK" + ELSE + DISPLAY "NG 11" + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "NG 12" + ELSE + DISPLAY "OK" + END-IF. + MOVE X"ffff" TO X-2. + IF N-2 IS NUMERIC + DISPLAY "NG 13" + ELSE + DISPLAY "OK" + END-IF. + IF N-S2 IS NUMERIC + DISPLAY "NG 14" + ELSE + DISPLAY "OK" + END-IF. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__2_.out b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__2_.out new file mode 100644 index 0000000..b2fdeb2 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_numeric_test__2_.out @@ -0,0 +1,15 @@ +OK +OK +OK +OK +OK +OK +OK +OK +OK +OK +OK +OK +OK +OK + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_DISPLAY.cob b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_DISPLAY.cob new file mode 100644 index 0000000..4b3d391 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_DISPLAY.cob @@ -0,0 +1,38 @@ + *> { dg-do run } + *> { dg-output-file "group2/PACKED-DECIMAL_used_with_DISPLAY.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 X-99 PIC 99 USAGE PACKED-DECIMAL. + 01 X-S99 PIC S99 USAGE PACKED-DECIMAL. + 01 X-999 PIC 999 USAGE PACKED-DECIMAL. + 01 X-S999 PIC S999 USAGE PACKED-DECIMAL. + PROCEDURE DIVISION. + MOVE 0 TO X-99. + DISPLAY X-99 + END-DISPLAY. + MOVE 99 TO X-99. + DISPLAY X-99 + END-DISPLAY. + MOVE 0 TO X-S99. + DISPLAY X-S99 + END-DISPLAY. + MOVE -1 TO X-S99. + DISPLAY X-S99 + END-DISPLAY. + MOVE 0 TO X-999. + DISPLAY X-999 + END-DISPLAY. + MOVE 123 TO X-999. + DISPLAY X-999 + END-DISPLAY. + MOVE 0 TO X-S999. + DISPLAY X-S999 + END-DISPLAY. + MOVE -123 TO X-S999. + DISPLAY X-S999 + END-DISPLAY. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_DISPLAY.out b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_DISPLAY.out new file mode 100644 index 0000000..4d26a95 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_DISPLAY.out @@ -0,0 +1,9 @@ +00 +99 ++00 +-01 +000 +123 ++000 +-123 + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_INITIALIZE.cob b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_INITIALIZE.cob new file mode 100644 index 0000000..5bd324b --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_INITIALIZE.cob @@ -0,0 +1,26 @@ + *> { dg-do run } + *> { dg-output-file "group2/PACKED-DECIMAL_used_with_INITIALIZE.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 X-99 PIC 99 USAGE PACKED-DECIMAL. + 01 X-S99 PIC S99 USAGE PACKED-DECIMAL. + 01 X-999 PIC 999 USAGE PACKED-DECIMAL. + 01 X-S999 PIC S999 USAGE PACKED-DECIMAL. + PROCEDURE DIVISION. + INITIALIZE X-99. + DISPLAY X-99 + END-DISPLAY. + INITIALIZE X-S99. + DISPLAY X-S99 + END-DISPLAY. + INITIALIZE X-999. + DISPLAY X-999 + END-DISPLAY. + INITIALIZE X-S999. + DISPLAY X-S999 + END-DISPLAY. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_INITIALIZE.out b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_INITIALIZE.out new file mode 100644 index 0000000..ff3759e --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_INITIALIZE.out @@ -0,0 +1,5 @@ +00 ++00 +000 ++000 + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_MOVE.cob b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_MOVE.cob new file mode 100644 index 0000000..cfdc8db --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_MOVE.cob @@ -0,0 +1,40 @@ + *> { dg-do run } + *> { dg-output-file "group2/PACKED-DECIMAL_used_with_MOVE.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 X-99 PIC 99 USAGE PACKED-DECIMAL. + 01 X-S99 PIC S99 USAGE PACKED-DECIMAL. + 01 X-999 PIC 999 USAGE PACKED-DECIMAL. + 01 X-S999 PIC S999 USAGE PACKED-DECIMAL. + 01 C-P1234 PIC 9999 VALUE 1234. + 01 C-N1234 PIC S9999 VALUE -1234. + PROCEDURE DIVISION. + MOVE C-P1234 TO X-99. + DISPLAY X-99 + END-DISPLAY. + MOVE C-P1234 TO X-S99. + DISPLAY X-S99 + END-DISPLAY. + MOVE C-P1234 TO X-999. + DISPLAY X-999 + END-DISPLAY. + MOVE C-P1234 TO X-S999. + DISPLAY X-S999 + END-DISPLAY. + MOVE C-N1234 TO X-99. + DISPLAY X-99 + END-DISPLAY. + MOVE C-N1234 TO X-S99. + DISPLAY X-S99 + END-DISPLAY. + MOVE C-N1234 TO X-999. + DISPLAY X-999 + END-DISPLAY. + MOVE C-N1234 TO X-S999. + DISPLAY X-S999 + END-DISPLAY. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_MOVE.out b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_MOVE.out new file mode 100644 index 0000000..ddb1080 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/PACKED-DECIMAL_used_with_MOVE.out @@ -0,0 +1,9 @@ +34 ++34 +234 ++234 +34 +-34 +234 +-234 + diff --git a/gcc/testsuite/cobol.dg/group2/POINTER__display.cob b/gcc/testsuite/cobol.dg/group2/POINTER__display.cob new file mode 100644 index 0000000..46a7cb1 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/POINTER__display.cob @@ -0,0 +1,18 @@ + *> { dg-do run } + *> { dg-output-file "group2/POINTER__display.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. prog. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 PTR USAGE POINTER VALUE NULL. + PROCEDURE DIVISION. + DISPLAY PTR + END-DISPLAY. + SET PTR UP BY 1 + DISPLAY PTR + SET PTR DOWN BY 1 + DISPLAY PTR + END-DISPLAY. + STOP RUN. + diff --git a/gcc/testsuite/cobol.dg/group2/POINTER__display.out b/gcc/testsuite/cobol.dg/group2/POINTER__display.out new file mode 100644 index 0000000..c8ee9bc --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/POINTER__display.out @@ -0,0 +1,4 @@ +0x0000000000000000 +0x0000000000000001 +0x0000000000000000 + diff --git a/gcc/testsuite/cobol.dg/group2/Simple_floating-point_MOVE.cob b/gcc/testsuite/cobol.dg/group2/Simple_floating-point_MOVE.cob new file mode 100644 index 0000000..50f9ffa --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Simple_floating-point_MOVE.cob @@ -0,0 +1,48 @@ + *> { dg-do run } + *> { dg-output-file "group2/Simple_floating-point_MOVE.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-move. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 S1 PIC 999V99 DISPLAY VALUE 123.45 . + 01 S2 PIC 999V99 COMP VALUE 123.45 . + 01 S3 PIC 999V99 COMP-3 VALUE 123.45 . + 01 S4 PIC 999V99 COMP-5 VALUE 123.45 . + 01 S5 FLOAT-SHORT VALUE 123.45 . + 01 S6 FLOAT-LONG VALUE 123.45 . + 01 S7 FLOAT-EXTENDED VALUE 123.45 . + 01 D1 PIC 999V99 DISPLAY . + 01 D2 PIC 999V99 COMP . + 01 D3 PIC 999V99 COMP-3 . + 01 D4 PIC 999V99 COMP-5 . + 01 D5 FLOAT-SHORT . + 01 D6 FLOAT-LONG . + 01 D7 FLOAT-EXTENDED . + PROCEDURE DIVISION. + MOVE S1 TO D1 D2 D3 D4 D5 D6 D7 + PERFORM DISPLAY-D. + MOVE S2 TO D1 D2 D3 D4 D5 D6 D7 + PERFORM DISPLAY-D. + MOVE S3 TO D1 D2 D3 D4 D5 D6 D7 + PERFORM DISPLAY-D. + MOVE S4 TO D1 D2 D3 D4 D5 D6 D7 + PERFORM DISPLAY-D. + MOVE S5 TO D1 D2 D3 D4 D5 D6 D7 + PERFORM DISPLAY-D. + MOVE S6 TO D1 D2 D3 D4 D5 D6 D7 + PERFORM DISPLAY-D. + MOVE S7 TO D1 D2 D3 D4 D5 D6 D7 + PERFORM DISPLAY-D. + GOBACK. + DISPLAY-D. + DISPLAY D1 SPACE + D2 SPACE + D3 SPACE + D4 SPACE + D5 SPACE + D6 SPACE + D7 . + MOVE 0 TO D1 D2 D3 D4 D5 D6 D7. + END PROGRAM float-move. + diff --git a/gcc/testsuite/cobol.dg/group2/Simple_floating-point_MOVE.out b/gcc/testsuite/cobol.dg/group2/Simple_floating-point_MOVE.out new file mode 100644 index 0000000..fb07251 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Simple_floating-point_MOVE.out @@ -0,0 +1,8 @@ +123.45 123.45 123.45 123.45 123.4499969 123.450000000000003 123.4500000000000000000000000000000025 +123.45 123.45 123.45 123.45 123.4499969 123.450000000000003 123.4500000000000000000000000000000025 +123.45 123.45 123.45 123.45 123.4499969 123.450000000000003 123.4500000000000000000000000000000025 +123.45 123.45 123.45 123.45 123.4499969 123.450000000000003 123.4500000000000000000000000000000025 +123.44 123.45 123.44 123.45 123.4499969 123.449996948242188 123.4499969482421875 +123.45 123.45 123.45 123.45 123.4499969 123.450000000000003 123.4500000000000028421709430404007435 +123.45 123.45 123.45 123.45 123.4499969 123.450000000000003 123.4500000000000000000000000000000025 + diff --git a/gcc/testsuite/cobol.dg/group2/Simple_floating-point_VALUE_and_MOVE.cob b/gcc/testsuite/cobol.dg/group2/Simple_floating-point_VALUE_and_MOVE.cob new file mode 100644 index 0000000..42d5954 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Simple_floating-point_VALUE_and_MOVE.cob @@ -0,0 +1,176 @@ + *> { dg-do run } + *> { dg-output-file "group2/Simple_floating-point_VALUE_and_MOVE.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-demo. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 P-1 PIC 999PPPPPP COMP-5 VALUE 123000000. + 01 C-1A COMP-1 VALUE 12.3456E-7. + 01 C-1B COMP-1 VALUE 12.3456E-6. + 01 C-1C COMP-1 VALUE 12.3456E-5. + 01 C-1D COMP-1 VALUE 12.3456E-4. + 01 C-1E COMP-1 VALUE 12.3456E-3. + 01 C-1F COMP-1 VALUE 12.3456E-2. + 01 C-1G COMP-1 VALUE 12.3456E-1. + 01 C-1H COMP-1 VALUE 12.3456E0 . + 01 C-1I COMP-1 VALUE 12.3456E1 . + 01 C-1J COMP-1 VALUE 12.3456E2 . + 01 C-1K COMP-1 VALUE 12.3456E3 . + 01 C-1L COMP-1 VALUE 12.3456E4 . + 01 C-1M COMP-1 VALUE 12.3456E5 . + 01 C-1N COMP-1 VALUE 12.3456E6 . + 01 C-1O COMP-1 VALUE 12.3456E7 . + 01 C-1P COMP-1 VALUE 12.3456E8 . + 01 C-1Q COMP-1 VALUE 12.3456E9 . + 01 C-1R COMP-1 VALUE 12.3456E10. + 01 C-1S COMP-1 VALUE 12.3456E11. + 01 C-2A COMP-2 VALUE 12.3456789098765E-7. + 01 C-2B COMP-2 VALUE 12.3456789098765E-6. + 01 C-2C COMP-2 VALUE 12.3456789098765E-5. + 01 C-2D COMP-2 VALUE 12.3456789098765E-4. + 01 C-2E COMP-2 VALUE 12.3456789098765E-3. + 01 C-2F COMP-2 VALUE 12.3456789098765E-2. + 01 C-2G COMP-2 VALUE 12.3456789098765E-1. + 01 C-2H COMP-2 VALUE 12.3456789098765E0 . + 01 C-2I COMP-2 VALUE 12.3456789098765E1 . + 01 C-2J COMP-2 VALUE 12.3456789098765E2 . + 01 C-2K COMP-2 VALUE 12.3456789098765E3 . + 01 C-2L COMP-2 VALUE 12.3456789098765E4 . + 01 C-2M COMP-2 VALUE 12.3456789098765E5 . + 01 C-2N COMP-2 VALUE 12.3456789098765E6 . + 01 C-2O COMP-2 VALUE 12.3456789098765E7 . + 01 C-2P COMP-2 VALUE 12.3456789098765E8 . + 01 C-2Q COMP-2 VALUE 12.3456789098765E9 . + 01 C-2R COMP-2 VALUE 12.3456789098765E10. + 01 C-2S COMP-2 VALUE 12.3456789098765E11. + 01 C-2T COMP-2 VALUE 12.3456789098765E12. + 01 C-2U COMP-2 VALUE 12.3456789098765E13. + 01 C-2V COMP-2 VALUE 12.3456789098765E14. + 01 C-2W COMP-2 VALUE 12.3456789098765E15. + 01 C-2X COMP-2 VALUE 12.3456789098765E16. + 01 C-EA FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E-7. + 01 C-EB FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E-6. + 01 C-EC FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E-5. + 01 C-ED FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E-4. + 01 C-EE FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E-3. + 01 C-EF FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E-2. + 01 C-EG FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E-1. + 01 C-EH FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E0 . + 01 C-EI FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E1 . + 01 C-EJ FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E2 . + 01 C-EK FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E3 . + 01 C-EL FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E4 . + 01 C-EM FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E5 . + 01 C-EN FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E6 . + 01 C-EO FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E7 . + 01 C-EP FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E8 . + 01 C-EQ FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E9 . + 01 C-ER FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E10. + 01 C-ES FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E11. + 01 C-ET FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E12. + 01 C-EU FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E13. + 01 C-EV FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E14. + 01 C-EW FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E15. + 01 C-EX FLOAT-EXTENDED VALUE 11.11222233334444995555666677778888E16. + 01 A PIC X(24). + PROCEDURE DIVISION. + DISPLAY "Variations on COMP-1 12." + MOVE 12.E-7 TO C-1A . + MOVE 12.E-6 TO C-1B . + MOVE 12.E-5 TO C-1C . + MOVE 12.E-4 TO C-1D . + MOVE 12.E-3 TO C-1E . + MOVE 12.E-2 TO C-1F . + MOVE 12.E-1 TO C-1G . + MOVE 12.E0 TO C-1H . + MOVE 12.E1 TO C-1I . + MOVE 12.E2 TO C-1J . + MOVE 12.E3 TO C-1K . + MOVE 12.E4 TO C-1L . + MOVE 12.E5 TO C-1M . + MOVE 12.E6 TO C-1N . + MOVE 12.E7 TO C-1O . + MOVE 12.E8 TO C-1P . + MOVE 12.E9 TO C-1Q . + MOVE 12.E10 TO C-1R . + MOVE 12.E11 TO C-1S . + PERFORM DISPLAY-COMP-1. + DISPLAY "Variations on COMP-2 12.3456789098765" + PERFORM DISPLAY-COMP-2. + DISPLAY "Variations on COMP-2 12." + MOVE 12.E-7 TO C-2A . + MOVE 12.E-6 TO C-2B . + MOVE 12.E-5 TO C-2C . + MOVE 12.E-4 TO C-2D . + MOVE 12.E-3 TO C-2E . + MOVE 12.E-2 TO C-2F . + MOVE 12.E-1 TO C-2G . + MOVE 12.E0 TO C-2H . + MOVE 12.E1 TO C-2I . + MOVE 12.E2 TO C-2J . + MOVE 12.E3 TO C-2K . + MOVE 12.E4 TO C-2L . + MOVE 12.E5 TO C-2M . + MOVE 12.E6 TO C-2N . + MOVE 12.E7 TO C-2O . + MOVE 12.E8 TO C-2P . + MOVE 12.E9 TO C-2Q . + MOVE 12.E10 TO C-2R . + MOVE 12.E11 TO C-2S . + MOVE 12.E12 TO C-2T . + MOVE 12.E13 TO C-2U . + MOVE 12.E14 TO C-2V . + MOVE 12.E15 TO C-2W . + MOVE 12.E16 TO C-2X . + PERFORM DISPLAY-COMP-2. + DISPLAY "Variations on FLOAT-EXTENDED 11.11222233334444995555666677778888" + PERFORM DISPLAY-EXTENDED. + GOBACK. + DISPLAY-COMP-1. + DISPLAY C-1A + DISPLAY C-1B + DISPLAY C-1C + DISPLAY C-1D + DISPLAY C-1E + DISPLAY C-1F + DISPLAY C-1G + DISPLAY C-1H + DISPLAY C-1I + DISPLAY C-1J + DISPLAY C-1K + DISPLAY C-1L + DISPLAY C-1M + DISPLAY C-1N. + DISPLAY-COMP-2. + DISPLAY C-2A + DISPLAY C-2B + DISPLAY C-2C + DISPLAY C-2D + DISPLAY C-2E + DISPLAY C-2F + DISPLAY C-2G + DISPLAY C-2H + DISPLAY C-2I + DISPLAY C-2J + DISPLAY C-2K + DISPLAY C-2L + DISPLAY C-2M + DISPLAY C-2N. + DISPLAY-EXTENDED. + DISPLAY C-EA + DISPLAY C-EB + DISPLAY C-EC + DISPLAY C-ED + DISPLAY C-EE + DISPLAY C-EF + DISPLAY C-EG + DISPLAY C-EH + DISPLAY C-EI + DISPLAY C-EJ + DISPLAY C-EK + DISPLAY C-EL + DISPLAY C-EM + DISPLAY C-EN. + END PROGRAM float-demo. + diff --git a/gcc/testsuite/cobol.dg/group2/Simple_floating-point_VALUE_and_MOVE.out b/gcc/testsuite/cobol.dg/group2/Simple_floating-point_VALUE_and_MOVE.out new file mode 100644 index 0000000..bf1afbf --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/Simple_floating-point_VALUE_and_MOVE.out @@ -0,0 +1,61 @@ +Variations on COMP-1 12. +1.200000042E-06 +1.200000042E-05 +0.000119999997 +0.001200000057 +0.0120000001 +0.1199999973 +1.200000048 +12 +120 +1200 +12000 +120000 +1.2E+06 +1.2E+07 +Variations on COMP-2 12.3456789098765 +1.23456789098764994E-06 +1.23456789098764994E-05 +0.000123456789098764987 +0.00123456789098764998 +0.0123456789098764994 +0.123456789098764994 +1.23456789098765007 +12.3456789098765007 +123.456789098765 +1234.56789098764989 +12345.6789098765003 +123456.789098765003 +1.23456789098765003E+06 +1.23456789098764993E+07 +Variations on COMP-2 12. +1.19999999999999995E-06 +1.20000000000000003E-05 +0.000120000000000000003 +0.00119999999999999989 +0.0120000000000000002 +0.119999999999999996 +1.19999999999999996 +12 +120 +1200 +12000 +120000 +1.2E+06 +1.2E+07 +Variations on FLOAT-EXTENDED 11.11222233334444995555666677778888 +1.111222233334444995555666677778887977E-06 +1.11122223333444499555566667777888794E-05 +0.0001111222233334444995555666677778887999 +0.001111222233334444995555666677778888046 +0.01111222233334444995555666677778887971 +0.1111222233334444995555666677778887971 +1.111222233334444995555666677778887923 +11.11222233334444995555666677778888 +111.1222233334444995555666677778888062 +1111.222233334444995555666677778888012 +11112.22233334444995555666677778888052 +111122.2233334444995555666677778887957 +1.111222233334444995555666677778887982E+06 +1.111222233334444995555666677778888023E+07 + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_1.cob b/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_1.cob new file mode 100644 index 0000000..442888b --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_1.cob @@ -0,0 +1,90 @@ + *> { dg-do run } + *> { dg-output-file "group2/floating-point_ADD_FORMAT_1.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-arith1. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 S1 PIC 999V99 DISPLAY VALUE 123.45 . + 01 S2 PIC 999V99 COMP VALUE 123.45 . + 01 S3 PIC 999V99 COMP-3 VALUE 123.45 . + 01 S4 PIC 999V99 COMP-5 VALUE 123.45 . + 01 S5 FLOAT-SHORT VALUE 123.45 . + 01 S6 FLOAT-LONG VALUE 123.45 . + 01 S7 FLOAT-EXTENDED VALUE 123.45 . + 01 D1 PIC 999V99 DISPLAY . + 01 D2 PIC 999V99 COMP . + 01 D3 PIC 999V99 COMP-3 . + 01 D4 PIC 999V99 COMP-5 . + 01 D5 FLOAT-SHORT . + 01 D6 FLOAT-LONG . + 01 D7 FLOAT-EXTENDED . + PROCEDURE DIVISION. + MOVE S1 TO D1 ADD S1 TO D1 + MOVE S2 TO D2 ADD S2 TO D2 + MOVE S3 TO D3 ADD S3 TO D3 + MOVE S4 TO D4 ADD S4 TO D4 + MOVE S5 TO D5 ADD S5 TO D5 + MOVE S6 TO D6 ADD S6 TO D6 + MOVE S7 TO D7 ADD S7 TO D7 + PERFORM DISPLAY-D. + MOVE S1 TO D1 ADD S2 TO D1 + MOVE S2 TO D2 ADD S3 TO D2 + MOVE S3 TO D3 ADD S4 TO D3 + MOVE S4 TO D4 ADD S5 TO D4 + MOVE S5 TO D5 ADD S6 TO D5 + MOVE S6 TO D6 ADD S7 TO D6 + MOVE S7 TO D7 ADD S1 TO D7 + PERFORM DISPLAY-D. + MOVE S1 TO D1 ADD S3 TO D1 + MOVE S2 TO D2 ADD S4 TO D2 + MOVE S3 TO D3 ADD S5 TO D3 + MOVE S4 TO D4 ADD S6 TO D4 + MOVE S5 TO D5 ADD S7 TO D5 + MOVE S6 TO D6 ADD S1 TO D6 + MOVE S7 TO D7 ADD S2 TO D7 + PERFORM DISPLAY-D. + MOVE S1 TO D1 ADD S4 TO D1 + MOVE S2 TO D2 ADD S5 TO D2 + MOVE S3 TO D3 ADD S6 TO D3 + MOVE S4 TO D4 ADD S7 TO D4 + MOVE S5 TO D5 ADD S1 TO D5 + MOVE S6 TO D6 ADD S2 TO D6 + MOVE S7 TO D7 ADD S3 TO D7 + PERFORM DISPLAY-D. + MOVE S1 TO D1 ADD S5 TO D1 + MOVE S2 TO D2 ADD S6 TO D2 + MOVE S3 TO D3 ADD S7 TO D3 + MOVE S4 TO D4 ADD S1 TO D4 + MOVE S5 TO D5 ADD S2 TO D5 + MOVE S6 TO D6 ADD S3 TO D6 + MOVE S7 TO D7 ADD S4 TO D7 + PERFORM DISPLAY-D. + MOVE S1 TO D1 ADD S6 TO D1 + MOVE S2 TO D2 ADD S7 TO D2 + MOVE S3 TO D3 ADD S1 TO D3 + MOVE S4 TO D4 ADD S2 TO D4 + MOVE S5 TO D5 ADD S3 TO D5 + MOVE S6 TO D6 ADD S4 TO D6 + MOVE S7 TO D7 ADD S5 TO D7 + PERFORM DISPLAY-D. + MOVE S1 TO D1 ADD S7 TO D1 + MOVE S2 TO D2 ADD S1 TO D2 + MOVE S3 TO D3 ADD S2 TO D3 + MOVE S4 TO D4 ADD S3 TO D4 + MOVE S5 TO D5 ADD S4 TO D5 + MOVE S6 TO D6 ADD S5 TO D6 + MOVE S7 TO D7 ADD S6 TO D7 + PERFORM DISPLAY-D. + GOBACK. + DISPLAY-D. + DISPLAY D1 SPACE + D2 SPACE + D3 SPACE + D4 SPACE + D5 SPACE + D6 SPACE + D7 . + MOVE 0 TO D1 D2 D3 D4 D5 D6 D7. + END PROGRAM float-arith1. + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_1.out b/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_1.out new file mode 100644 index 0000000..d48643c --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_1.out @@ -0,0 +1,8 @@ +246.90 246.90 246.90 246.90 246.8999939 246.900000000000006 246.9000000000000000000000000000000049 +246.90 246.90 246.90 246.89 246.8999939 246.900000000000006 246.9000000000000000000000000000000049 +246.90 246.90 246.89 246.90 246.8999939 246.900000000000006 246.9000000000000000000000000000000049 +246.90 246.89 246.90 246.90 246.8999939 246.900000000000006 246.9000000000000000000000000000000049 +246.89 246.90 246.90 246.90 246.8999939 246.900000000000006 246.9000000000000000000000000000000049 +246.90 246.90 246.90 246.90 246.8999939 246.900000000000006 246.8999969482421874999999999999999901 +246.90 246.90 246.90 246.90 246.8999939 246.899996948242176 246.9000000000000028421709430404007336 + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_2.cob b/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_2.cob new file mode 100644 index 0000000..ef3f730 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_2.cob @@ -0,0 +1,96 @@ + *> { dg-do run } + *> { dg-output-file "group2/floating-point_ADD_FORMAT_2.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-add2. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 S1 PIC 999V99 DISPLAY VALUE 123.45 . + 01 S2 PIC 999V99 COMP VALUE 123.45 . + 01 S3 PIC 999V99 COMP-3 VALUE 123.45 . + 01 S4 PIC 999V99 COMP-5 VALUE 123.45 . + 01 S5 FLOAT-SHORT VALUE 123.45 . + 01 S6 FLOAT-LONG VALUE 123.45 . + 01 S7 FLOAT-EXTENDED VALUE 123.45 . + 01 D1 PIC 999V99 DISPLAY VALUE 543.21 . + 01 D2 PIC 999V99 COMP VALUE 543.21 . + 01 D3 PIC 999V99 COMP-3 VALUE 543.21 . + 01 D4 PIC 999V99 COMP-5 VALUE 543.21 . + 01 D5 FLOAT-SHORT VALUE 543.21 . + 01 D6 FLOAT-LONG VALUE 543.21 . + 01 D7 FLOAT-EXTENDED VALUE 543.21 . + 01 X1 PIC 999V99 DISPLAY . + 01 X2 PIC 999V99 COMP . + 01 X3 PIC 999V99 COMP-3 . + 01 X4 PIC 999V99 COMP-5 . + 01 X5 FLOAT-SHORT . + 01 X6 FLOAT-LONG . + 01 X7 FLOAT-EXTENDED . + PROCEDURE DIVISION. + ADD S1 TO D1 GIVING X1 + ADD S2 TO D2 GIVING X2 + ADD S3 TO D3 GIVING X3 + ADD S4 TO D4 GIVING X4 + ADD S5 TO D5 GIVING X5 + ADD S6 TO D6 GIVING X6 + ADD S7 TO D7 GIVING X7 + PERFORM DISPLAY-X. + ADD S2 TO D1 GIVING X1 + ADD S3 TO D2 GIVING X2 + ADD S4 TO D3 GIVING X3 + ADD S5 TO D4 GIVING X4 + ADD S6 TO D5 GIVING X5 + ADD S7 TO D6 GIVING X6 + ADD S1 TO D7 GIVING X7 + PERFORM DISPLAY-X. + ADD S3 TO D1 GIVING X1 + ADD S4 TO D2 GIVING X2 + ADD S5 TO D3 GIVING X3 + ADD S6 TO D4 GIVING X4 + ADD S7 TO D5 GIVING X5 + ADD S1 TO D6 GIVING X6 + ADD S2 TO D7 GIVING X7 + PERFORM DISPLAY-X. + ADD S4 TO D1 GIVING X1 + ADD S5 TO D2 GIVING X2 + ADD S6 TO D3 GIVING X3 + ADD S7 TO D4 GIVING X4 + ADD S1 TO D5 GIVING X5 + ADD S2 TO D6 GIVING X6 + ADD S3 TO D7 GIVING X7 + PERFORM DISPLAY-X. + ADD S5 TO D1 GIVING X1 + ADD S6 TO D2 GIVING X2 + ADD S7 TO D3 GIVING X3 + ADD S1 TO D4 GIVING X4 + ADD S2 TO D5 GIVING X5 + ADD S3 TO D6 GIVING X6 + ADD S4 TO D7 GIVING X7 + PERFORM DISPLAY-X. + ADD S6 TO D1 GIVING X1 + ADD S7 TO D2 GIVING X2 + ADD S1 TO D3 GIVING X3 + ADD S2 TO D4 GIVING X4 + ADD S3 TO D5 GIVING X5 + ADD S4 TO D6 GIVING X6 + ADD S5 TO D7 GIVING X7 + PERFORM DISPLAY-X. + ADD S7 TO D1 GIVING X1 + ADD S1 TO D2 GIVING X2 + ADD S2 TO D3 GIVING X3 + ADD S3 TO D4 GIVING X4 + ADD S4 TO D5 GIVING X5 + ADD S5 TO D6 GIVING X6 + ADD S6 TO D7 GIVING X7 + PERFORM DISPLAY-X. + GOBACK. + DISPLAY-X. + DISPLAY X1 SPACE + X2 SPACE + X3 SPACE + X4 SPACE + X5 SPACE + X6 SPACE + X7 . + END PROGRAM float-add2. + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_2.out b/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_2.out new file mode 100644 index 0000000..933b56d --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_ADD_FORMAT_2.out @@ -0,0 +1,8 @@ +666.66 666.66 666.66 666.66 666.6600342 666.660000000000082 666.660000000000000000000000000000071 +666.66 666.66 666.66 666.65 666.6600342 666.660000000000082 666.660000000000000000000000000000071 +666.66 666.66 666.65 666.66 666.6600342 666.660000000000082 666.660000000000000000000000000000071 +666.66 666.65 666.66 666.66 666.6600342 666.660000000000082 666.660000000000000000000000000000071 +666.65 666.66 666.66 666.66 666.6600342 666.660000000000082 666.660000000000000000000000000000071 +666.66 666.66 666.66 666.66 666.6600342 666.660000000000082 666.6599969482421875000000000000000316 +666.66 666.66 666.66 666.66 666.6600342 666.659996948242224 666.660000000000002842170943040400775 + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_1.cob b/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_1.cob new file mode 100644 index 0000000..efe3d97 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_1.cob @@ -0,0 +1,90 @@ + *> { dg-do run } + *> { dg-output-file "group2/floating-point_DIVIDE_FORMAT_1.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-div1. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 S1 PIC 999V99 DISPLAY VALUE 1.1 . + 01 S2 PIC 999V99 COMP VALUE 1.1 . + 01 S3 PIC 999V99 COMP-3 VALUE 1.1 . + 01 S4 PIC 999V99 COMP-5 VALUE 1.1 . + 01 S5 FLOAT-SHORT VALUE 1.1 . + 01 S6 FLOAT-LONG VALUE 1.1 . + 01 S7 FLOAT-EXTENDED VALUE 1.1 . + 01 D1 PIC 999V99 DISPLAY VALUE 611.05. + 01 D2 PIC 999V99 COMP VALUE 611.05. + 01 D3 PIC 999V99 COMP-3 VALUE 611.05. + 01 D4 PIC 999V99 COMP-5 VALUE 611.05. + 01 D5 FLOAT-SHORT VALUE 611.05. + 01 D6 FLOAT-LONG VALUE 611.05. + 01 D7 FLOAT-EXTENDED VALUE 611.05. + PROCEDURE DIVISION. + DIVIDE S1 INTO D1 + DIVIDE S2 INTO D2 + DIVIDE S3 INTO D3 + DIVIDE S4 INTO D4 + DIVIDE S5 INTO D5 + DIVIDE S6 INTO D6 + DIVIDE S7 INTO D7 + PERFORM DISPLAY-D. + DIVIDE S1 INTO D2 + DIVIDE S2 INTO D3 + DIVIDE S3 INTO D4 + DIVIDE S4 INTO D5 + DIVIDE S5 INTO D6 + DIVIDE S6 INTO D7 + DIVIDE S7 INTO D1 + PERFORM DISPLAY-D. + DIVIDE S1 INTO D3 + DIVIDE S2 INTO D4 + DIVIDE S3 INTO D5 + DIVIDE S4 INTO D6 + DIVIDE S5 INTO D7 + DIVIDE S6 INTO D1 + DIVIDE S7 INTO D2 + PERFORM DISPLAY-D. + DIVIDE S1 INTO D4 + DIVIDE S2 INTO D5 + DIVIDE S3 INTO D6 + DIVIDE S4 INTO D7 + DIVIDE S5 INTO D1 + DIVIDE S6 INTO D2 + DIVIDE S7 INTO D3 + PERFORM DISPLAY-D. + DIVIDE S1 INTO D5 + DIVIDE S2 INTO D6 + DIVIDE S3 INTO D7 + DIVIDE S4 INTO D1 + DIVIDE S5 INTO D2 + DIVIDE S6 INTO D3 + DIVIDE S7 INTO D4 + PERFORM DISPLAY-D. + DIVIDE S1 INTO D6 + DIVIDE S2 INTO D7 + DIVIDE S3 INTO D1 + DIVIDE S4 INTO D2 + DIVIDE S5 INTO D3 + DIVIDE S6 INTO D4 + DIVIDE S7 INTO D5 + PERFORM DISPLAY-D. + DIVIDE S1 INTO D7 + DIVIDE S2 INTO D1 + DIVIDE S3 INTO D2 + DIVIDE S4 INTO D3 + DIVIDE S5 INTO D4 + DIVIDE S6 INTO D5 + DIVIDE S7 INTO D6 + PERFORM DISPLAY-D. + GOBACK. + DISPLAY-D. + DISPLAY D1 SPACE + D2 SPACE + D3 SPACE + D4 SPACE + D5 SPACE + D6 SPACE + D7 . + INITIALIZE D1 D2 D3 D4 D5 D6 D7 ALL VALUE. + END PROGRAM float-div1. + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_1.out b/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_1.out new file mode 100644 index 0000000..cc7a177 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_1.out @@ -0,0 +1,8 @@ +555.50 555.50 555.50 555.50 555.5 555.499999999999886 555.4999999999999999999999999999999014 +555.49 555.50 555.50 555.50 555.5 555.499987959861983 555.4999999999999551469898051436793168 +555.49 555.49 555.50 555.50 555.5 555.5 555.4999879598620163340565002169066332 +555.49 555.49 555.49 555.50 555.5 555.5 555.4999999999999999999999999999999014 +555.50 555.49 555.49 555.49 555.5 555.5 555.4999999999999999999999999999999014 +555.50 555.50 555.49 555.49 555.5 555.5 555.4999999999999999999999999999999014 +555.50 555.50 555.50 555.49 555.5 555.5 555.4999999999999999999999999999999014 + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_2.cob b/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_2.cob new file mode 100644 index 0000000..068844b --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_2.cob @@ -0,0 +1,96 @@ + *> { dg-do run } + *> { dg-output-file "group2/floating-point_DIVIDE_FORMAT_2.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-DIVIDE2. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 S1 PIC 999V99 DISPLAY VALUE 123.21 . + 01 S2 PIC 999V99 COMP VALUE 123.21 . + 01 S3 PIC 999V99 COMP-3 VALUE 123.21 . + 01 S4 PIC 999V99 COMP-5 VALUE 123.21 . + 01 S5 FLOAT-SHORT VALUE 123.21 . + 01 S6 FLOAT-LONG VALUE 123.21 . + 01 S7 FLOAT-EXTENDED VALUE 123.21 . + 01 D1 PIC 999V99 DISPLAY VALUE 111.00 . + 01 D2 PIC 999V99 COMP VALUE 111.00 . + 01 D3 PIC 999V99 COMP-3 VALUE 111.00 . + 01 D4 PIC 999V99 COMP-5 VALUE 111.00 . + 01 D5 FLOAT-SHORT VALUE 111.00 . + 01 D6 FLOAT-LONG VALUE 111.00 . + 01 D7 FLOAT-EXTENDED VALUE 111.00 . + 01 X1 PIC 999V99 DISPLAY . + 01 X2 PIC 999V99 COMP . + 01 X3 PIC 999V99 COMP-3 . + 01 X4 PIC 999V99 COMP-5 . + 01 X5 FLOAT-SHORT . + 01 X6 FLOAT-LONG . + 01 X7 FLOAT-EXTENDED . + PROCEDURE DIVISION. + DIVIDE S1 BY D1 GIVING X1 + DIVIDE S2 BY D2 GIVING X2 + DIVIDE S3 BY D3 GIVING X3 + DIVIDE S4 BY D4 GIVING X4 + DIVIDE S5 BY D5 GIVING X5 + DIVIDE S6 BY D6 GIVING X6 + DIVIDE S7 BY D7 GIVING X7 + PERFORM DISPLAY-X. + DIVIDE S2 BY D1 GIVING X1 + DIVIDE S3 BY D2 GIVING X2 + DIVIDE S4 BY D3 GIVING X3 + DIVIDE S5 BY D4 GIVING X4 + DIVIDE S6 BY D5 GIVING X5 + DIVIDE S7 BY D6 GIVING X6 + DIVIDE S1 BY D7 GIVING X7 + PERFORM DISPLAY-X. + DIVIDE S3 BY D1 GIVING X1 + DIVIDE S4 BY D2 GIVING X2 + DIVIDE S5 BY D3 GIVING X3 + DIVIDE S6 BY D4 GIVING X4 + DIVIDE S7 BY D5 GIVING X5 + DIVIDE S1 BY D6 GIVING X6 + DIVIDE S2 BY D7 GIVING X7 + PERFORM DISPLAY-X. + DIVIDE S4 BY D1 GIVING X1 + DIVIDE S5 BY D2 GIVING X2 + DIVIDE S6 BY D3 GIVING X3 + DIVIDE S7 BY D4 GIVING X4 + DIVIDE S1 BY D5 GIVING X5 + DIVIDE S2 BY D6 GIVING X6 + DIVIDE S3 BY D7 GIVING X7 + PERFORM DISPLAY-X. + DIVIDE S5 BY D1 GIVING X1 + DIVIDE S6 BY D2 GIVING X2 + DIVIDE S7 BY D3 GIVING X3 + DIVIDE S1 BY D4 GIVING X4 + DIVIDE S2 BY D5 GIVING X5 + DIVIDE S3 BY D6 GIVING X6 + DIVIDE S4 BY D7 GIVING X7 + PERFORM DISPLAY-X. + DIVIDE S6 BY D1 GIVING X1 + DIVIDE S7 BY D2 GIVING X2 + DIVIDE S1 BY D3 GIVING X3 + DIVIDE S2 BY D4 GIVING X4 + DIVIDE S3 BY D5 GIVING X5 + DIVIDE S4 BY D6 GIVING X6 + DIVIDE S5 BY D7 GIVING X7 + PERFORM DISPLAY-X. + DIVIDE S7 BY D1 GIVING X1 + DIVIDE S1 BY D2 GIVING X2 + DIVIDE S2 BY D3 GIVING X3 + DIVIDE S3 BY D4 GIVING X4 + DIVIDE S4 BY D5 GIVING X5 + DIVIDE S5 BY D6 GIVING X6 + DIVIDE S6 BY D7 GIVING X7 + PERFORM DISPLAY-X. + GOBACK. + DISPLAY-X. + DISPLAY X1 SPACE + X2 SPACE + X3 SPACE + X4 SPACE + X5 SPACE + X6 SPACE + X7 . + END PROGRAM float-DIVIDE2. + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_2.out b/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_2.out new file mode 100644 index 0000000..1723f56 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_DIVIDE_FORMAT_2.out @@ -0,0 +1,8 @@ +001.11 001.11 001.11 001.11 1.110000014 1.10999999999999988 1.109999999999999999999999999999999892 +001.11 001.11 001.11 001.10 1.110000014 1.1100000000000001 1.109999999999999999999999999999999892 +001.11 001.11 001.10 001.10 1.110000014 1.1100000000000001 1.109999999999999999999999999999999892 +001.11 001.10 001.10 001.10 1.110000014 1.1100000000000001 1.109999999999999999999999999999999892 +001.10 001.10 001.10 001.11 1.110000014 1.1100000000000001 1.109999999999999999999999999999999892 +001.10 001.10 001.11 001.11 1.110000014 1.1100000000000001 1.10999999175200591216216216216216224 +001.10 001.11 001.11 001.11 1.110000014 1.10999999175200581 1.109999999999999943668684011811877144 + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_1.cob b/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_1.cob new file mode 100644 index 0000000..4365a40 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_1.cob @@ -0,0 +1,90 @@ + *> { dg-do run } + *> { dg-output-file "group2/floating-point_MULTIPLY_FORMAT_1.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-mult1. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 S1 PIC 999V99 DISPLAY VALUE 1.2 . + 01 S2 PIC 999V99 COMP VALUE 1.2 . + 01 S3 PIC 999V99 COMP-3 VALUE 1.2 . + 01 S4 PIC 999V99 COMP-5 VALUE 1.2 . + 01 S5 FLOAT-SHORT VALUE 1.2 . + 01 S6 FLOAT-LONG VALUE 1.2 . + 01 S7 FLOAT-EXTENDED VALUE 1.2 . + 01 D1 PIC 999V99 DISPLAY VALUE 1.1. + 01 D2 PIC 999V99 COMP VALUE 1.1. + 01 D3 PIC 999V99 COMP-3 VALUE 1.1. + 01 D4 PIC 999V99 COMP-5 VALUE 1.1. + 01 D5 FLOAT-SHORT VALUE 1.1. + 01 D6 FLOAT-LONG VALUE 1.1. + 01 D7 FLOAT-EXTENDED VALUE 1.1. + PROCEDURE DIVISION. + MULTIPLY S1 BY D1 + MULTIPLY S2 BY D2 + MULTIPLY S3 BY D3 + MULTIPLY S4 BY D4 + MULTIPLY S5 BY D5 + MULTIPLY S6 BY D6 + MULTIPLY S7 BY D7 + PERFORM DISPLAY-D. + MULTIPLY S1 BY D2 + MULTIPLY S2 BY D3 + MULTIPLY S3 BY D4 + MULTIPLY S4 BY D5 + MULTIPLY S5 BY D6 + MULTIPLY S6 BY D7 + MULTIPLY S7 BY D1 + PERFORM DISPLAY-D. + MULTIPLY S1 BY D3 + MULTIPLY S2 BY D4 + MULTIPLY S3 BY D5 + MULTIPLY S4 BY D6 + MULTIPLY S5 BY D7 + MULTIPLY S6 BY D1 + MULTIPLY S7 BY D2 + PERFORM DISPLAY-D. + MULTIPLY S1 BY D4 + MULTIPLY S2 BY D5 + MULTIPLY S3 BY D6 + MULTIPLY S4 BY D7 + MULTIPLY S5 BY D1 + MULTIPLY S6 BY D2 + MULTIPLY S7 BY D3 + PERFORM DISPLAY-D. + MULTIPLY S1 BY D5 + MULTIPLY S2 BY D6 + MULTIPLY S3 BY D7 + MULTIPLY S4 BY D1 + MULTIPLY S5 BY D2 + MULTIPLY S6 BY D3 + MULTIPLY S7 BY D4 + PERFORM DISPLAY-D. + MULTIPLY S1 BY D6 + MULTIPLY S2 BY D7 + MULTIPLY S3 BY D1 + MULTIPLY S4 BY D2 + MULTIPLY S5 BY D3 + MULTIPLY S6 BY D4 + MULTIPLY S7 BY D5 + PERFORM DISPLAY-D. + MULTIPLY S1 BY D7 + MULTIPLY S2 BY D1 + MULTIPLY S3 BY D2 + MULTIPLY S4 BY D3 + MULTIPLY S5 BY D4 + MULTIPLY S6 BY D5 + MULTIPLY S7 BY D6 + PERFORM DISPLAY-D. + GOBACK. + DISPLAY-D. + DISPLAY D1 SPACE + D2 SPACE + D3 SPACE + D4 SPACE + D5 SPACE + D6 SPACE + D7 . + INITIALIZE D1 D2 D3 D4 D5 D6 D7 ALL VALUE. + END PROGRAM float-mult1. + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_1.out b/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_1.out new file mode 100644 index 0000000..2722545 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_1.out @@ -0,0 +1,8 @@ +001.32 001.32 001.32 001.32 1.320000052 1.32000000000000006 1.320000000000000000000000000000000054 +001.32 001.32 001.32 001.32 1.320000052 1.3200000524520874 1.319999999999999951150186916493112221 +001.31 001.32 001.32 001.32 1.320000052 1.32000000000000006 1.32000005245208740234375 +001.32 001.31 001.32 001.32 1.320000052 1.32000000000000006 1.320000000000000000000000000000000054 +001.32 001.32 001.31 001.32 1.320000052 1.32000000000000006 1.320000000000000000000000000000000054 +001.32 001.32 001.32 001.31 1.320000052 1.32000000000000006 1.320000000000000000000000000000000054 +001.32 001.32 001.32 001.32 1.320000052 1.32000000000000006 1.320000000000000000000000000000000054 + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_2.cob b/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_2.cob new file mode 100644 index 0000000..183f1af --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_2.cob @@ -0,0 +1,96 @@ + *> { dg-do run } + *> { dg-output-file "group2/floating-point_MULTIPLY_FORMAT_2.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-MULTIPLY2. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 S1 PIC 999V99 DISPLAY VALUE 111.00 . + 01 S2 PIC 999V99 COMP VALUE 111.00 . + 01 S3 PIC 999V99 COMP-3 VALUE 111.00 . + 01 S4 PIC 999V99 COMP-5 VALUE 111.00 . + 01 S5 FLOAT-SHORT VALUE 111.00 . + 01 S6 FLOAT-LONG VALUE 111.00 . + 01 S7 FLOAT-EXTENDED VALUE 111.00 . + 01 D1 PIC 999V99 DISPLAY VALUE 1.11 . + 01 D2 PIC 999V99 COMP VALUE 1.11 . + 01 D3 PIC 999V99 COMP-3 VALUE 1.11 . + 01 D4 PIC 999V99 COMP-5 VALUE 1.11 . + 01 D5 FLOAT-SHORT VALUE 1.11 . + 01 D6 FLOAT-LONG VALUE 1.11 . + 01 D7 FLOAT-EXTENDED VALUE 1.11 . + 01 X1 PIC 999V99 DISPLAY . + 01 X2 PIC 999V99 COMP . + 01 X3 PIC 999V99 COMP-3 . + 01 X4 PIC 999V99 COMP-5 . + 01 X5 FLOAT-SHORT . + 01 X6 FLOAT-LONG . + 01 X7 FLOAT-EXTENDED . + PROCEDURE DIVISION. + MULTIPLY S1 BY D1 GIVING X1 + MULTIPLY S2 BY D2 GIVING X2 + MULTIPLY S3 BY D3 GIVING X3 + MULTIPLY S4 BY D4 GIVING X4 + MULTIPLY S5 BY D5 GIVING X5 + MULTIPLY S6 BY D6 GIVING X6 + MULTIPLY S7 BY D7 GIVING X7 + PERFORM DISPLAY-X. + MULTIPLY S2 BY D1 GIVING X1 + MULTIPLY S3 BY D2 GIVING X2 + MULTIPLY S4 BY D3 GIVING X3 + MULTIPLY S5 BY D4 GIVING X4 + MULTIPLY S6 BY D5 GIVING X5 + MULTIPLY S7 BY D6 GIVING X6 + MULTIPLY S1 BY D7 GIVING X7 + PERFORM DISPLAY-X. + MULTIPLY S3 BY D1 GIVING X1 + MULTIPLY S4 BY D2 GIVING X2 + MULTIPLY S5 BY D3 GIVING X3 + MULTIPLY S6 BY D4 GIVING X4 + MULTIPLY S7 BY D5 GIVING X5 + MULTIPLY S1 BY D6 GIVING X6 + MULTIPLY S2 BY D7 GIVING X7 + PERFORM DISPLAY-X. + MULTIPLY S4 BY D1 GIVING X1 + MULTIPLY S5 BY D2 GIVING X2 + MULTIPLY S6 BY D3 GIVING X3 + MULTIPLY S7 BY D4 GIVING X4 + MULTIPLY S1 BY D5 GIVING X5 + MULTIPLY S2 BY D6 GIVING X6 + MULTIPLY S3 BY D7 GIVING X7 + PERFORM DISPLAY-X. + MULTIPLY S5 BY D1 GIVING X1 + MULTIPLY S6 BY D2 GIVING X2 + MULTIPLY S7 BY D3 GIVING X3 + MULTIPLY S1 BY D4 GIVING X4 + MULTIPLY S2 BY D5 GIVING X5 + MULTIPLY S3 BY D6 GIVING X6 + MULTIPLY S4 BY D7 GIVING X7 + PERFORM DISPLAY-X. + MULTIPLY S6 BY D1 GIVING X1 + MULTIPLY S7 BY D2 GIVING X2 + MULTIPLY S1 BY D3 GIVING X3 + MULTIPLY S2 BY D4 GIVING X4 + MULTIPLY S3 BY D5 GIVING X5 + MULTIPLY S4 BY D6 GIVING X6 + MULTIPLY S5 BY D7 GIVING X7 + PERFORM DISPLAY-X. + MULTIPLY S7 BY D1 GIVING X1 + MULTIPLY S1 BY D2 GIVING X2 + MULTIPLY S2 BY D3 GIVING X3 + MULTIPLY S3 BY D4 GIVING X4 + MULTIPLY S4 BY D5 GIVING X5 + MULTIPLY S5 BY D6 GIVING X6 + MULTIPLY S6 BY D7 GIVING X7 + PERFORM DISPLAY-X. + GOBACK. + DISPLAY-X. + DISPLAY X1 SPACE + X2 SPACE + X3 SPACE + X4 SPACE + X5 SPACE + X6 SPACE + X7 . + END PROGRAM float-MULTIPLY2. + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_2.out b/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_2.out new file mode 100644 index 0000000..c8f6231 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_MULTIPLY_FORMAT_2.out @@ -0,0 +1,8 @@ +123.21 123.21 123.21 123.21 123.2099991 123.210000000000008 123.2100000000000000000000000000000069 +123.21 123.21 123.21 123.21 123.2099991 123.210000000000008 123.2100000000000000000000000000000069 +123.21 123.21 123.21 123.21 123.2099991 123.210000000000008 123.2100000000000000000000000000000069 +123.21 123.21 123.21 123.21 123.2099991 123.210000000000008 123.2100000000000000000000000000000069 +123.21 123.21 123.21 123.21 123.2099991 123.210000000000008 123.2100000000000000000000000000000069 +123.21 123.21 123.21 123.21 123.2099991 123.210000000000008 123.2100000000000000000000000000000069 +123.21 123.21 123.21 123.21 123.2099991 123.210000000000008 123.2100000000000000000000000000000069 + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_1.cob b/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_1.cob new file mode 100644 index 0000000..7ba8161 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_1.cob @@ -0,0 +1,90 @@ + *> { dg-do run } + *> { dg-output-file "group2/floating-point_SUBTRACT_FORMAT_1.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-sub1. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 S1 PIC 999V99 DISPLAY VALUE 111.11 . + 01 S2 PIC 999V99 COMP VALUE 111.11 . + 01 S3 PIC 999V99 COMP-3 VALUE 111.11 . + 01 S4 PIC 999V99 COMP-5 VALUE 111.11 . + 01 S5 FLOAT-SHORT VALUE 111.11 . + 01 S6 FLOAT-LONG VALUE 111.11 . + 01 S7 FLOAT-EXTENDED VALUE 111.11 . + 01 D1 PIC 999V99 DISPLAY VALUE 666.66. + 01 D2 PIC 999V99 COMP VALUE 666.66. + 01 D3 PIC 999V99 COMP-3 VALUE 666.66. + 01 D4 PIC 999V99 COMP-5 VALUE 666.66. + 01 D5 FLOAT-SHORT VALUE 666.66. + 01 D6 FLOAT-LONG VALUE 666.66. + 01 D7 FLOAT-EXTENDED VALUE 666.66. + PROCEDURE DIVISION. + SUBTRACT S1 FROM D1 + SUBTRACT S1 FROM D2 + SUBTRACT S1 FROM D3 + SUBTRACT S1 FROM D4 + SUBTRACT S1 FROM D5 + SUBTRACT S1 FROM D6 + SUBTRACT S1 FROM D7 + PERFORM DISPLAY-D. + SUBTRACT S2 FROM D2 + SUBTRACT S2 FROM D3 + SUBTRACT S2 FROM D4 + SUBTRACT S2 FROM D5 + SUBTRACT S2 FROM D6 + SUBTRACT S2 FROM D7 + SUBTRACT S2 FROM D1 + PERFORM DISPLAY-D. + SUBTRACT S3 FROM D3 + SUBTRACT S3 FROM D4 + SUBTRACT S3 FROM D5 + SUBTRACT S3 FROM D6 + SUBTRACT S3 FROM D7 + SUBTRACT S3 FROM D1 + SUBTRACT S3 FROM D2 + PERFORM DISPLAY-D. + SUBTRACT S4 FROM D4 + SUBTRACT S4 FROM D5 + SUBTRACT S4 FROM D6 + SUBTRACT S4 FROM D7 + SUBTRACT S4 FROM D1 + SUBTRACT S4 FROM D2 + SUBTRACT S4 FROM D3 + PERFORM DISPLAY-D. + SUBTRACT S5 FROM D5 + SUBTRACT S5 FROM D6 + SUBTRACT S5 FROM D7 + SUBTRACT S5 FROM D1 + SUBTRACT S5 FROM D2 + SUBTRACT S5 FROM D3 + SUBTRACT S5 FROM D4 + PERFORM DISPLAY-D. + SUBTRACT S6 FROM D6 + SUBTRACT S6 FROM D7 + SUBTRACT S6 FROM D1 + SUBTRACT S6 FROM D2 + SUBTRACT S6 FROM D3 + SUBTRACT S6 FROM D4 + SUBTRACT S6 FROM D5 + PERFORM DISPLAY-D. + SUBTRACT S7 FROM D7 + SUBTRACT S7 FROM D1 + SUBTRACT S7 FROM D2 + SUBTRACT S7 FROM D3 + SUBTRACT S7 FROM D4 + SUBTRACT S7 FROM D5 + SUBTRACT S7 FROM D6 + PERFORM DISPLAY-D. + GOBACK. + DISPLAY-D. + DISPLAY D1 SPACE + D2 SPACE + D3 SPACE + D4 SPACE + D5 SPACE + D6 SPACE + D7 . + INITIALIZE D1 D2 D3 D4 D5 D6 D7 ALL VALUE. + END PROGRAM float-sub1. + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_1.out b/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_1.out new file mode 100644 index 0000000..39978ac --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_1.out @@ -0,0 +1,8 @@ +555.55 555.55 555.55 555.55 555.5499878 555.549999999999955 555.5499999999999999999999999999999606 +555.55 555.55 555.55 555.55 555.5499878 555.549999999999955 555.5499999999999999999999999999999606 +555.55 555.55 555.55 555.55 555.5499878 555.549999999999955 555.5499999999999999999999999999999606 +555.55 555.55 555.55 555.55 555.5499878 555.549999999999955 555.5499999999999999999999999999999606 +555.54 555.54 555.54 555.54 555.5499878 555.549999389648406 555.5499993896484374999999999999999724 +555.55 555.55 555.55 555.55 555.5499878 555.549999999999955 555.5500000000000005684341886080801211 +555.54 555.54 555.54 555.54 555.5499878 555.549999999999955 555.5499999999999999999999999999999606 + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_2.cob b/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_2.cob new file mode 100644 index 0000000..fa7d6a1 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_2.cob @@ -0,0 +1,96 @@ + *> { dg-do run } + *> { dg-output-file "group2/floating-point_SUBTRACT_FORMAT_2.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-SUBTRACT2. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 S1 PIC 999V99 DISPLAY VALUE 123.45 . + 01 S2 PIC 999V99 COMP VALUE 123.45 . + 01 S3 PIC 999V99 COMP-3 VALUE 123.45 . + 01 S4 PIC 999V99 COMP-5 VALUE 123.45 . + 01 S5 FLOAT-SHORT VALUE 123.45 . + 01 S6 FLOAT-LONG VALUE 123.45 . + 01 S7 FLOAT-EXTENDED VALUE 123.45 . + 01 D1 PIC 999V99 DISPLAY VALUE 678.55 . + 01 D2 PIC 999V99 COMP VALUE 678.55 . + 01 D3 PIC 999V99 COMP-3 VALUE 678.55 . + 01 D4 PIC 999V99 COMP-5 VALUE 678.55 . + 01 D5 FLOAT-SHORT VALUE 678.55 . + 01 D6 FLOAT-LONG VALUE 678.55 . + 01 D7 FLOAT-EXTENDED VALUE 678.55 . + 01 X1 PIC 999V99 DISPLAY . + 01 X2 PIC 999V99 COMP . + 01 X3 PIC 999V99 COMP-3 . + 01 X4 PIC 999V99 COMP-5 . + 01 X5 FLOAT-SHORT . + 01 X6 FLOAT-LONG . + 01 X7 FLOAT-EXTENDED . + PROCEDURE DIVISION. + SUBTRACT S1 FROM D1 GIVING X1 + SUBTRACT S2 FROM D2 GIVING X2 + SUBTRACT S3 FROM D3 GIVING X3 + SUBTRACT S4 FROM D4 GIVING X4 + SUBTRACT S5 FROM D5 GIVING X5 + SUBTRACT S6 FROM D6 GIVING X6 + SUBTRACT S7 FROM D7 GIVING X7 + PERFORM DISPLAY-X. + SUBTRACT S2 FROM D1 GIVING X1 + SUBTRACT S3 FROM D2 GIVING X2 + SUBTRACT S4 FROM D3 GIVING X3 + SUBTRACT S5 FROM D4 GIVING X4 + SUBTRACT S6 FROM D5 GIVING X5 + SUBTRACT S7 FROM D6 GIVING X6 + SUBTRACT S1 FROM D7 GIVING X7 + PERFORM DISPLAY-X. + SUBTRACT S3 FROM D1 GIVING X1 + SUBTRACT S4 FROM D2 GIVING X2 + SUBTRACT S5 FROM D3 GIVING X3 + SUBTRACT S6 FROM D4 GIVING X4 + SUBTRACT S7 FROM D5 GIVING X5 + SUBTRACT S1 FROM D6 GIVING X6 + SUBTRACT S2 FROM D7 GIVING X7 + PERFORM DISPLAY-X. + SUBTRACT S4 FROM D1 GIVING X1 + SUBTRACT S5 FROM D2 GIVING X2 + SUBTRACT S6 FROM D3 GIVING X3 + SUBTRACT S7 FROM D4 GIVING X4 + SUBTRACT S1 FROM D5 GIVING X5 + SUBTRACT S2 FROM D6 GIVING X6 + SUBTRACT S3 FROM D7 GIVING X7 + PERFORM DISPLAY-X. + SUBTRACT S5 FROM D1 GIVING X1 + SUBTRACT S6 FROM D2 GIVING X2 + SUBTRACT S7 FROM D3 GIVING X3 + SUBTRACT S1 FROM D4 GIVING X4 + SUBTRACT S2 FROM D5 GIVING X5 + SUBTRACT S3 FROM D6 GIVING X6 + SUBTRACT S4 FROM D7 GIVING X7 + PERFORM DISPLAY-X. + SUBTRACT S6 FROM D1 GIVING X1 + SUBTRACT S7 FROM D2 GIVING X2 + SUBTRACT S1 FROM D3 GIVING X3 + SUBTRACT S2 FROM D4 GIVING X4 + SUBTRACT S3 FROM D5 GIVING X5 + SUBTRACT S4 FROM D6 GIVING X6 + SUBTRACT S5 FROM D7 GIVING X7 + PERFORM DISPLAY-X. + SUBTRACT S7 FROM D1 GIVING X1 + SUBTRACT S1 FROM D2 GIVING X2 + SUBTRACT S2 FROM D3 GIVING X3 + SUBTRACT S3 FROM D4 GIVING X4 + SUBTRACT S4 FROM D5 GIVING X5 + SUBTRACT S5 FROM D6 GIVING X6 + SUBTRACT S6 FROM D7 GIVING X7 + PERFORM DISPLAY-X. + GOBACK. + DISPLAY-X. + DISPLAY X1 SPACE + X2 SPACE + X3 SPACE + X4 SPACE + X5 SPACE + X6 SPACE + X7 . + END PROGRAM float-SUBTRACT2. + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_2.out b/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_2.out new file mode 100644 index 0000000..e0bf4c9 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_SUBTRACT_FORMAT_2.out @@ -0,0 +1,8 @@ +555.10 555.10 555.10 555.10 555.0999756 555.100000000000023 555.1000000000000000000000000000000197 +555.10 555.10 555.10 555.10 555.0999756 555.100000000000023 555.1000000000000000000000000000000197 +555.10 555.10 555.10 555.10 555.0999756 555.100000000000023 555.1000000000000000000000000000000197 +555.10 555.10 555.10 555.10 555.0999756 555.100000000000023 555.1000000000000000000000000000000197 +555.10 555.10 555.10 555.10 555.0999756 555.100000000000023 555.1000000000000000000000000000000197 +555.10 555.10 555.10 555.10 555.0999756 555.100000000000023 555.1000000000000000000000000000000197 +555.10 555.10 555.10 555.10 555.0999756 555.100000000000023 555.1000000000000000000000000000000197 + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_literals.cob b/gcc/testsuite/cobol.dg/group2/floating-point_literals.cob new file mode 100644 index 0000000..51d823207 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_literals.cob @@ -0,0 +1,48 @@ + *> { dg-do run } + *> { dg-output-file "group2/floating-point_literals.out" } + + IDENTIFICATION DIVISION. + PROGRAM-ID. float-literal. + DATA DIVISION. + WORKING-STORAGE SECTION. + 01 D1 PIC 999V9999 DISPLAY . + 01 D2 PIC 999V9999 COMP . + 01 D3 PIC 999V9999 COMP-3 . + 01 D4 PIC 999V9999 COMP-5 . + 01 D5 FLOAT-SHORT . + 01 D6 FLOAT-LONG . + 01 D7 FLOAT-EXTENDED . + PROCEDURE DIVISION. + DISPLAY -555 + DISPLAY -555.55 + DISPLAY -555.55e206 + DISPLAY 555 + DISPLAY 555.55 + DISPLAY 555.55e206 + MOVE 333.33 TO D1 + MOVE 333.33 TO D2 + MOVE 333.33 TO D3 + MOVE 333.33 TO D4 + MOVE 333.33e20 TO D5 + MOVE 333.33e100 TO D6 + MOVE 333.33e200 TO D7 + PERFORM DISPLAY-D. + ADD 222.22 TO D1 + ADD 222.22 TO D2 + ADD 222.22 TO D3 + ADD 222.22 TO D4 + ADD 222.22e20 TO D5 + ADD 222.22e100 TO D6 + ADD 222.22e200 TO D7 + PERFORM DISPLAY-D. + GOBACK. + DISPLAY-D. + DISPLAY D1 SPACE + D2 SPACE + D3 SPACE + D4 SPACE + D5 SPACE + D6 SPACE + D7 . + END PROGRAM float-literal. + diff --git a/gcc/testsuite/cobol.dg/group2/floating-point_literals.out b/gcc/testsuite/cobol.dg/group2/floating-point_literals.out new file mode 100644 index 0000000..6417d01 --- /dev/null +++ b/gcc/testsuite/cobol.dg/group2/floating-point_literals.out @@ -0,0 +1,9 @@ +-555 +-555.55 +-5.5555E+208 +555 +555.55 +5.5555E+208 +333.3300 333.3300 333.3300 333.3300 3.333300083E+22 3.33329999999999994E+102 3.333300000000000000000000000000000168E+202 +555.5500 555.5500 555.5500 555.5500 5.555499988E+22 5.55549999999999973E+102 5.555500000000000000000000000000000029E+202 + diff --git a/gcc/testsuite/cobol.dg/literal1.cob b/gcc/testsuite/cobol.dg/literal1.cob new file mode 100644 index 0000000..43369e0 --- /dev/null +++ b/gcc/testsuite/cobol.dg/literal1.cob @@ -0,0 +1,14 @@ +*> { dg-do run } +*> Make sure we properly round to integer when computing the initial +*> binary representation of a literal +IDENTIFICATION DIVISION. +PROGRAM-ID. literal1. +DATA DIVISION. +WORKING-STORAGE SECTION. + 77 VAR8 PIC 999V9(8) COMP-5 . + 77 VAR555 PIC 999V99999999 COMP-5 VALUE 555.55555555. + PROCEDURE DIVISION. + MOVE 555.55555555 TO VAR8 + ADD 0.00000001 TO VAR555 GIVING VAR8 ROUNDED + IF VAR8 NOT EQUAL TO 555.55555556 STOP RUN ERROR 1. + END PROGRAM literal1. diff --git a/gcc/testsuite/cobol.dg/output1.cob b/gcc/testsuite/cobol.dg/output1.cob new file mode 100644 index 0000000..9475bde --- /dev/null +++ b/gcc/testsuite/cobol.dg/output1.cob @@ -0,0 +1,14 @@ +*> { dg-do run } +*> { dg-output {-0.00012(\n|\r\n|\r)} } +*> { dg-output {0.00012(\n|\r\n|\r)} } +*> { dg-output {1234.66(\n|\r\n|\r)} } +*> { dg-output {-99.8(\n|\r\n|\r)} } +IDENTIFICATION DIVISION. +PROGRAM-ID. output1. +ENVIRONMENT DIVISION. +PROCEDURE DIVISION. + DISPLAY -0.00012 + DISPLAY 0.00012 + DISPLAY 1234.66 + DISPLAY -99.8 + STOP RUN. diff --git a/gcc/testsuite/g++.dg/abi/pure-virtual1.C b/gcc/testsuite/g++.dg/abi/pure-virtual1.C index 59eaf22..ce7cd70 100644 --- a/gcc/testsuite/g++.dg/abi/pure-virtual1.C +++ b/gcc/testsuite/g++.dg/abi/pure-virtual1.C @@ -1,6 +1,6 @@ // Test that we don't need libsupc++ just for __cxa_pure_virtual. // { dg-do link } -// { dg-require-weak } +// { dg-require-weak "" } // { dg-additional-options "-fno-rtti -nostdlib++" } // { dg-additional-options "-Wl,-undefined,dynamic_lookup" { target *-*-darwin* } } // { dg-xfail-if "AIX weak" { powerpc-ibm-aix* } } diff --git a/gcc/testsuite/g++.dg/cpp0x/gen-attrs-6.C b/gcc/testsuite/g++.dg/cpp0x/gen-attrs-6.C index 54071d5..d166add 100644 --- a/gcc/testsuite/g++.dg/cpp0x/gen-attrs-6.C +++ b/gcc/testsuite/g++.dg/cpp0x/gen-attrs-6.C @@ -4,7 +4,7 @@ // // Written by Richard Henderson, 26 May 2002. -// { dg-do link { target c++11} } +// { dg-do link { target c++11 } } extern void foo [[gnu::nothrow]] (); extern void link_error(); diff --git a/gcc/testsuite/g++.dg/cpp0x/udlit-namespace-ambiguous.C b/gcc/testsuite/g++.dg/cpp0x/udlit-namespace-ambiguous.C index c67be390..1ba4c8d 100644 --- a/gcc/testsuite/g++.dg/cpp0x/udlit-namespace-ambiguous.C +++ b/gcc/testsuite/g++.dg/cpp0x/udlit-namespace-ambiguous.C @@ -1,9 +1,9 @@ // { dg-do compile { target c++11 } } -int operator""_t (long long unsigned); // { dg-message "note: candidate"} +int operator""_t (long long unsigned); // { dg-message "note: candidate" } namespace foo { - int operator""_t (long long unsigned); // { dg-message "note: candidate"} + int operator""_t (long long unsigned); // { dg-message "note: candidate" } } using namespace foo; diff --git a/gcc/testsuite/g++.dg/cpp26/pack-indexing16.C b/gcc/testsuite/g++.dg/cpp26/pack-indexing16.C new file mode 100644 index 0000000..92ade86 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/pack-indexing16.C @@ -0,0 +1,16 @@ +// { dg-do compile { target c++26 } } + +int i; +constexpr int idx() +{ + if consteval { return 0; } + else { return i; } +} + +template <int... Ns> +int first () { return Ns...[idx()]; } + +int main() +{ + return first<0,1,2>(); +} diff --git a/gcc/testsuite/g++.dg/cpp2a/class-deduction-alias24.C b/gcc/testsuite/g++.dg/cpp2a/class-deduction-alias24.C new file mode 100644 index 0000000..cceddac --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/class-deduction-alias24.C @@ -0,0 +1,16 @@ +// PR c++/119379 +// { dg-do compile { target c++20 } } + +template<class T, class U> +struct pair { + pair(T, U); +}; + +template<class T> +struct S { + template<class U> requires true + using P = pair<T, U>; +}; + +using type = decltype(S<int>::P(1, 2)); +using type = S<int>::P<int>; diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-init21.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-init21.C index f5e1b3e..1014292 100644 --- a/gcc/testsuite/g++.dg/cpp2a/constexpr-init21.C +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-init21.C @@ -20,7 +20,7 @@ constexpr A<int> a4(4); // { dg-error "not a constant expression|incompletely in struct s { int n; }; constexpr A<s> b; -constexpr A<s> b0(0); // { dg-error "not a constant expression|incompletely initialized" } +constexpr A<s> b0(0); // { dg-error "not a constant expression|incompletely initialized" } struct empty {}; constexpr A<empty> c; diff --git a/gcc/testsuite/g++.dg/cpp2a/lambda-uneval25.C b/gcc/testsuite/g++.dg/cpp2a/lambda-uneval25.C new file mode 100644 index 0000000..7fdd44d --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/lambda-uneval25.C @@ -0,0 +1,11 @@ +// { dg-do compile { target c++20 } } + +template <class T> +void foo(T x) { + sizeof []<int=0>(T=x) { return 0; }(); // { dg-error "may not appear" } + sizeof [](T=x) { return 0; }(); // { dg-error "may not appear" } +}; + +void test() { + foo(0); +} diff --git a/gcc/testsuite/g++.dg/diagnostic/unclosed-extern-c.C b/gcc/testsuite/g++.dg/diagnostic/unclosed-extern-c.C index 4dad8a2..a5ca8de 100644 --- a/gcc/testsuite/g++.dg/diagnostic/unclosed-extern-c.C +++ b/gcc/testsuite/g++.dg/diagnostic/unclosed-extern-c.C @@ -9,5 +9,5 @@ void bar (void); // { dg-message "1: 'extern .C.' linkage started here" "" { target *-*-* } open_extern_c } void test (void); -// { message "12: to match this '.'" "" { target *-*-* } open_extern_c } +// { dg-message "12: to match this '.'" "" { target *-*-* } open_extern_c } /* { dg-error "18:expected '.' at end of input" "" { target *-*-* } .-2 } */ diff --git a/gcc/testsuite/g++.dg/diagnostic/wrong-tag-1.C b/gcc/testsuite/g++.dg/diagnostic/wrong-tag-1.C index 2cf75f8..05ad326 100644 --- a/gcc/testsuite/g++.dg/diagnostic/wrong-tag-1.C +++ b/gcc/testsuite/g++.dg/diagnostic/wrong-tag-1.C @@ -1,4 +1,4 @@ // Origin PR c++/51427 -typedef struct _GMutex GMutex; // { dg-message "previously declared here"} +typedef struct _GMutex GMutex; // { dg-message "previously declared here" } typedef union _GMutex GMutex; // { dg-error "tag used in naming" } diff --git a/gcc/testsuite/g++.dg/expr/cond18.C b/gcc/testsuite/g++.dg/expr/cond18.C new file mode 100644 index 0000000..326985e --- /dev/null +++ b/gcc/testsuite/g++.dg/expr/cond18.C @@ -0,0 +1,36 @@ +/* PR c++/114525 */ +/* { dg-do run } */ + +struct Foo { + int x; +}; + +Foo& get (Foo& v) { + return v; +} + +int main () { + bool cond = true; + + /* Testcase from PR; v.x would wrongly remain equal to 1. */ + Foo v_ko; + v_ko.x = 1; + (cond ? get (v_ko) : get (v_ko)).*(&Foo::x) = 2; + if (v_ko.x != 2) + __builtin_abort (); + + /* Those would already work, i.e. x be changed to 2. */ + Foo v_ok_1; + v_ok_1.x = 1; + (cond ? get (v_ok_1) : get (v_ok_1)).x = 2; + if (v_ok_1.x != 2) + __builtin_abort (); + + Foo v_ok_2; + v_ok_2.x = 1; + get (v_ok_2).*(&Foo::x) = 2; + if (v_ok_2.x != 2) + __builtin_abort (); + + return 0; +} diff --git a/gcc/testsuite/g++.dg/ext/vector44.C b/gcc/testsuite/g++.dg/ext/vector44.C new file mode 100644 index 0000000..cb24ef6 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/vector44.C @@ -0,0 +1,5 @@ +// PR c++/101881 +// { dg-do compile { target c++11 } } + +template<int N> using A = int __attribute__((vector_size(N)))*; +void foo(A<4>) {} diff --git a/gcc/testsuite/g++.dg/gcov/gcov-22.C b/gcc/testsuite/g++.dg/gcov/gcov-22.C new file mode 100644 index 0000000..69e0728 --- /dev/null +++ b/gcc/testsuite/g++.dg/gcov/gcov-22.C @@ -0,0 +1,170 @@ +/* { dg-options "--coverage -fpath-coverage" } */ +/* { dg-do compile } */ + +#include <stdexcept> + +/* This test is a collection of odd CFG shapes which has been shown to + trigger ICEs. */ + +/* A hard abort-like exit could lead to paths with only the exit node, + which would then be an empty path after entry/exit prunng. + + BEGIN paths + summary: 0/1 */ +void xabort () { __builtin_exit (0); } +/* END */ + +/* Unconditional exceptions have the same effect as aborts + w.r.t. empty paths. */ +int throws (int) { throw std::runtime_error("exception"); } + +int _setjmp (void **); +/* Bad instrumentation would give + 'error: returns_twice call is not first in basic block 3'. + + BEGIN paths + summary: 0/1 */ +void set_jmp () +/* END */ +{ + _setjmp (0); +} + +/* From g++.dg/torture/pr83482.C */ +void a(); +struct b { + virtual long c() { return 0L; } + void m_fn2() { c(); } +} d; + +/* BEGIN paths + summary: 0/3 */ +void e() { +/* END */ + d.m_fn2(); + try { + a(); + _setjmp(0); + } catch (...) { + } +} + +/* BEGIN paths + summary: 0/1 */ +void multiple_setjmp () +/* END */ +{ + _setjmp (0); + _setjmp (0); +} + +/* loop_setjmp and loop_setjmp_continue are based on patterns found in + expat-2.5.0 tests/minicheck.c srunner_run_all. */ +void loop_setjmp (int n) +{ + for (int i = 0; i < n; ++i) + _setjmp (0); +} + +void loop_setjmp_continue (int n) +{ + for (int i = 0; i < n; ++i) + { + if (i < n / 4) + if (_setjmp (0)) + continue; + + if (_setjmp (0)) + continue; + + if (i < n / 2) + if (_setjmp (0)) + continue; + } +} + +void loop_setjmp_infinite (int n) +{ + for (;;) + _setjmp (0); +} + +/* BEGIN paths + summary: 0/2 */ +void multiple_conditional_setjmp (int a) +/* END */ +{ + if (a) + _setjmp (0); + else + _setjmp (0); + + _setjmp (0); +} + +/* Infinite loops can create CFGs that are a bit different, e.g. no edge for + skipping or brekaing out of the loop. */ +int id (int x) { return x; } +int infinite1 () +{ + for (int c = 0; ; c++) id (c); +} + +void infinite2 () +{ + for (;;) {} +} + +/* This function has multiple SCCs (loops), but one has too many internal paths + (2^32). If the scc-internal-paths is not limited this function will not + compile in reasonable time. */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wcoverage-too-many-paths" +void too_many_paths_single_scc (int x) +{ + int z = 0; + int c = 0; + + for (int i = 0; i != x; ++i) + for (int k = i; k != x; ++k) + c++; + + for (int i = 0; i != 100; ++i) + { + if (z + i + 0 < x) z++; + if (z + i + 1 < x) z++; + if (z + i + 2 < x) z++; + if (z + i + 3 < x) z++; + if (z + i + 4 < x) z++; + if (z + i + 5 < x) z++; + if (z + i + 6 < x) z++; + if (z + i + 7 < x) z++; + if (z + i + 8 < x) z++; + if (z + i + 9 < x) z++; + if (z + i + 10 < x) z++; + if (z + i + 11 < x) z++; + if (z + i + 12 < x) z++; + if (z + i + 13 < x) z++; + if (z + i + 14 < x) z++; + if (z + i + 15 < x) z++; + if (z + i + 16 < x) z++; + if (z + i + 17 < x) z++; + if (z + i + 18 < x) z++; + if (z + i + 19 < x) z++; + if (z + i + 20 < x) z++; + if (z + i + 21 < x) z++; + if (z + i + 22 < x) z++; + if (z + i + 23 < x) z++; + if (z + i + 24 < x) z++; + if (z + i + 25 < x) z++; + if (z + i + 26 < x) z++; + if (z + i + 27 < x) z++; + if (z + i + 28 < x) z++; + if (z + i + 29 < x) z++; + if (z + i + 30 < x) z++; + if (z + i + 31 < x) z++; + } +} +#pragma GCC diagnostic pop + +/* { dg-final { run-gcov prime-paths { --prime-paths gcov-22.C } } } */ diff --git a/gcc/testsuite/g++.dg/gcov/gcov-23-1.h b/gcc/testsuite/g++.dg/gcov/gcov-23-1.h new file mode 100644 index 0000000..ae38cad --- /dev/null +++ b/gcc/testsuite/g++.dg/gcov/gcov-23-1.h @@ -0,0 +1,9 @@ +#include <string> +struct fst { + static fst& instance () + { + static fst self; + return self; + } + std::string data; +}; diff --git a/gcc/testsuite/g++.dg/gcov/gcov-23-2.h b/gcc/testsuite/g++.dg/gcov/gcov-23-2.h new file mode 100644 index 0000000..89dd0dd --- /dev/null +++ b/gcc/testsuite/g++.dg/gcov/gcov-23-2.h @@ -0,0 +1,9 @@ +#include <string> +struct snd { + static snd& instance () + { + static snd self; + return self; + } + std::string data; +}; diff --git a/gcc/testsuite/g++.dg/gcov/gcov-23.C b/gcc/testsuite/g++.dg/gcov/gcov-23.C new file mode 100644 index 0000000..60fe9e0 --- /dev/null +++ b/gcc/testsuite/g++.dg/gcov/gcov-23.C @@ -0,0 +1,30 @@ +/* { dg-options "-fpath-coverage --coverage" } */ +/* { dg-do run { target native } } */ + +#include "gcov-23-1.h" +#include "gcov-23-2.h" + +/* This tests a very specific interaction between destructors of static objects + and gcov's inlining aware printing of prime paths. The source of the + problem is that gcc will reuse the compiler generated destructor gimple stmt + from the first static-object destructor, and its location will be recorded + in the .gcno file. This would lead to an empty block.locations vector since + the stmt is not anchored to a source line (being generated and all), but the + block itself would be originating in a different file. + + Without properly guarding the block.loc.lines access this code caused a + segfault in gcov. The class needed a non-trivial member or otherwise + non-trivial constructor to emit approximately + + __cxxabiv1::__cxa_atexit (__dt_comp , &self, &__dso_handle); + + Triggering the failure needed the path to also be printed, so it is + important to request both covered and uncovered paths. */ + +int main () +{ + fst::instance().data = "foo"; + snd::instance().data = "bar"; +} + +/* { dg-final { run-gcov { --prime-paths-source=both --prime-paths-lines=both gcov-23.C } } } */ diff --git a/gcc/testsuite/g++.dg/gomp/append-args-1.C b/gcc/testsuite/g++.dg/gomp/append-args-1.C index 7ff4023..4e13905 100644 --- a/gcc/testsuite/g++.dg/gomp/append-args-1.C +++ b/gcc/testsuite/g++.dg/gomp/append-args-1.C @@ -20,8 +20,6 @@ template<typename T> float base1(T); -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'float repl1\\(T, T2, T2\\) \\\[with T = omp_interop_t; T2 = omp_interop_t\\\]', except when specifying all 2 objects in the 'interop' clause of the 'dispatch' directive" "" { target *-*-* } .-5 } */ -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'float repl1\\(T, T2, T2\\) \\\[with T = float; T2 = omp_interop_t\\\]', except when specifying all 2 objects in the 'interop' clause of the 'dispatch' directive" "" { target *-*-* } .-6 } */ @@ -45,8 +43,6 @@ void repl99(T); append_args(interop(target, targetsync, prefer_type("cuda"))) void base99(); -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'void repl99\\(T\\) \\\[with T = omp_interop_t\\\]', except when specifying all 1 objects in the 'interop' clause of the 'dispatch' directive" "" { target *-*-* } .-3 } */ - template<typename T, typename T2, typename T3> @@ -57,9 +53,6 @@ void repl2(T, T2, T3, T3); template<typename T, typename T2> void base2(T x, T2 y); -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'void repl2\\(T, T2, T3, T3\\) \\\[with T = int\\*; T2 = int\\*; T3 = omp_interop_t\\\]', except when specifying all 2 objects in the 'interop' clause of the 'dispatch' directive" "" { target *-*-* } .-5 } */ -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'void repl2\\(T, T2, T3, T3\\) \\\[with T = int\\*; T2 = omp_interop_t; T3 = omp_interop_t\\\]', except when specifying all 2 objects in the 'interop' clause of the 'dispatch' directive" "" { target *-*-* } .-6 } */ - template<typename T,typename T3> void tooFewRepl(T, T, T3); @@ -83,7 +76,6 @@ void repl3(T, T2, ...); template<typename T> void base3(T, ...); -/* { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'void repl3\\(T, T2, \.\.\.\\) \\\[with T = int\\*; T2 = omp_interop_t\\\]', except when specifying all 1 objects in the 'interop' clause of the 'dispatch' directive" "" { target *-*-* } .-4 } */ @@ -104,23 +96,18 @@ test (int *a, int *b) #pragma omp dispatch base99 (); - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-2 } */ #pragma omp dispatch interop ( obj1 ) base2<int *, omp_interop_t> (b, omp_interop_none); - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-2 } */ #pragma omp dispatch interop ( obj1 ) base2<int *, int *> (b, a); - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-2 } */ #pragma omp dispatch interop ( obj1 ) x = base1<omp_interop_t> (omp_interop_none); - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-2 } */ #pragma omp dispatch interop ( obj1 ) x = base1<float> (1.0f); - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-2 } */ #pragma omp dispatch tooFewBase<int*,int*>(a,b); @@ -130,7 +117,6 @@ test (int *a, int *b) #pragma omp dispatch base3<int*>(a, 1, 2, "abc"); - /* { dg-note "required by 'dispatch' construct" "" { target *-*-* } .-2 } */ return x; } diff --git a/gcc/testsuite/g++.dg/gomp/append-args-8.C b/gcc/testsuite/g++.dg/gomp/append-args-8.C new file mode 100644 index 0000000..786a2b3 --- /dev/null +++ b/gcc/testsuite/g++.dg/gomp/append-args-8.C @@ -0,0 +1,93 @@ +/* { dg-additional-options "-fdump-tree-gimple" } */ + +/* The following definitions are in omp_lib, which cannot be included +gcc/testsuite/g++.dg/gomp/append-args-1.C in gcc/testsuite/ */ + +#if __cplusplus >= 201103L +# define __GOMP_UINTPTR_T_ENUM : __UINTPTR_TYPE__ +#else +# define __GOMP_UINTPTR_T_ENUM +#endif + +typedef enum omp_interop_t __GOMP_UINTPTR_T_ENUM +{ + omp_interop_none = 0, + __omp_interop_t_max__ = __UINTPTR_MAX__ +} omp_interop_t; + + +template<typename T, typename T2, typename T3> +void repl2(T, T2, T3, T3); +#pragma omp declare variant(repl2) match(construct={dispatch}) adjust_args(need_device_ptr : y) \ + append_args(interop(target, targetsync, prefer_type(1)), \ + interop(prefer_type({fr(3), attr("ompx_nop")},{fr(2)},{attr("ompx_all")}))) +template<typename T, typename T2> +void base2(T x, T2 y); + + + +template<typename T, typename T2> +void repl3(T, T2, T2, T2, ...); +#pragma omp declare variant(repl3) match(construct={dispatch}) \ + append_args( interop(target, prefer_type("cuda", "hsa")), \ + interop(targetsync), \ + interop(prefer_type({attr("ompx_nop")})) ) +template<typename T> +void base3(T, ...); + + + + +float +test (int *a, int *b) +{ + omp_interop_t obj1, obj2; + float x, y; + + #pragma omp dispatch interop ( obj1 ) + base2<int *, int *> (b, a); + + #pragma omp dispatch nocontext(1) + base3<int*>(a, 1, 2, "abc"); + + #pragma omp dispatch + base3<int*>(a, 1, 2, "abc"); + + return x; +} + +/* { dg-final { scan-tree-dump-times "base3<int\\*> \\(a, 1, 2, \"abc\"\\);" 1 "gimple" } } */ + +/* { dg-final { scan-tree-dump-times "unsigned.* \\* interopobjs.\[0-9\]+\\\[1\\\];" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "unsigned.* \\* interopobjs.\[0-9\]+\\\[3\\\];" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "int tgt_tgtsync.\[0-9\]+\\\[1\\\];" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "int tgt_tgtsync.\[0-9\]+\\\[3\\\];" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "const char \\* pref_type.\[0-9\]+\\\[1\\\];" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "const char \\* pref_type.\[0-9\]+\\\[3\\\];" 1 "gimple" } } */ + +/* { dg-final { scan-tree-dump-times "interopobjs.\[0-9\]+\\\[0\\\] = &interop\\.\[0-9\]+;" 2 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "interopobjs.\[0-9\]+\\\[1\\\] = &interop\\.\[0-9\]+;" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "interopobjs.\[0-9\]+\\\[2\\\] = &interop\\.\[0-9\]+;" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "tgt_tgtsync.\[0-9\]+\\\[0\\\] = 0;" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "tgt_tgtsync.\[0-9\]+\\\[0\\\] = 1;" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "tgt_tgtsync.\[0-9\]+\\\[1\\\] = 2;" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "tgt_tgtsync.\[0-9\]+\\\[2\\\] = 0;" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "pref_type.\[0-9\]+\\\[0\\\] = \"\\\\x80\\\\x03\\\\x80ompx_nop\\\\x00\\\\x00\\\\x80\\\\x02\\\\x80\\\\x00\\\\x80\\\\x80ompx_all\\\\x00\\\\x00\";" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "pref_type.\[0-9\]+\\\[0\\\] = \"\\\\x80\\\\x01\\\\x80\\\\x00\\\\x80\\\\x07\\\\x80\\\\x00\";" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "pref_type.\[0-9\]+\\\[1\\\] = 0B;" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "pref_type.\[0-9\]+\\\[2\\\] = \"\\\\x80\\\\x80ompx_nop\\\\x00\\\\x00\";" 1 "gimple" } } */ + + +/* { dg-final { scan-tree-dump-times "D\.\[0-9\]+ = __builtin_omp_get_interop_int \\(obj1, -5, 0B\\);" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "D\.\[0-9\]+ = __builtin_omp_get_default_device \\(\\);" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "__builtin_omp_set_default_device \\(D\.\[0-9\]+\\);" 2 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "D\.\[0-9\]+ = __builtin_omp_get_mapped_ptr \\(a, D\.\[0-9\]+\\);" 1 "gimple" } } */ + +/* { dg-final { scan-tree-dump-times "__builtin_GOMP_interop \\(D\.\[0-9\]+, 1, interopobjs\.\[0-9\], tgt_tgtsync\.\[0-9\]+, pref_type.2, 0, 0B, 0, 0B, 0, 0B\\);" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "repl2<int\\*, int\\*, omp_interop_t> \\(b, D\.\[0-9\]+, obj1, interop\.\[0-9\]+\\);" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "__builtin_GOMP_interop \\(D\.\[0-9\]+, 0, 0B, 0B, 0B, 0, 0B, 1, interopobjs\.\[0-9\]+, 0, 0B\\);" 1 "gimple" } } */ + + +/* { dg-final { scan-tree-dump-times "__builtin_GOMP_interop \\(-5, 0, 0B, 0B, 0B, 0, 0B, 3, interopobjs\.\[0-9\]+, 0, 0B\\);" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "repl3<int\\*, omp_interop_t> \\(a, interop\.\[0-9\]+, interop\.\[0-9\]+, interop\.\[0-9\]+, 1, 2, \"abc\"\\);" 1 "gimple" } } */ +/* { dg-final { scan-tree-dump-times "__builtin_GOMP_interop \\(-5, 3, interopobjs\.\[0-9\]+, tgt_tgtsync\.\[0-9\]+, pref_type\.\[0-9\]+, 0, 0B, 0, 0B, 0, 0B\\);" 1 "gimple" } } */ diff --git a/gcc/testsuite/g++.dg/init/self1.C b/gcc/testsuite/g++.dg/init/self1.C index 2fc5aa6..f9e9951 100644 --- a/gcc/testsuite/g++.dg/init/self1.C +++ b/gcc/testsuite/g++.dg/init/self1.C @@ -9,7 +9,7 @@ void f(__SIZE_TYPE__) { int main() { - int* const savepos = sizeof(*savepos) ? 0 : 0; /* { dg-error "invalid conversion" "convert" { target c++11 } } */ + int* const savepos = sizeof(*savepos) ? 0 : 0; /* { dg-error "invalid conversion" "convert" { target c++11 } } */ f (sizeof (*savepos)); diff --git a/gcc/testsuite/g++.dg/modules/attrib-3_a.H b/gcc/testsuite/g++.dg/modules/attrib-3_a.H new file mode 100644 index 0000000..d1f672a --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/attrib-3_a.H @@ -0,0 +1,16 @@ +// PR c++/118920 +// { dg-additional-options "-fmodule-header" } +// { dg-module-cmi {} } + +struct [[gnu::abi_tag("a", "b")]] A; +struct [[gnu::abi_tag("a", "b")]] B; +struct [[gnu::abi_tag("c")]] C; +struct D; +struct E; + +[[gnu::abi_tag("f")]] void f(); +void g(); +[[gnu::abi_tag("x", "y")]] void h(); + +[[gnu::abi_tag("test", "some", "more")]] extern int i; +[[gnu::abi_tag("test", "some", "more")]] extern int j; diff --git a/gcc/testsuite/g++.dg/modules/attrib-3_b.C b/gcc/testsuite/g++.dg/modules/attrib-3_b.C new file mode 100644 index 0000000..557c18b --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/attrib-3_b.C @@ -0,0 +1,30 @@ +// PR c++/118920 +// { dg-additional-options "-fmodules -fno-module-lazy" } + +struct A {}; // { dg-message "existing declaration here" } +struct [[gnu::abi_tag("b", "a")]] B; // OK +struct [[gnu::abi_tag("x")]] C; // { dg-message "existing declaration here" } +struct [[gnu::abi_tag("d")]] D; // { dg-message "existing declaration here" } + +void f(); // { dg-message "existing declaration here" } +[[gnu::abi_tag("g")]] void g(); // { dg-message "existing declaration here" } +[[gnu::abi_tag("y", "x")]] void h(); // OK + +[[gnu::abi_tag("more", "test")]] extern int i; // { dg-message "existing declaration here" } +[[gnu::abi_tag("more", "test", "really", "some")]] extern int j; // { dg-message "existing declaration here" } + +import "attrib-3_a.H"; + +struct [[gnu::abi_tag("e")]] E; // { dg-error "adds abi tag" } + +// { dg-error "mismatching abi tags for .struct A." "" { target *-*-* } 0 } +// B is OK +// { dg-error "mismatching abi tags for .struct C." "" { target *-*-* } 0 } +// { dg-error "mismatching abi tags for .struct D." "" { target *-*-* } 0 } + +// { dg-error "mismatching abi tags for .void f()." "" { target *-*-* } 0 } +// { dg-error "mismatching abi tags for .void g()." "" { target *-*-* } 0 } +// h is OK + +// { dg-error "mismatching abi tags for .i." "" { target *-*-* } 0 } +// { dg-error "mismatching abi tags for .j." "" { target *-*-* } 0 } diff --git a/gcc/testsuite/g++.dg/modules/extern-tpl-3_a.C b/gcc/testsuite/g++.dg/modules/extern-tpl-3_a.C new file mode 100644 index 0000000..def3cd1 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/extern-tpl-3_a.C @@ -0,0 +1,11 @@ +// { dg-additional-options "-fmodules -Wno-global-module" } +// { dg-module-cmi M } + +module; +template <typename> +struct S { + S() {} +}; +export module M; +extern template class S<int>; +S<int> s; diff --git a/gcc/testsuite/g++.dg/modules/extern-tpl-3_b.C b/gcc/testsuite/g++.dg/modules/extern-tpl-3_b.C new file mode 100644 index 0000000..5d96937 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/extern-tpl-3_b.C @@ -0,0 +1,12 @@ +// { dg-additional-options "-fmodules" } + +template <typename> +struct S { + S() {} +}; + +void foo() { S<double> x;} + +import M; + +// Lazy loading of extern S<int> at EOF should not ICE diff --git a/gcc/testsuite/g++.dg/modules/extern-tpl-4_a.H b/gcc/testsuite/g++.dg/modules/extern-tpl-4_a.H new file mode 100644 index 0000000..8238c2a --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/extern-tpl-4_a.H @@ -0,0 +1,22 @@ +// { dg-additional-options "-fmodule-header" } +// { dg-module-cmi {} } + +template <typename T> inline void ha() {} +extern template void ha<int>(); +extern template void ha<bool>(); +template void ha<char>(); + +template <typename T> void hb() {} +extern template void hb<int>(); +extern template void hb<bool>(); +template void hb<char>(); + +template <typename T> inline int hc = 123; +extern template int hc<int>; +extern template int hc<bool>; +template int hc<char>; + +template <typename T> int hd = 123; +extern template int hd<int>; +extern template int hd<bool>; +template int hd<char>; diff --git a/gcc/testsuite/g++.dg/modules/extern-tpl-4_b.C b/gcc/testsuite/g++.dg/modules/extern-tpl-4_b.C new file mode 100644 index 0000000..9b46f7f --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/extern-tpl-4_b.C @@ -0,0 +1,24 @@ +// { dg-additional-options "-fmodules" } +// { dg-module-cmi M } + +export module M; + +export template <typename T> inline void ma() {} +extern template void ma<int>(); +extern template void ma<bool>(); +template void ma<char>(); + +export template <typename T> void mb() {} +extern template void mb<int>(); +extern template void mb<bool>(); +template void mb<char>(); + +export template <typename T> inline int mc = 123; +extern template int mc<int>; +extern template int mc<bool>; +template int mc<char>; + +export template <typename T> int md = 123; +extern template int md<int>; +extern template int md<bool>; +template int md<char>; diff --git a/gcc/testsuite/g++.dg/modules/extern-tpl-4_c.C b/gcc/testsuite/g++.dg/modules/extern-tpl-4_c.C new file mode 100644 index 0000000..7185897 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/extern-tpl-4_c.C @@ -0,0 +1,80 @@ +// { dg-additional-options "-fmodules" } + +import "extern-tpl-4_a.H"; +import M; + +int main() { + ha<int>(); + ha<char>(); + ha<double>(); + + ma<int>(); + ma<char>(); + ma<double>(); + + hb<int>(); + hb<char>(); + hb<double>(); + + mb<int>(); + mb<char>(); + mb<double>(); + + int x1 = hc<int> + hc<char> + hc<double>; + int x2 = hd<int> + hd<char> + hd<double>; + int x3 = mc<int> + mc<char> + mc<double>; + int x4 = md<int> + md<char> + md<double>; + return x1 + x2 + x3 + x4; +} + + +// 'int': imported explicit instantiation decls should not be emitted here: +// { dg-final { scan-assembler-not "_Z2haIiEvv:" } } +// { dg-final { scan-assembler-not "_Z2hbIiEvv:" } } +// { dg-final { scan-assembler-not "_Z2hcIiE:" } } +// { dg-final { scan-assembler-not "_Z2hdIiE:" } } +// { dg-final { scan-assembler-not "_ZW1M2maIiEvv:" } } +// { dg-final { scan-assembler-not "_ZW1M2mbIiEvv:" } } +// { dg-final { scan-assembler-not "_ZW1M2mcIiE:" } } +// { dg-final { scan-assembler-not "_ZW1M2mdIiE:" } } + +// 'char': explicit instantiation definitions don't need to be emitted for +// modules, but need to be emitted for header units (as there's no other TU): +// { dg-final { scan-assembler "_Z2haIcEvv:" } } +// { dg-final { scan-assembler "_Z2hbIcEvv:" } } +// { dg-final { scan-assembler "_Z2hcIcE:" } } +// { dg-final { scan-assembler "_Z2hdIcE:" } } +// { dg-final { scan-assembler-not "_ZW1M2maIcEvv:" } } +// { dg-final { scan-assembler-not "_ZW1M2mbIcEvv:" } } +// { dg-final { scan-assembler-not "_ZW1M2mcIcE:" } } +// { dg-final { scan-assembler-not "_ZW1M2mdIcE:" } } + +// 'double': these are not explicitly instantiated and should be emitted here: +// { dg-final { scan-assembler "_Z2haIdEvv:" } } +// { dg-final { scan-assembler "_Z2hbIdEvv:" } } +// { dg-final { scan-assembler "_Z2hcIdE:" } } +// { dg-final { scan-assembler "_Z2hdIdE:" } } +// { dg-final { scan-assembler "_ZW1M2maIdEvv:" } } +// { dg-final { scan-assembler "_ZW1M2mbIdEvv:" } } +// { dg-final { scan-assembler "_ZW1M2mcIdE:" } } +// { dg-final { scan-assembler "_ZW1M2mdIdE:" } } + +template void ha<bool>(); +template void hb<bool>(); +template int hc<bool>; +template int hd<bool>; + +template void ma<bool>(); +template void mb<bool>(); +template int mc<bool>; +template int md<bool>; + +// 'bool': instantiated in this file, and so must be emitted here: +// { dg-final { scan-assembler "_Z2haIbEvv:" } } +// { dg-final { scan-assembler "_Z2hbIbEvv:" } } +// { dg-final { scan-assembler "_Z2hcIbE:" } } +// { dg-final { scan-assembler "_Z2hdIbE:" } } +// { dg-final { scan-assembler "_ZW1M2maIbEvv:" } } +// { dg-final { scan-assembler "_ZW1M2mbIbEvv:" } } +// { dg-final { scan-assembler "_ZW1M2mcIbE:" } } +// { dg-final { scan-assembler "_ZW1M2mdIbE:" } } diff --git a/gcc/testsuite/g++.dg/modules/friend-9_a.C b/gcc/testsuite/g++.dg/modules/friend-9_a.C new file mode 100644 index 0000000..ca95027 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/friend-9_a.C @@ -0,0 +1,13 @@ +// { dg-additional-options -fmodules } +// { dg-module-cmi M } +// { dg-module-do link } + +export module M; + +export template <class T> struct A +{ + template <class U> friend void f (U); +}; + +template <class U> +void f(U u) { } diff --git a/gcc/testsuite/g++.dg/modules/friend-9_b.C b/gcc/testsuite/g++.dg/modules/friend-9_b.C new file mode 100644 index 0000000..9f58379 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/friend-9_b.C @@ -0,0 +1,13 @@ +// { dg-additional-options -fmodules } + +// Check that f and A are mangled as attached to M. +// void f@M<A@M<main::loc> >(A@M<main::loc>) +// { dg-final { scan-assembler "_ZW1M1fIS_1AIZ4mainE3locEEvT_" } } + +import M; + +int main() +{ + struct loc {}; + f(A<loc>()); +} diff --git a/gcc/testsuite/g++.dg/modules/gnu-inline-1_a.C b/gcc/testsuite/g++.dg/modules/gnu-inline-1_a.C new file mode 100644 index 0000000..41a1b28 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/gnu-inline-1_a.C @@ -0,0 +1,7 @@ +// PR c++/119154 +// { dg-additional-options "-fmodules" } +// { dg-module-cmi foo } + +export module foo; +export extern "C++" inline __attribute__((__gnu_inline__)) void bar() {} +export extern "C++" inline __attribute__((__gnu_inline__)) void decl(); diff --git a/gcc/testsuite/g++.dg/modules/gnu-inline-1_b.C b/gcc/testsuite/g++.dg/modules/gnu-inline-1_b.C new file mode 100644 index 0000000..a91486d --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/gnu-inline-1_b.C @@ -0,0 +1,14 @@ +// PR c++/119154 +// { dg-additional-options "-fmodules" } + +void bar(); +void decl(); // { dg-warning "used but never defined" } +import foo; + +void test_b() { + bar(); + decl(); +} + +// A function only defined with gnu_inline should not be emitted here. +// { dg-final { scan-assembler-not "_Z3barv:" } } diff --git a/gcc/testsuite/g++.dg/modules/gnu-inline-1_c.C b/gcc/testsuite/g++.dg/modules/gnu-inline-1_c.C new file mode 100644 index 0000000..34dde87 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/gnu-inline-1_c.C @@ -0,0 +1,16 @@ +// PR c++/119154 +// { dg-additional-options "-fmodules" } + +void bar() {} +void decl() {} +import foo; + +void test_c() { + bar(); + decl(); +}; + +// Make sure importing a gnu_inline definition didn't stop us from emitting +// the non-gnu_inline definition we had before the module import. +// { dg-final { scan-assembler "_Z3barv:" } } +// { dg-final { scan-assembler "_Z4declv:" } } diff --git a/gcc/testsuite/g++.dg/modules/gnu-inline-1_d.C b/gcc/testsuite/g++.dg/modules/gnu-inline-1_d.C new file mode 100644 index 0000000..5b5d802 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/gnu-inline-1_d.C @@ -0,0 +1,16 @@ +// PR c++/119154 +// { dg-additional-options "-fmodules -fno-module-lazy" } + +import foo; +void bar() {} +void decl() {} + +void test_c() { + bar(); + decl(); +}; + +// Make sure importing a gnu_inline definition didn't stop us from emitting +// the non-gnu_inline definition we had after the module import. +// { dg-final { scan-assembler "_Z3barv:" } } +// { dg-final { scan-assembler "_Z4declv:" } } diff --git a/gcc/testsuite/g++.dg/modules/gnu-inline-2_a.C b/gcc/testsuite/g++.dg/modules/gnu-inline-2_a.C new file mode 100644 index 0000000..7f59fb7 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/gnu-inline-2_a.C @@ -0,0 +1,11 @@ +// PR c++/119154 +// { dg-additional-options "-fmodules" } +// { dg-module-cmi xstd } + +export module xstd; + +inline __attribute__((__gnu_inline__)) void wmemset() {} + +extern "C++" template <class> struct char_traits { + void assign() { wmemset(); } +}; diff --git a/gcc/testsuite/g++.dg/modules/gnu-inline-2_b.C b/gcc/testsuite/g++.dg/modules/gnu-inline-2_b.C new file mode 100644 index 0000000..e2f12d2 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/gnu-inline-2_b.C @@ -0,0 +1,14 @@ +// PR c++/119154 +// { dg-additional-options "-fmodules" } + +template <typename> struct char_traits { + void assign(); +}; + +void foo(char_traits<wchar_t> s) { + s.assign(); +} + +import xstd; + +// Lazy loading at EOF of a gnu_inline declaration should not ICE. diff --git a/gcc/testsuite/g++.dg/modules/lto-1.h b/gcc/testsuite/g++.dg/modules/lto-1.h new file mode 100644 index 0000000..935f1de --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/lto-1.h @@ -0,0 +1,13 @@ +template <typename> struct S { + S() {} +}; +template <typename> inline int x = 0; + +extern template struct S<char>; +extern template int x<char>; + +template <typename> int* foo() { + static int x; + return &x; +}; +extern template int* foo<char>(); diff --git a/gcc/testsuite/g++.dg/modules/lto-1_a.H b/gcc/testsuite/g++.dg/modules/lto-1_a.H new file mode 100644 index 0000000..6ea294d --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/lto-1_a.H @@ -0,0 +1,9 @@ +// PR c++/118961 +// { dg-additional-options "-fmodule-header" } +// { dg-module-cmi {} } +// Test explicit instantiations get emitted with LTO + +#include "lto-1.h" +template struct S<char>; +template int x<char>; +template int* foo<char>(); diff --git a/gcc/testsuite/g++.dg/modules/lto-1_b.C b/gcc/testsuite/g++.dg/modules/lto-1_b.C new file mode 100644 index 0000000..75d9a801 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/lto-1_b.C @@ -0,0 +1,9 @@ +// PR c++/118961 +// { dg-require-effective-target lto } +// { dg-additional-options "-fmodules -flto" } + +#include "lto-1.h" + +S<char> s; +int y = x<char>; +int* p = foo<char>(); diff --git a/gcc/testsuite/g++.dg/modules/lto-1_c.C b/gcc/testsuite/g++.dg/modules/lto-1_c.C new file mode 100644 index 0000000..ffd4595 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/lto-1_c.C @@ -0,0 +1,8 @@ +// PR c++/118961 +// { dg-module-do link } +// { dg-require-effective-target lto } +// { dg-additional-options "-fmodules -fno-module-lazy -flto" } + +#include "lto-1_a.H" + +int main() {} diff --git a/gcc/testsuite/g++.dg/modules/lto-2_a.H b/gcc/testsuite/g++.dg/modules/lto-2_a.H new file mode 100644 index 0000000..f817329 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/lto-2_a.H @@ -0,0 +1,11 @@ +// PR c++/118961 +// { dg-additional-options "-fmodule-header -std=c++20" } +// { dg-module-cmi {} } +// Test we correctly emit the bodies of cloned constructors. + +template <typename> +struct S { + S() requires true {} +}; + +inline S<int> foo() { return {}; } diff --git a/gcc/testsuite/g++.dg/modules/lto-2_b.C b/gcc/testsuite/g++.dg/modules/lto-2_b.C new file mode 100644 index 0000000..340ff48 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/lto-2_b.C @@ -0,0 +1,9 @@ +// PR c++/118961 +// { dg-module-do link } +// { dg-require-effective-target lto } +// { dg-additional-options "-fmodules -flto -std=c++20" } + +import "lto-2_a.H"; +int main() { + foo(); +} diff --git a/gcc/testsuite/g++.dg/modules/lto-3_a.H b/gcc/testsuite/g++.dg/modules/lto-3_a.H new file mode 100644 index 0000000..be63699 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/lto-3_a.H @@ -0,0 +1,6 @@ +// PR c++/118961 +// { dg-additional-options "-fmodule-header -std=c++20" } +// { dg-module-cmi {} } +// We shouldn't ICE when linking against the standard library. + +#include <string> diff --git a/gcc/testsuite/g++.dg/modules/lto-3_b.C b/gcc/testsuite/g++.dg/modules/lto-3_b.C new file mode 100644 index 0000000..f459596 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/lto-3_b.C @@ -0,0 +1,10 @@ +// PR c++/118961 +// { dg-module-do link } +// { dg-require-effective-target lto } +// { dg-additional-options "-fmodules -flto -static -std=c++20" } + +import "lto-3_a.H"; + +int main() { + std::string m_message; +} diff --git a/gcc/testsuite/g++.dg/modules/pr118920.h b/gcc/testsuite/g++.dg/modules/pr118920.h new file mode 100644 index 0000000..73d38b5 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/pr118920.h @@ -0,0 +1,3 @@ +template <typename T> struct out_ptr_t { + operator int() const; +}; diff --git a/gcc/testsuite/g++.dg/modules/pr118920_a.H b/gcc/testsuite/g++.dg/modules/pr118920_a.H new file mode 100644 index 0000000..75023b3 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/pr118920_a.H @@ -0,0 +1,4 @@ +// { dg-additional-options "-fmodule-header" } +// { dg-module-cmi {} } + +#include "pr118920.h" diff --git a/gcc/testsuite/g++.dg/modules/pr118920_b.H b/gcc/testsuite/g++.dg/modules/pr118920_b.H new file mode 100644 index 0000000..23e37a6 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/pr118920_b.H @@ -0,0 +1,12 @@ +// { dg-additional-options "-fmodule-header" } +// { dg-module-cmi {} } + +template <typename T> struct __shared_ptr { + template <typename> friend struct out_ptr_t; +}; +inline namespace __cxx11 __attribute__((__abi_tag__)) { + struct _Impl; +} +struct path { + __shared_ptr<_Impl> _M_impl; +}; diff --git a/gcc/testsuite/g++.dg/modules/pr118920_c.C b/gcc/testsuite/g++.dg/modules/pr118920_c.C new file mode 100644 index 0000000..b1b6c71 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/pr118920_c.C @@ -0,0 +1,5 @@ +// { dg-additional-options "-fmodules -fno-module-lazy" } + +#include "pr118920.h" +import "pr118920_b.H"; +import "pr118920_a.H"; diff --git a/gcc/testsuite/g++.dg/modules/pr119154_a.C b/gcc/testsuite/g++.dg/modules/pr119154_a.C deleted file mode 100644 index 23bd186..0000000 --- a/gcc/testsuite/g++.dg/modules/pr119154_a.C +++ /dev/null @@ -1,6 +0,0 @@ -// PR c++/119154 -// { dg-additional-options "-fmodules" } -// { dg-module-cmi foo } - -export module foo; -extern "C++" inline __attribute__((__gnu_inline__)) void bar() {} diff --git a/gcc/testsuite/g++.dg/modules/pr119154_b.C b/gcc/testsuite/g++.dg/modules/pr119154_b.C deleted file mode 100644 index 1558e71..0000000 --- a/gcc/testsuite/g++.dg/modules/pr119154_b.C +++ /dev/null @@ -1,10 +0,0 @@ -// PR c++/119154 -// { dg-module-do link } -// { dg-additional-options "-fmodules" } - -void bar(); -import foo; - -int main() { - bar(); -} diff --git a/gcc/testsuite/g++.dg/modules/tpl-friend-17.h b/gcc/testsuite/g++.dg/modules/tpl-friend-17.h new file mode 100644 index 0000000..429ab3d --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/tpl-friend-17.h @@ -0,0 +1,8 @@ +// PR c++/118920 + +template <typename> struct unique_ptr { + template <typename> friend class out_ptr_t; +}; +template <typename> struct shared_ptr { + template <typename> friend class out_ptr_t; +}; diff --git a/gcc/testsuite/g++.dg/modules/tpl-friend-17_a.C b/gcc/testsuite/g++.dg/modules/tpl-friend-17_a.C new file mode 100644 index 0000000..7c5a3ac --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/tpl-friend-17_a.C @@ -0,0 +1,9 @@ +// PR c++/118920 +// { dg-additional-options "-fmodules" } +// { dg-module-cmi M } + +module; +#include "tpl-friend-17.h" +export module M; +unique_ptr<int> s; +export template <typename> void foo() { shared_ptr<int> u; } diff --git a/gcc/testsuite/g++.dg/modules/tpl-friend-17_b.C b/gcc/testsuite/g++.dg/modules/tpl-friend-17_b.C new file mode 100644 index 0000000..33586e6 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/tpl-friend-17_b.C @@ -0,0 +1,11 @@ +// PR c++/118920 +// { dg-additional-options "-fmodules" } + +#include "tpl-friend-17.h" +import M; + +int main() { + // instantiating shared_ptr<int> should find previously generated + // out_ptr_t template from the unique_ptr<int> instantiation + foo<int>(); +} diff --git a/gcc/testsuite/g++.dg/opt/musttail2.C b/gcc/testsuite/g++.dg/opt/musttail2.C new file mode 100644 index 0000000..d12fcb2 --- /dev/null +++ b/gcc/testsuite/g++.dg/opt/musttail2.C @@ -0,0 +1,19 @@ +// PR ipa/119376 +// { dg-do compile { target musttail } } +// { dg-options "-O2 -fno-early-inlining -fdump-tree-optimized" } +// { dg-final { scan-tree-dump-times " \[^\n\r]* = foo \\\(\[^\n\r]*\\\); \\\[tail call\\\] \\\[must tail call\\\]" 1 "optimized" } } + +struct S { S () {} }; + +[[gnu::noipa]] char * +foo (S) +{ + return 0; +} + +char * +bar (S) +{ + S t; + [[clang::musttail]] return foo (t); +} diff --git a/gcc/testsuite/g++.dg/opt/pr119518.C b/gcc/testsuite/g++.dg/opt/pr119518.C new file mode 100644 index 0000000..152b880 --- /dev/null +++ b/gcc/testsuite/g++.dg/opt/pr119518.C @@ -0,0 +1,20 @@ +// PR c++/119518 +// { dg-do compile } +// { dg-options "-O2 -fdump-tree-optimized" } +// { dg-final { scan-tree-dump "S::~S \\\(&s\\\)" "optimized" } } + +[[gnu::noipa, noreturn]] void +foo () +{ + for (;;) + ; +} + +struct S { ~S (); }; + +void +bar () +{ + S s; + foo (); +} diff --git a/gcc/testsuite/g++.dg/opt/pr98743.C b/gcc/testsuite/g++.dg/opt/pr98743.C index 41f476f..9380ff2 100644 --- a/gcc/testsuite/g++.dg/opt/pr98743.C +++ b/gcc/testsuite/g++.dg/opt/pr98743.C @@ -1,6 +1,6 @@ // Test for value-initialization via {} // { dg-do run { target c++11 } } -/* { dg-options "-Og -fno-early-inlining -finline-small-functions -fpack-struct" */ +/* { dg-options "-Og -fno-early-inlining -finline-small-functions -fpack-struct" } */ void * operator new (__SIZE_TYPE__, void *p) { return p; } void * operator new[] (__SIZE_TYPE__, void *p) { return p; } diff --git a/gcc/testsuite/g++.dg/other/i386-2.C b/gcc/testsuite/g++.dg/other/i386-2.C index 00cdc50..88252ad 100644 --- a/gcc/testsuite/g++.dg/other/i386-2.C +++ b/gcc/testsuite/g++.dg/other/i386-2.C @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2-512 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ +/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ /* { dg-skip-if "requires hosted libstdc++ for cstdlib malloc" { ! hostedlib } } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, diff --git a/gcc/testsuite/g++.dg/other/i386-3.C b/gcc/testsuite/g++.dg/other/i386-3.C index 8319d8c..a234e4f 100644 --- a/gcc/testsuite/g++.dg/other/i386-3.C +++ b/gcc/testsuite/g++.dg/other/i386-3.C @@ -1,5 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2-512 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ +/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ /* { dg-skip-if "requires hosted libstdc++ for cstdlib malloc" { ! hostedlib } } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, diff --git a/gcc/testsuite/g++.dg/parse/error8.C b/gcc/testsuite/g++.dg/parse/error8.C index 135f078..14b2c86 100644 --- a/gcc/testsuite/g++.dg/parse/error8.C +++ b/gcc/testsuite/g++.dg/parse/error8.C @@ -1,5 +1,5 @@ // PR c++/13438 -// { dg-options "-fshow-column" } +// { dg-options "-fshow-column" } struct A { friend typename struct B; }; diff --git a/gcc/testsuite/g++.dg/strub-internal-pr112938.cc b/gcc/testsuite/g++.dg/strub-internal-pr112938.C index 5a74bec..7d7023c 100644 --- a/gcc/testsuite/g++.dg/strub-internal-pr112938.cc +++ b/gcc/testsuite/g++.dg/strub-internal-pr112938.C @@ -3,10 +3,10 @@ /* { dg-require-effective-target strub } */ bool __attribute__ ((__strub__ ("internal"))) -f(bool i, volatile bool j) +f(bool i, volatile bool j) /* { dg-warning "'volatile'-qualified parameter is deprecated" "" { target c++20 } } */ { return (i ^ j) == j; } /* Check for two dereferences of the indirected volatile j parm. */ -/* { dg-final { scan-tree-dump-times {={v} \*j_[0-9][0-9]*(D)} 2 "optimized" } } */ +/* { dg-final { scan-tree-dump-times {={v} \*j_[0-9+]\(D\)} 2 "optimized" } } */ diff --git a/gcc/testsuite/g++.dg/template/explicit-args6.C b/gcc/testsuite/g++.dg/template/explicit-args6.C index 311a767..18663d7b 100644 --- a/gcc/testsuite/g++.dg/template/explicit-args6.C +++ b/gcc/testsuite/g++.dg/template/explicit-args6.C @@ -20,7 +20,7 @@ constexpr unsigned frob() { static_assert(N == 1, "user-friendly diagnostic"); // { dg-error "user-friendly" } - // dg-message { "-1 == 1" "" { target *-*-* } .-1 } + // { dg-message "-1 == 1" "" { target *-*-* } .-1 } // narrowing check, reject negative values return unsigned{N}; // { dg-prune-output "narrowing" } diff --git a/gcc/testsuite/g++.dg/template/unify9.C b/gcc/testsuite/g++.dg/template/unify9.C index ee18b86..e743762 100644 --- a/gcc/testsuite/g++.dg/template/unify9.C +++ b/gcc/testsuite/g++.dg/template/unify9.C @@ -13,6 +13,6 @@ struct X { const X *x; int main () { - f (*x, &X::g); // { dg-error "no matching function" } + f (*x, &X::g); // { dg-error "no matching function" } // { dg-message "(candidate|incompatible cv-qualifiers)" "candidate note" { target *-*-* } .-1 } } diff --git a/gcc/testsuite/g++.dg/torture/musttail1.C b/gcc/testsuite/g++.dg/torture/musttail1.C new file mode 100644 index 0000000..12012ad --- /dev/null +++ b/gcc/testsuite/g++.dg/torture/musttail1.C @@ -0,0 +1,15 @@ +// PR ipa/119376 +// { dg-do compile { target musttail } } +// { dg-additional-options "-ffat-lto-objects -fdump-tree-optimized" } +/* { dg-final { scan-tree-dump-times " \[^\n\r]* = foo \\\(\[^\n\r]*\\\); \\\[tail call\\\] \\\[must tail call\\\]" 1 "optimized" } } */ + +struct S { int s; }; +int foo (int); + +int +bar (int a) +{ + S b = {a}; + b.s++; + [[gnu::musttail]] return foo (a); +} diff --git a/gcc/testsuite/g++.dg/torture/pr118795.C b/gcc/testsuite/g++.dg/torture/pr118795.C new file mode 100644 index 0000000..fc40f81 --- /dev/null +++ b/gcc/testsuite/g++.dg/torture/pr118795.C @@ -0,0 +1,15 @@ +// { dg-do compile } + +unsigned char *a(); +struct b { + void c() const; +}; +void b::c() const { + unsigned char *d = a(), *e = a(); + for (long f; f; ++f) { + e[0] = e[1] = e[2] = d[0]; + e[3] = d[0]; + d += 4; + e += 4; + } +} diff --git a/gcc/testsuite/g++.dg/tree-ssa/initlist-opt1.C b/gcc/testsuite/g++.dg/tree-ssa/initlist-opt1.C index 89abdd9..976c3f3 100644 --- a/gcc/testsuite/g++.dg/tree-ssa/initlist-opt1.C +++ b/gcc/testsuite/g++.dg/tree-ssa/initlist-opt1.C @@ -4,7 +4,7 @@ // { dg-skip-if "requires hosted libstdc++ for string" { ! hostedlib } } // Test that we do range-initialization from const char *. -// { dg-final { scan-tree-dump {_M_range_initialize<const char\* const\*>} "gimple" } } +// { dg-final { scan-tree-dump {_M_range_initialize_n<const char\* const\*} "gimple" } } // { dg-final { scan-tree-dump {static const char.*72} "gimple" } } #include <string> diff --git a/gcc/testsuite/g++.dg/tree-ssa/initlist-opt2.C b/gcc/testsuite/g++.dg/tree-ssa/initlist-opt2.C index 8080e9f..bc9b6cf 100644 --- a/gcc/testsuite/g++.dg/tree-ssa/initlist-opt2.C +++ b/gcc/testsuite/g++.dg/tree-ssa/initlist-opt2.C @@ -4,7 +4,7 @@ // { dg-skip-if "requires hosted libstdc++ for string" { ! hostedlib } } // Test that we do range-initialization from const char *. -// { dg-final { scan-tree-dump {_M_range_initialize<const char\* const\*>} "gimple" } } +// { dg-final { scan-tree-dump {_M_range_initialize_n<const char\* const\*} "gimple" } } // And that the backing array is static. // { dg-final { scan-tree-dump {static const char.*72} "gimple" } } diff --git a/gcc/testsuite/g++.dg/tree-ssa/pr105820.C b/gcc/testsuite/g++.dg/tree-ssa/pr105820.C index 507950f..4d4c055 100644 --- a/gcc/testsuite/g++.dg/tree-ssa/pr105820.C +++ b/gcc/testsuite/g++.dg/tree-ssa/pr105820.C @@ -1,5 +1,5 @@ // { dg-do compile } -// { dg-options "-O2 -fstrict-enums --param case-values-threshold=1"} +// { dg-options "-O2 -fstrict-enums --param case-values-threshold=1" } typedef int basic_block; diff --git a/gcc/testsuite/g++.dg/tree-ssa/pr80331.C b/gcc/testsuite/g++.dg/tree-ssa/pr80331.C new file mode 100644 index 0000000..8503450 --- /dev/null +++ b/gcc/testsuite/g++.dg/tree-ssa/pr80331.C @@ -0,0 +1,8 @@ +// { dg-do compile } +// { dg-additional-options "-O2 -fdump-tree-optimized" } +#include<string> +int sain() { + const std::string remove_me("remove_me"); + return 0; +} +// { dg-final { scan-tree-dump-not "remove_me" "optimized" } } diff --git a/gcc/testsuite/g++.dg/tree-ssa/pr87502.C b/gcc/testsuite/g++.dg/tree-ssa/pr87502.C new file mode 100644 index 0000000..ad3e9d2 --- /dev/null +++ b/gcc/testsuite/g++.dg/tree-ssa/pr87502.C @@ -0,0 +1,15 @@ +// { dg-do compile } +// { dg-additional-options "-O2 -fdump-tree-optimized" } +#include <string> + + +__attribute__ ((pure)) +extern int foo (const std::string &); + +int +bar () +{ + return foo ("abc") + foo (std::string("abc")); +} +// We used to add terminating zero explicitely instead of using fact +// that memcpy source is already 0 terminated. diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr98265.C b/gcc/testsuite/g++.dg/tree-ssa/pr98265.C index 9c798e6..d4872d6 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr98265.C +++ b/gcc/testsuite/g++.dg/tree-ssa/pr98265.C @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fdump-tree-optimized" } */ +/* { dg-options "-O2 -std=c++14 -fdump-tree-optimized" } */ extern void __assert_fail(const char*, const char*, int, const char*); namespace Eigen { enum { AutoAlign }; @@ -345,4 +345,4 @@ Eigen::Matrix<float, 3, 1> should_inline(float x, float y, float z, // We should inline everything to should_inline -/* { dg-final { scan-tree-dump-times "Function" "optimized" } } */ +/* { dg-final { scan-tree-dump "Function" "optimized" } } */ diff --git a/gcc/testsuite/g++.dg/vect/pr37143.C b/gcc/testsuite/g++.dg/vect/pr37143.cc index a2c41a9..a2c41a9 100644 --- a/gcc/testsuite/g++.dg/vect/pr37143.C +++ b/gcc/testsuite/g++.dg/vect/pr37143.cc diff --git a/gcc/testsuite/g++.dg/warn/Winvalid-memory-model.C b/gcc/testsuite/g++.dg/warn/Winvalid-memory-model.C index 5357d54..0ef2c75 100644 --- a/gcc/testsuite/g++.dg/warn/Winvalid-memory-model.C +++ b/gcc/testsuite/g++.dg/warn/Winvalid-memory-model.C @@ -1,6 +1,6 @@ /* PR middle-end/99612 - Missing warning on incorrect memory order without -Wsystem-headers - Verify warings for basic atomic functions with no optimization. + Verify warnings for basic atomic functions with no optimization. { dg-do compile { target c++11 } } { dg-options "-O0 -Wall" } */ diff --git a/gcc/testsuite/g++.dg/warn/Wmismatched-tags-8.C b/gcc/testsuite/g++.dg/warn/Wmismatched-tags-8.C index 0ebca3d..082564d 100644 --- a/gcc/testsuite/g++.dg/warn/Wmismatched-tags-8.C +++ b/gcc/testsuite/g++.dg/warn/Wmismatched-tags-8.C @@ -4,7 +4,7 @@ #pragma GCC diagnostic push #pragma GCC diagnostic error "-Wmismatched-tags" -class A; // { dg-message "first declared" +class A; // { dg-message "first declared" } struct A; // { dg-error "\\\[-Werror=mismatched-tags" } #pragma GCC diagnostic ignored "-Wmismatched-tags" @@ -12,11 +12,11 @@ class B; // { dg-bogus "first declared" } struct B; #pragma GCC diagnostic warning "-Wmismatched-tags" -class C; // { dg-message "first declared" +class C; // { dg-message "first declared" } struct C; // { dg-warning "\\\[-Wmismatched-tags" } #pragma GCC diagnostic pop -class D; // { dg-message "first declared" +class D; // { dg-message "first declared" } struct D; // { dg-warning "\\\[-Wmismatched-tags" } // { dg-prune-output "some warnings being treated as errors" } diff --git a/gcc/testsuite/g++.dg/warn/Wno-attributes-1.C b/gcc/testsuite/g++.dg/warn/Wno-attributes-1.C index 863ca5c..9ac61b4 100644 --- a/gcc/testsuite/g++.dg/warn/Wno-attributes-1.C +++ b/gcc/testsuite/g++.dg/warn/Wno-attributes-1.C @@ -36,11 +36,11 @@ foo () class S { [[foo::bar]] friend int bar (S &); // { dg-warning "attribute ignored" } - // { dsg-message "an attribute that appertains to a friend declaration that is not a definition is ignored" "" { target *-*-* } .-1 } + // { dg-message "an attribute that appertains to a friend declaration that is not a definition is ignored" "" { target *-*-* } .-1 } [[bar::foo, foo::bar, baz::qux]] friend int baz (S &); // { dg-warning "attribute ignored" } - // { dsg-message "an attribute that appertains to a friend declaration that is not a definition is ignored" "" { target *-*-* } .-1 } + // { dg-message "an attribute that appertains to a friend declaration that is not a definition is ignored" "" { target *-*-* } .-1 } [[bar::foo, bar::bar, baz::qux]] friend int qux (S &); // { dg-warning "attribute ignored" } - // { dsg-message "an attribute that appertains to a friend declaration that is not a definition is ignored" "" { target *-*-* } .-1 } + // { dg-message "an attribute that appertains to a friend declaration that is not a definition is ignored" "" { target *-*-* } .-1 } public: int s; }; diff --git a/gcc/testsuite/g++.dg/warn/Wstringop-overflow-5.C b/gcc/testsuite/g++.dg/warn/Wstringop-overflow-5.C index 3e905fc..e6adb70 100644 --- a/gcc/testsuite/g++.dg/warn/Wstringop-overflow-5.C +++ b/gcc/testsuite/g++.dg/warn/Wstringop-overflow-5.C @@ -24,7 +24,7 @@ extern Bucket _Bucket_default_instance_; Bucket::Bucket () { memset (&_has_bits_, 0, sizeof _has_bits_); - memset (&cumulative_count_, 0, // { dg-bogus "\\\[-Warray-bounds|-wstringop-overflow" } + memset (&cumulative_count_, 0, // { dg-bogus "\\\[-Warray-bounds|-Wstringop-overflow" } static_cast<size_t>(reinterpret_cast<char*>(&upper_bound_) - reinterpret_cast<char*>(&cumulative_count_)) + sizeof upper_bound_); diff --git a/gcc/testsuite/g++.old-deja/g++.abi/vtable2.C b/gcc/testsuite/g++.old-deja/g++.abi/vtable2.C index 96533e0..762277d 100644 --- a/gcc/testsuite/g++.old-deja/g++.abi/vtable2.C +++ b/gcc/testsuite/g++.old-deja/g++.abi/vtable2.C @@ -1,4 +1,4 @@ -// { dg-do run } +// { dg-do run } // { dg-options "-Wno-attribute-alias -fno-strict-aliasing" } // Origin: Mark Mitchell <mark@codesourcery.com> diff --git a/gcc/testsuite/g++.old-deja/g++.bugs/900330_02.C b/gcc/testsuite/g++.old-deja/g++.bugs/900330_02.C index f1591b2..4f2f831 100644 --- a/gcc/testsuite/g++.old-deja/g++.bugs/900330_02.C +++ b/gcc/testsuite/g++.old-deja/g++.bugs/900330_02.C @@ -1,4 +1,4 @@ -// { dg-do assemble } +// { dg-do assemble } // g++ 1.37.1 bug 900330_02 // The C++ Reference Manual says in section 13.1: diff --git a/gcc/testsuite/g++.old-deja/g++.bugs/900406_02.C b/gcc/testsuite/g++.old-deja/g++.bugs/900406_02.C index bcbffeb..dcce14c 100644 --- a/gcc/testsuite/g++.old-deja/g++.bugs/900406_02.C +++ b/gcc/testsuite/g++.old-deja/g++.bugs/900406_02.C @@ -1,4 +1,4 @@ -// { dg-do run } +// { dg-do run } // g++ bug 900406_02 // g++ fails to correctly parse some type specifications within casts. diff --git a/gcc/testsuite/g++.old-deja/g++.bugs/900519_13.C b/gcc/testsuite/g++.old-deja/g++.bugs/900519_13.C index 6b8260d..91293bf 100644 --- a/gcc/testsuite/g++.old-deja/g++.bugs/900519_13.C +++ b/gcc/testsuite/g++.old-deja/g++.bugs/900519_13.C @@ -1,4 +1,4 @@ -// { dg-do assemble } +// { dg-do assemble } // g++ 1.37.1 bug 900519_13 // If multiple inheritance creates a situation in which a given name is diff --git a/gcc/testsuite/g++.old-deja/g++.mike/p9068.C b/gcc/testsuite/g++.old-deja/g++.mike/p9068.C index a33f60f..b12bdb4 100644 --- a/gcc/testsuite/g++.old-deja/g++.mike/p9068.C +++ b/gcc/testsuite/g++.old-deja/g++.mike/p9068.C @@ -1,4 +1,4 @@ -// { dg-do assemble } +// { dg-do assemble } // prms-id: 9068 struct ostream { diff --git a/gcc/testsuite/g++.target/i386/mangling-alias1.C b/gcc/testsuite/g++.target/i386/mangling-alias1.C index 70264e2..2d7a25a 100644 --- a/gcc/testsuite/g++.target/i386/mangling-alias1.C +++ b/gcc/testsuite/g++.target/i386/mangling-alias1.C @@ -1,6 +1,6 @@ // PR c++/114992 // { dg-do compile { target { c++11 && x86_64-*-* } } } -// { dg-require-ifunc } +// { dg-require-ifunc "" } template <typename Callable> __attribute__((target_clones("avx2", "default"))) diff --git a/gcc/testsuite/gcc.c-torture/execute/pr119428.c b/gcc/testsuite/gcc.c-torture/execute/pr119428.c new file mode 100644 index 0000000..33a93f4 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr119428.c @@ -0,0 +1,18 @@ +/* PR target/119428 */ + +__attribute__((noipa)) void +foo (unsigned int x, unsigned char *y) +{ + y += x >> 3; + *y &= (unsigned char) ~(1 << (x & 0x07)); +} + +int +main () +{ + unsigned char buf[8]; + __builtin_memset (buf, 0xff, 8); + foo (8, buf); + if (buf[1] != 0xfe) + __builtin_abort (); +} diff --git a/gcc/testsuite/gcc.dg/20040203-1.c b/gcc/testsuite/gcc.dg/20040203-1.c index 59c824e..b92c0ec 100644 --- a/gcc/testsuite/gcc.dg/20040203-1.c +++ b/gcc/testsuite/gcc.dg/20040203-1.c @@ -1,6 +1,6 @@ /* PR/13994; bug_cond2 was rejected on gcc up to version 3.4.x */ -/* { dg-do compile }*/ -/* { dg-options "-std=gnu89" }*/ +/* { dg-do compile } */ +/* { dg-options "-std=gnu89" } */ struct s { char c[1]; }; struct s a; diff --git a/gcc/testsuite/gcc.dg/980502-1.c b/gcc/testsuite/gcc.dg/980502-1.c index f06491c..6a64c76 100644 --- a/gcc/testsuite/gcc.dg/980502-1.c +++ b/gcc/testsuite/gcc.dg/980502-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile }*/ +/* { dg-do compile } */ /* { dg-options "-O2" } */ char *const f(void) diff --git a/gcc/testsuite/gcc.dg/analyzer/fd-datagram-socket.c b/gcc/testsuite/gcc.dg/analyzer/fd-datagram-socket.c index 8d32e85..37c7159 100644 --- a/gcc/testsuite/gcc.dg/analyzer/fd-datagram-socket.c +++ b/gcc/testsuite/gcc.dg/analyzer/fd-datagram-socket.c @@ -102,7 +102,7 @@ void test_listen_on_datagram_socket_with_bind (const char *sockname) memset (&addr, 0, sizeof (addr)); addr.sun_family = AF_UNIX; strncpy (addr.sun_path, sockname, sizeof(addr.sun_path) - 1); - if (bind (fd, (struct sockaddr *)&addr, sizeof (addr)) == -1) /* { dg message "datagram socket bound here" } */ + if (bind (fd, (struct sockaddr *)&addr, sizeof (addr)) == -1) /* { dg-message "datagram socket bound here" } */ { close (fd); return; diff --git a/gcc/testsuite/gcc.dg/analyzer/out-of-bounds-zero.c b/gcc/testsuite/gcc.dg/analyzer/out-of-bounds-zero.c index 201ca00..6e62a9d 100644 --- a/gcc/testsuite/gcc.dg/analyzer/out-of-bounds-zero.c +++ b/gcc/testsuite/gcc.dg/analyzer/out-of-bounds-zero.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-Wno-stringop-overflow"} */ +/* { dg-additional-options "-Wno-stringop-overflow" } */ /* -Wstringop-overflow= triggers on test5. */ #include <stdint.h> diff --git a/gcc/testsuite/gcc.dg/analyzer/strchr-1.c b/gcc/testsuite/gcc.dg/analyzer/strchr-1.c index 08c429d..181f182 100644 --- a/gcc/testsuite/gcc.dg/analyzer/strchr-1.c +++ b/gcc/testsuite/gcc.dg/analyzer/strchr-1.c @@ -16,13 +16,13 @@ const char* test_literal (int x) void test_2 (const char *s, int c) { - char *p = __builtin_strchr (s, c); /* { dg-message "when '__builtin_strchr' returns NULL"} */ + char *p = __builtin_strchr (s, c); /* { dg-message "when '__builtin_strchr' returns NULL" } */ *p = 'A'; /* { dg-warning "dereference of NULL 'p'" "null deref" } */ } void test_3 (const char *s, int c) { - char *p = strchr (s, c); /* { dg-message "when 'strchr' returns NULL"} */ + char *p = strchr (s, c); /* { dg-message "when 'strchr' returns NULL" } */ *p = 'A'; /* { dg-warning "dereference of NULL 'p'" "null deref" } */ } diff --git a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-19.c b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-19.c index 44141a3..950466b 100644 --- a/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-19.c +++ b/gcc/testsuite/gcc.dg/builtin-dynamic-object-size-19.c @@ -20,7 +20,7 @@ typedef __SIZE_TYPE__ size_t; /* Macro to emit a call to function named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/builtin-object-size-19.c b/gcc/testsuite/gcc.dg/builtin-object-size-19.c index 1aab1ef..090d422 100644 --- a/gcc/testsuite/gcc.dg/builtin-object-size-19.c +++ b/gcc/testsuite/gcc.dg/builtin-object-size-19.c @@ -17,7 +17,7 @@ typedef __SIZE_TYPE__ size_t; /* Macro to emit a call to function named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/cpp/cmdlne-dM-M.c b/gcc/testsuite/gcc.dg/cpp/cmdlne-dM-M.c index 0cd9011..6a89c25 100644 --- a/gcc/testsuite/gcc.dg/cpp/cmdlne-dM-M.c +++ b/gcc/testsuite/gcc.dg/cpp/cmdlne-dM-M.c @@ -12,4 +12,4 @@ int variable; /* { dg-final { scan-file cmdlne-dM-M.i "(^|\\n)#define foo bar($|\\n)" } } { dg-final { scan-file-not cmdlne-dM-M.i "variable" } } - { dg-final { scan-file cmdlne-dM-M.i "(^|\\n)cmdlne-dM-M\[^\\n\]*:( *\\\\\\n)?\[^\\n\]*cmdlne-dM-M.c"} } */ + { dg-final { scan-file cmdlne-dM-M.i "(^|\\n)cmdlne-dM-M\[^\\n\]*:( *\\\\\\n)?\[^\\n\]*cmdlne-dM-M.c" } } */ diff --git a/gcc/testsuite/gcc.dg/gomp/attrs-21.c b/gcc/testsuite/gcc.dg/gomp/attrs-21.c index 551fe6c..e572f21 100644 --- a/gcc/testsuite/gcc.dg/gomp/attrs-21.c +++ b/gcc/testsuite/gcc.dg/gomp/attrs-21.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-fopenmp -std=c23" */ +/* { dg-options "-fopenmp -std=c23" } */ void foo () diff --git a/gcc/testsuite/gcc.dg/gomp/parallel-2.c b/gcc/testsuite/gcc.dg/gomp/parallel-2.c index b2d653d..38875ad 100644 --- a/gcc/testsuite/gcc.dg/gomp/parallel-2.c +++ b/gcc/testsuite/gcc.dg/gomp/parallel-2.c @@ -8,7 +8,7 @@ void foo() { #pragma omp parallel { - #pragma omp parallel default(none) // { dg-message: "note: enclosing 'parallel'" } + #pragma omp parallel default(none) // { dg-message "note: enclosing 'parallel'" } { i++; // { dg-error "not specified" } } diff --git a/gcc/testsuite/gcc.dg/ipa/ipa-icf-40.c b/gcc/testsuite/gcc.dg/ipa/ipa-icf-40.c new file mode 100644 index 0000000..ab328ba --- /dev/null +++ b/gcc/testsuite/gcc.dg/ipa/ipa-icf-40.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-ipa-icf-optimized" } */ + +int c0 = 0; +typedef int v4si __attribute__((vector_size(4*sizeof(int)))); +v4si a; +int f() +{ + return a[c0]; +} +int g() +{ + return a[c0]; +} + +/* { dg-final { scan-ipa-dump "optimized: Semantic equality hit:f/\[0-9+\]+->g/\[0-9+\]+" "icf" } } */ diff --git a/gcc/testsuite/gcc.dg/ipa/ipa-sra-14.c b/gcc/testsuite/gcc.dg/ipa/ipa-sra-14.c index 75619c6..81bfd3c 100644 --- a/gcc/testsuite/gcc.dg/ipa/ipa-sra-14.c +++ b/gcc/testsuite/gcc.dg/ipa/ipa-sra-14.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-options "-O2 -fipa-sra -fdump-ipa-sra" } */ +/* { dg-options "-O2 -fipa-sra -fdump-ipa-sra" } */ /* Check of a transitive recursive structure split. */ diff --git a/gcc/testsuite/gcc.dg/ipa/pr110377.c b/gcc/testsuite/gcc.dg/ipa/pr110377.c index 63120a9..76faef5 100644 --- a/gcc/testsuite/gcc.dg/ipa/pr110377.c +++ b/gcc/testsuite/gcc.dg/ipa/pr110377.c @@ -1,4 +1,4 @@ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-options "-O2 -fdump-ipa-cp" } */ int test3(int); __attribute__ ((noinline)) diff --git a/gcc/testsuite/gcc.dg/plugin/infoleak-1.c b/gcc/testsuite/gcc.dg/plugin/infoleak-1.c index 4c5a86a..07e3101 100644 --- a/gcc/testsuite/gcc.dg/plugin/infoleak-1.c +++ b/gcc/testsuite/gcc.dg/plugin/infoleak-1.c @@ -69,7 +69,7 @@ void test_2d (void __user *dst, u32 a) { struct s2 s = {0}; s.i = a; - copy_to_user(dst, &s, sizeof (struct s2)); /* { dg-bogus" } */ + copy_to_user(dst, &s, sizeof (struct s2)); /* { dg-bogus "" } */ } struct empty {}; diff --git a/gcc/testsuite/gcc.dg/pr101364-1.c b/gcc/testsuite/gcc.dg/pr101364-1.c index e7c94a0..c2e3211 100644 --- a/gcc/testsuite/gcc.dg/pr101364-1.c +++ b/gcc/testsuite/gcc.dg/pr101364-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-std=c90 "} */ +/* { dg-options "-std=c90" } */ void fruit(); /* { dg-message "previous declaration" } */ void fruit( /* { dg-error "conflicting types for" } */ diff --git a/gcc/testsuite/gcc.dg/pr110992.c b/gcc/testsuite/gcc.dg/pr110992.c new file mode 100644 index 0000000..05e9b92 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr110992.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-evrp" } */ + +void foo (int); + +int f(unsigned b, short c) +{ + int bt = b; + int bt1 = bt; + int t = bt1 & -(c!=0); + // int t = bt1 * (c!=0); + + if (!t) return 0; + foo(bt == 0); + return 0; +} + +/* { dg-final { scan-tree-dump-times "foo \\(0\\)" 1 "evrp" } } */ diff --git a/gcc/testsuite/gcc.dg/pr113207.c b/gcc/testsuite/gcc.dg/pr113207.c index 81f53d8..a8bc80d 100644 --- a/gcc/testsuite/gcc.dg/pr113207.c +++ b/gcc/testsuite/gcc.dg/pr113207.c @@ -1,4 +1,4 @@ -/* { dg-compile } */ +/* { dg-do compile } */ /* { dg-require-effective-target lto } */ /* { dg-options "-flto -fchecking" } */ diff --git a/gcc/testsuite/gcc.dg/pr118765-2.c b/gcc/testsuite/gcc.dg/pr118765-2.c new file mode 100644 index 0000000..0c3e498 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr118765-2.c @@ -0,0 +1,33 @@ +/* { dg-do "compile" } */ +/* { dg-options "-std=gnu23" } */ + +typedef struct q { int x; } q_t; +typedef struct q { int x; } q_t; +typedef struct q { int x; } q_t; +typedef struct q { int x; } q_t; +typedef struct q { int x; } q_t; + +typedef struct r r_t; +typedef struct r r_t; +typedef struct r r_t; +typedef struct r r_t; +typedef struct r r_t; + +extern struct s { int x; } s; +extern struct s { int x; } s; +extern struct s { int x; } s; +extern struct s { int x; } s; +extern struct s { int x; } s; + +struct t { int x; }; +struct t { int x; }; +struct t { int x; }; +struct t { int x; }; +struct t { int x; }; + +typedef enum e { E = 1 } e_t; +typedef enum e { E = 1 } e_t; +typedef enum e { E = 1 } e_t; +typedef enum e { E = 1 } e_t; +typedef enum e { E = 1 } e_t; + diff --git a/gcc/testsuite/gcc.dg/pr118765-3.c b/gcc/testsuite/gcc.dg/pr118765-3.c new file mode 100644 index 0000000..e86d110 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr118765-3.c @@ -0,0 +1,33 @@ +/* { dg-do "compile" } */ +/* { dg-options "-std=gnu23" } */ + +typedef struct q { int x; } q_t; +typedef struct q q_t; +typedef struct q { int x; } q_t; +typedef struct q q_t; +typedef struct q { int x; } q_t; + +typedef struct r r_t; +typedef struct r r_t; +typedef struct r r_t; +typedef struct r r_t; +typedef struct r r_t; + +extern struct s { int x; } s; +extern struct s s; +extern struct s { int x; } s; +extern struct s s; +extern struct s { int x; } s; + +struct t { int x; }; +struct t; +struct t { int x; }; +struct t; +struct t { int x; }; + +typedef enum e { E = 1 } e_t; +typedef enum e_t; /* { dg-warning "useless storage class specifier in empty declaration" } */ +typedef enum e { E = 1 } e_t; +typedef enum e_t; /* { dg-warning "empty declaration with storage class specifier does not redeclare tag" } */ +typedef enum e { E = 1 } e_t; + diff --git a/gcc/testsuite/gcc.dg/pr119471.c b/gcc/testsuite/gcc.dg/pr119471.c new file mode 100644 index 0000000..4c55d85 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr119471.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-evrp" } */ + +int fa(int a, int b) +{ + int c = a * b; + if (c != 0) + return (a != 0); + return 0; +} +int fb(int a, int b) +{ + int c = a * b; + if (c != 0) + return (b != 0); + return 0; +} + +/* { dg-final { scan-tree-dump-times "PHI <1" 2 "evrp" } } */ diff --git a/gcc/testsuite/gcc.dg/pr35468.c b/gcc/testsuite/gcc.dg/pr35468.c index 085c073..1bd7a9d 100644 --- a/gcc/testsuite/gcc.dg/pr35468.c +++ b/gcc/testsuite/gcc.dg/pr35468.c @@ -1,5 +1,5 @@ /* PR tree-optimization/35468 */ -/* { dg-do compile }*/ +/* { dg-do compile } */ /* { dg-options "-O2 -fno-tree-dce" } */ char *const f(void) diff --git a/gcc/testsuite/gcc.dg/pr82597.c b/gcc/testsuite/gcc.dg/pr82597.c index 98ae264..5c034f3 100644 --- a/gcc/testsuite/gcc.dg/pr82597.c +++ b/gcc/testsuite/gcc.dg/pr82597.c @@ -1,5 +1,5 @@ /* PR rtl-optimization/82597 */ -/* { dg-do compile }*/ +/* { dg-do compile } */ /* { dg-options "-O2 -funroll-loops" } */ int pb; diff --git a/gcc/testsuite/gcc.dg/sarif-output/include-chain-2.c b/gcc/testsuite/gcc.dg/sarif-output/include-chain-2.c index d5e3b0c..643a709 100644 --- a/gcc/testsuite/gcc.dg/sarif-output/include-chain-2.c +++ b/gcc/testsuite/gcc.dg/sarif-output/include-chain-2.c @@ -1,6 +1,6 @@ +/* { dg-do compile } */ /* { dg-require-effective-target analyzer } */ /* { dg-options "-fanalyzer -fdiagnostics-format=sarif-file" } */ -/* { dg-do compile } */ /* Verify that SARIF output can capture chains of include files in diagnostic paths within result locations. diff --git a/gcc/testsuite/gcc.dg/strlenopt-40.c b/gcc/testsuite/gcc.dg/strlenopt-40.c index 7a97ebb..3e61c71 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-40.c +++ b/gcc/testsuite/gcc.dg/strlenopt-40.c @@ -19,7 +19,7 @@ /* Macros to emit a call to funcation named call_in_{true,false}_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM_TRUE(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 @@ -30,7 +30,7 @@ /* Macro to emit a call to a function named call_made_in_{true,false}_branch_on_line_NNN() for each call that's expected to be retained. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that the expected number of both kinds of calls appears in output (a pair for each line with the invocation of the KEEP() macro. */ #define KEEP(expr) \ diff --git a/gcc/testsuite/gcc.dg/strlenopt-44.c b/gcc/testsuite/gcc.dg/strlenopt-44.c index 0af78ac..239695c 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-44.c +++ b/gcc/testsuite/gcc.dg/strlenopt-44.c @@ -17,7 +17,7 @@ /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ASSERT_ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 @@ -25,7 +25,7 @@ /* Macro to emit a call to a function named call_made_in_{true,false}_branch_on_line_NNN() for each call that's expected to be retained. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that the expected number of both kinds of calls appears in output (a pair for each line with the invocation of the KEEP() macro. */ #define ASSERT_KEEP(expr) \ diff --git a/gcc/testsuite/gcc.dg/strlenopt-45.c b/gcc/testsuite/gcc.dg/strlenopt-45.c index 31c1e53..61637b9 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-45.c +++ b/gcc/testsuite/gcc.dg/strlenopt-45.c @@ -26,7 +26,7 @@ extern size_t strnlen (const char *, size_t); /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 @@ -34,7 +34,7 @@ extern size_t strnlen (const char *, size_t); /* Macro to emit a call to a function named call_made_in_{true,false}_branch_on_line_NNN() for each call that's expected to be retained. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that the expected number of both kinds of calls appears in output (a pair for each line with the invocation of the KEEP() macro. */ #define KEEP(expr) \ diff --git a/gcc/testsuite/gcc.dg/strlenopt-50.c b/gcc/testsuite/gcc.dg/strlenopt-50.c index 8e7c9db..b78ffba 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-50.c +++ b/gcc/testsuite/gcc.dg/strlenopt-50.c @@ -17,7 +17,7 @@ /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-51.c b/gcc/testsuite/gcc.dg/strlenopt-51.c index 22a8938..7b5d261 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-51.c +++ b/gcc/testsuite/gcc.dg/strlenopt-51.c @@ -17,7 +17,7 @@ /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated, __COUNTER__); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-52.c b/gcc/testsuite/gcc.dg/strlenopt-52.c index 97b3da7..29727dd 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-52.c +++ b/gcc/testsuite/gcc.dg/strlenopt-52.c @@ -16,7 +16,7 @@ /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-53.c b/gcc/testsuite/gcc.dg/strlenopt-53.c index 489c22b..298665c 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-53.c +++ b/gcc/testsuite/gcc.dg/strlenopt-53.c @@ -17,7 +17,7 @@ /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-54.c b/gcc/testsuite/gcc.dg/strlenopt-54.c index d4e57ff..1044162 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-54.c +++ b/gcc/testsuite/gcc.dg/strlenopt-54.c @@ -16,7 +16,7 @@ /* Macro to emit a call to function named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-55.c b/gcc/testsuite/gcc.dg/strlenopt-55.c index ca89ecd..6b54db8 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-55.c +++ b/gcc/testsuite/gcc.dg/strlenopt-55.c @@ -157,7 +157,7 @@ const char ax_100_3[] = { '1', '2', '3', [100] = '\0' }; /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-58.c b/gcc/testsuite/gcc.dg/strlenopt-58.c index 034961c..6bfc389 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-58.c +++ b/gcc/testsuite/gcc.dg/strlenopt-58.c @@ -24,7 +24,7 @@ extern void* memchr (const void*, int, size_t); /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-59.c b/gcc/testsuite/gcc.dg/strlenopt-59.c index 9bacf87..58bb74b 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-59.c +++ b/gcc/testsuite/gcc.dg/strlenopt-59.c @@ -20,7 +20,7 @@ extern __SIZE_TYPE__ strlen (const char*); /* Macros to emit a call to funcation named call_failed_to_be_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if ((expr)) FAIL (test_not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-62.c b/gcc/testsuite/gcc.dg/strlenopt-62.c index 0e09a7a..38edfde 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-62.c +++ b/gcc/testsuite/gcc.dg/strlenopt-62.c @@ -21,7 +21,7 @@ typedef __INT32_TYPE__ int32_t; /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated, __COUNTER__); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-65.c b/gcc/testsuite/gcc.dg/strlenopt-65.c index 521d7ac..23c69ef 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-65.c +++ b/gcc/testsuite/gcc.dg/strlenopt-65.c @@ -17,7 +17,7 @@ /* Macro to emit a call to function named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM_IF_TRUE(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 @@ -25,7 +25,7 @@ /* Macro to emit a call to a function named call_made_in_{true,false}_branch_on_line_NNN() for each call that's expected to be retained. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that the expected number of both kinds of calls appears in output (a pair for each line with the invocation of the KEEP() macro. */ #define TEST_KEEP(expr) \ diff --git a/gcc/testsuite/gcc.dg/strlenopt-70.c b/gcc/testsuite/gcc.dg/strlenopt-70.c index 0853023..b2dac9a 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-70.c +++ b/gcc/testsuite/gcc.dg/strlenopt-70.c @@ -28,7 +28,7 @@ typedef __UINT64_TYPE__ uint64_t; /* Macros to emit a call to function named call_failed_to_be_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if ((expr)) FAIL (not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-72.c b/gcc/testsuite/gcc.dg/strlenopt-72.c index 9c00a95..b1ae20d 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-72.c +++ b/gcc/testsuite/gcc.dg/strlenopt-72.c @@ -26,7 +26,7 @@ /* Macros to emit a call to function named call_failed_to_be_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if ((expr)) FAIL (not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-73.c b/gcc/testsuite/gcc.dg/strlenopt-73.c index 6e15303..f439247 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-73.c +++ b/gcc/testsuite/gcc.dg/strlenopt-73.c @@ -26,7 +26,7 @@ /* Macros to emit a call to function named call_failed_to_be_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if ((expr)) FAIL (not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-77.c b/gcc/testsuite/gcc.dg/strlenopt-77.c index 76cd11d..44d2bc6 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-77.c +++ b/gcc/testsuite/gcc.dg/strlenopt-77.c @@ -17,7 +17,7 @@ /* Macro to emit a call to function named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ASSERT_ELIM(expr) \ if (!!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 diff --git a/gcc/testsuite/gcc.dg/strlenopt-82.c b/gcc/testsuite/gcc.dg/strlenopt-82.c index 8070f6c..e1e60f4 100644 --- a/gcc/testsuite/gcc.dg/strlenopt-82.c +++ b/gcc/testsuite/gcc.dg/strlenopt-82.c @@ -21,7 +21,7 @@ /* Macro to emit a call to function named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 @@ -29,7 +29,7 @@ /* Macro to emit a call to a function named call_made_in_{true,false}_branch_on_line_NNN() for each call that's expected to be retained. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that the expected number of both kinds of calls appears in output (a pair for each line with the invocation of the KEEP() macro. */ #define KEEP(expr) \ diff --git a/gcc/testsuite/gcc.dg/strub-pr118007.c b/gcc/testsuite/gcc.dg/strub-pr118007.c index 51f4824..92cd31e 100644 --- a/gcc/testsuite/gcc.dg/strub-pr118007.c +++ b/gcc/testsuite/gcc.dg/strub-pr118007.c @@ -1,5 +1,5 @@ -/* { dg-require-effective-target strub } */ /* { dg-do compile } */ +/* { dg-require-effective-target strub } */ /* { dg-options "-fstrub=all -O2" } */ void rb_ec_error_print(struct rb_execution_context_struct *volatile) {} /* { dg-warning "declared inside parameter list" } */ diff --git a/gcc/testsuite/gcc.dg/tanhbysinh.c b/gcc/testsuite/gcc.dg/tanhbysinh.c index 9dbe133..74fdd52 100644 --- a/gcc/testsuite/gcc.dg/tanhbysinh.c +++ b/gcc/testsuite/gcc.dg/tanhbysinh.c @@ -30,12 +30,12 @@ tanhbysinhl_ (long double x) /* There must be no calls to sinh or atanh */ /* There must be calls to cosh */ -/* {dg-final { scan-tree-dump-not "sinh " "optimized" } } */ -/* {dg-final { scan-tree-dump-not "tanh " "optimized" }} */ -/* {dg-final { scan-tree-dump-not "sinhf " "optimized" } } */ -/* {dg-final { scan-tree-dump-not "tanhf " "optimized" }} */ -/* {dg-final { scan-tree-dump-not "sinhl " "optimized" } } */ -/* {dg-final { scan-tree-dump-not "tanhl " "optimized" }} */ +/* { dg-final { scan-tree-dump-not "sinh " "optimized" } } */ +/* { dg-final { scan-tree-dump-not "tanh " "optimized" } } */ +/* { dg-final { scan-tree-dump-not "sinhf " "optimized" } } */ +/* { dg-final { scan-tree-dump-not "tanhf " "optimized" } } */ +/* { dg-final { scan-tree-dump-not "sinhl " "optimized" } } */ +/* { dg-final { scan-tree-dump-not "tanhl " "optimized" } } */ /* { dg-final { scan-tree-dump "cosh " "optimized" } } */ /* { dg-final { scan-tree-dump "coshf " "optimized" } } */ /* { dg-final { scan-tree-dump "coshl " "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/torture/pr117811.c b/gcc/testsuite/gcc.dg/torture/pr117811.c new file mode 100644 index 0000000..13d7e13 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr117811.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ + +#include <string.h> + +typedef int v4 __attribute__((vector_size (4 * sizeof (int)))); + +void __attribute__((noclone,noinline)) do_shift (v4 *vec, int shift) +{ + v4 t = *vec; + + if (shift > 0) + { + t = t >> shift; + } + + *vec = t; +} + +int main () +{ + v4 vec = {0x1000000, 0x2000, 0x300, 0x40}; + v4 vec2 = {0x100000, 0x200, 0x30, 0x4}; + do_shift (&vec, 4); + if (memcmp (&vec, &vec2, sizeof (v4)) != 0) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/torture/pr119133.c b/gcc/testsuite/gcc.dg/torture/pr119133.c index 5369bec..f0c8f73 100644 --- a/gcc/testsuite/gcc.dg/torture/pr119133.c +++ b/gcc/testsuite/gcc.dg/torture/pr119133.c @@ -1,5 +1,6 @@ /* { dg-additional-options "-fno-tree-ter" } */ /* { dg-require-effective-target float16 } */ +/* { dg-add-options float16 } */ int foo(_Float16 f, int i) diff --git a/gcc/testsuite/gcc.dg/torture/pr119417.c b/gcc/testsuite/gcc.dg/torture/pr119417.c new file mode 100644 index 0000000..d0b5378 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr119417.c @@ -0,0 +1,24 @@ +/* PR tree-optimization/119417 */ +/* { dg-do run { target int32 } } */ + +__attribute__((noipa)) void +foo (unsigned long long x) +{ + if (x != 0) + __builtin_abort (); +} + +unsigned v = 0x10000; + +int +main () +{ + unsigned long long a = 0; + while (1) + { + a = a + ((v & 0xFFFF) * 2); + foo (a); + if (v) + break; + } +} diff --git a/gcc/testsuite/gcc.dg/torture/pr119532.c b/gcc/testsuite/gcc.dg/torture/pr119532.c new file mode 100644 index 0000000..bba2e45 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr119532.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target fixed_point } */ + +extern _Fract sinuhk_deg (unsigned short _Accum); + +_Fract cosuhk_deg (unsigned short _Accum deg) +{ + unsigned short _Accum _90_deg = 90uhk; + __asm ("" : "+r" (_90_deg)); + + return deg <= _90_deg + ? sinuhk_deg (_90_deg - deg) + : -sinuhk_deg (deg - _90_deg); +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-4.c b/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-4.c index 97a385e..d25a960 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-4.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-4.c @@ -26,7 +26,7 @@ extern int vsnprintf (char*, size_t, const char*, va_list); /* Macro to emit a call to function named call_in_true_branch_not_eliminated_on_line_NNN() for each expression that's expected to fold to false but that - GCC does not fold. The dg-final scan-tree-dump-time directive + GCC does not fold. The dg-final scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ @@ -35,7 +35,7 @@ extern int vsnprintf (char*, size_t, const char*, va_list); /* Macro to emit a call to a function named call_made_in_{true,false}_branch_on_line_NNN() for each call that's expected to be retained. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that the expected number of both kinds of calls appears in output (a pair for each line with the invocation of the KEEP() macro. */ #define KEEP(expr) \ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-6.c b/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-6.c index df09c81..806a1f4 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-6.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-6.c @@ -23,7 +23,7 @@ int snprintf (char * restrict, size_t, const char *restrict, ...); /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated, __COUNTER__); else (void)0 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-7.c b/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-7.c index bf5072e..f7cb280 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-7.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-7.c @@ -25,7 +25,7 @@ void sink (void*, ...); /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define VERIFY_ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated, __COUNTER__); else (void)0 @@ -33,7 +33,7 @@ void sink (void*, ...); /* Macro to emit a call to a function named call_made_in_{true,false}_branch_on_line_NNN() for each call that's expected to be retained. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that the expected number of both kinds of calls appears in output (a pair for each line with the invocation of the KEEP() macro. */ #define VERIFY_KEEP(expr) \ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-10.c b/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-10.c index 489af62..73e807f 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-10.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-10.c @@ -21,7 +21,7 @@ extern int snprintf (char*, size_t, const char*, ...); /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each call that's expected to be eliminated. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ if (!(expr)) FAIL (in_true_branch_not_eliminated); else (void)0 @@ -29,7 +29,7 @@ extern int snprintf (char*, size_t, const char*, ...); /* Macro to emit a call to a function named call_made_in_{true,false}_branch_on_line_NNN() for each call that's expected to be retained. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that the expected number of both kinds of calls appears in output (a pair for each line with the invocation of the KEEP() macro. */ #define KEEP(expr) \ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-9.c b/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-9.c index 3be18c7..fca7800 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-9.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-9.c @@ -20,7 +20,7 @@ extern int snprintf (char*, size_t, const char*, ...); /* Macro to emit a call to funcation named call_in_true_branch_not_eliminated_on_line_NNN() for each expression that's expected to fold to false but that - GCC does not fold. The dg-final scan-tree-dump-time directive + GCC does not fold. The dg-final scan-tree-dump-times directive at the bottom of the test verifies that no such call appears in output. */ #define ELIM(expr) \ @@ -29,7 +29,7 @@ extern int snprintf (char*, size_t, const char*, ...); /* Macro to emit a call to a function named call_made_in_{true,false}_branch_on_line_NNN() for each call that's expected to be retained. The dg-final - scan-tree-dump-time directive at the bottom of the test verifies + scan-tree-dump-times directive at the bottom of the test verifies that the expected number of both kinds of calls appears in output (a pair for each line with the invocation of the KEEP() macro. */ #define KEEP(expr) \ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-7.c b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-7.c index 3ee43e5..9b180d5 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-7.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-7.c @@ -16,7 +16,7 @@ int f(int t, int c) } /* There should be no ifs as this is converted into `(t != 0) & (c != 0)`. -/* { dg-final { scan-tree-dump-not "if" "optimized" } }*/ +/* { dg-final { scan-tree-dump-not "if" "optimized" } } */ /* { dg-final { scan-tree-dump-times "\[^\r\n\]*_\[0-9\]* = c_\[0-9\]*.D. != 0" 1 "optimized" } } */ /* { dg-final { scan-tree-dump-times "\[^\r\n\]*_\[0-9\]* = t_\[0-9\]*.D. != 0" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-value-5.c b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-value-5.c index 8062eb1..12ba475 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-value-5.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-value-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* PR treee-optimization/114894 */ +/* PR tree-optimization/114894 */ /* Phi-OPT should be able to optimize these without sinking being invoked. */ /* { dg-options "-O -fdump-tree-phiopt2 -fdump-tree-phiopt3 -fdump-tree-optimized -fno-tree-sink" } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c index 093e7a5..545f316 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c @@ -25,4 +25,4 @@ int main () return 0; } -/* { dg-final { scan-tree-dump-times "Optimizing range tests .* 26" 1 "reassoc1"} }*/ +/* { dg-final { scan-tree-dump-times "Optimizing range tests .* 26" 1 "reassoc1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c index fa661d9..a89e068 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c @@ -23,4 +23,4 @@ main () __builtin_abort (); return 0; } -/* { dg-final { scan-tree-dump-times "Optimizing range tests" 3 "reassoc1"} }*/ +/* { dg-final { scan-tree-dump-times "Optimizing range tests" 3 "reassoc1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c index a4da8f7..1c4041b 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c @@ -20,4 +20,4 @@ int main () __builtin_abort (); return 0; } -/* { dg-final { scan-tree-dump-times "Optimizing range tests" 1 "reassoc1"} }*/ +/* { dg-final { scan-tree-dump-times "Optimizing range tests" 1 "reassoc1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c index dde5d84..a81846c 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c @@ -22,4 +22,4 @@ main () return 0; } -/* { dg-final { scan-tree-dump-times "Optimizing range tests" 1 "reassoc1"} }*/ +/* { dg-final { scan-tree-dump-times "Optimizing range tests" 1 "reassoc1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c index ffea714..a0489b9 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c @@ -21,4 +21,4 @@ int main () return 0; } -/* { dg-final { scan-tree-dump-times "Optimizing range tests" 1 "reassoc1"} }*/ +/* { dg-final { scan-tree-dump-times "Optimizing range tests" 1 "reassoc1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-39.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-39.c index 9befe18..de75566 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-39.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-39.c @@ -104,4 +104,4 @@ f13 (double x) /* Can't reassoc here. */ return bar (tmp1 * tmp2, tmp2); } -/* { dg-final { scan-tree-dump-times "Optimizing copysign" 12 "reassoc1"} }*/ +/* { dg-final { scan-tree-dump-times "Optimizing copysign" 12 "reassoc1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-41.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-41.c index 8a18b88..9624c75 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-41.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-41.c @@ -18,4 +18,4 @@ f2 (double y) return (-1.2 * __builtin_copysign (1.1, y)); } -/* { dg-final { scan-tree-dump-times "Optimizing copysign" 2 "reassoc1"} }*/ +/* { dg-final { scan-tree-dump-times "Optimizing copysign" 2 "reassoc1" } } */ diff --git a/gcc/testsuite/gcc.dg/typedef-redecl3.c b/gcc/testsuite/gcc.dg/typedef-redecl3.c new file mode 100644 index 0000000..a2424d6 --- /dev/null +++ b/gcc/testsuite/gcc.dg/typedef-redecl3.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "" } */ + +#define N 64 + +struct f { int x; }; +typedef struct f T; +typedef struct f T __attribute__((aligned (N))); +typedef struct f T __attribute__((aligned (N * 2))); +typedef struct f T __attribute__((aligned (N))); +typedef struct f T; + +_Static_assert (_Alignof (T) == N * 2, "N * 2"); + +enum g { A = 1 }; +typedef enum g S; +typedef enum g S __attribute__((aligned (N))); +typedef enum g S __attribute__((aligned (N * 2))); +typedef enum g S __attribute__((aligned (N))); +typedef enum g S; + +_Static_assert (_Alignof (S) == N * 2, "N * 2"); + diff --git a/gcc/testsuite/gcc.dg/uninit-pred-3_c.c b/gcc/testsuite/gcc.dg/uninit-pred-3_c.c index 1309790..2125448 100644 --- a/gcc/testsuite/gcc.dg/uninit-pred-3_c.c +++ b/gcc/testsuite/gcc.dg/uninit-pred-3_c.c @@ -23,6 +23,6 @@ int foo (int n, int m, int r) if (r > 0) if (flag < 0) - blah(v); /* {dg-bogus "uninitialized" "bogus warning" } */ + blah(v); /* { dg-bogus "uninitialized" "bogus warning" } */ return 0; } diff --git a/gcc/testsuite/gcc.dg/uninit-pred-3_d.c b/gcc/testsuite/gcc.dg/uninit-pred-3_d.c index 9f93876..272e46b 100644 --- a/gcc/testsuite/gcc.dg/uninit-pred-3_d.c +++ b/gcc/testsuite/gcc.dg/uninit-pred-3_d.c @@ -23,6 +23,6 @@ int foo (int n, int m, int r) if (r > 0) if (flag == -1) - blah(v); /* {dg-bogus "uninitialized" "bogus warning" } */ + blah(v); /* { dg-bogus "uninitialized" "bogus warning" } */ return 0; } diff --git a/gcc/testsuite/gcc.dg/variable-sized-type-flex-array.c b/gcc/testsuite/gcc.dg/variable-sized-type-flex-array.c index 3924937..2267af5 100644 --- a/gcc/testsuite/gcc.dg/variable-sized-type-flex-array.c +++ b/gcc/testsuite/gcc.dg/variable-sized-type-flex-array.c @@ -26,6 +26,6 @@ union flex_union_mid1 { int a; struct outer_flex_mid1 b; }; /* { dg-bogus "struc struct flexn { int n; int data[8]; }; struct out_flex_endn { int m; struct flexn flex_data; }; /* { dg-bogus "structure containing a flexible array member is not at the end of another structure" } */ -struct out_flex_midn { struct flexn flex_data; int m; }; /* { dg-bogus"structure containing a flexible array member is not at the end of another structure" } */ -struct outer_flex_midn { struct out_flex_midn out_flex_data; int p; }; /* { dg-bogus"structure containing a flexible array member is not at the end of another structure" } */ +struct out_flex_midn { struct flexn flex_data; int m; }; /* { dg-bogus "structure containing a flexible array member is not at the end of another structure" } */ +struct outer_flex_midn { struct out_flex_midn out_flex_data; int p; }; /* { dg-bogus "structure containing a flexible array member is not at the end of another structure" } */ union flex_union_midn { int a; struct outer_flex_midn b; }; /* { dg-bogus "structure containing a flexible array member is not at the end of another structure" } */ diff --git a/gcc/testsuite/gcc.misc-tests/gcov-29.c b/gcc/testsuite/gcc.misc-tests/gcov-29.c new file mode 100644 index 0000000..320570e --- /dev/null +++ b/gcc/testsuite/gcc.misc-tests/gcov-29.c @@ -0,0 +1,869 @@ +/* { dg-options "--coverage -fpath-coverage" } */ +/* { dg-do run { target native } } */ + +void +pathcov001a () +{ + /* Empty functions should not be problematic. */ +} + +/* Straight line, which should have only one path. */ +/* BEGIN paths + summary: 1/1 +*/ +void +pathcov001b () +/* END */ +{ + int a = 0; + ++a; +} + +/* Same as b, but not executed. */ +/* BEGIN paths + summary: 0/1 + expect: 33 +*/ +void +pathcov001c () +/* END */ +{ + int a = 0; + ++a; +} + +/* 002 is a simple baseline test, with no complicated control flow and no + loops, run with different combinations of inputs that tests the paths in + isolation. */ +/* BEGIN paths + summary: 0/2 + expect: 48(true) 49 52 + expect: 48(false) 51 52 +*/ +void +pathcov002a (int a) +/* END */ +{ + int v = 0; + if (a) + v++; + else + v--; +} + +/* BEGIN paths + summary: 1/2 + expect: 63(false) 66 67 +*/ +void +pathcov002c (int a) +/* END */ +{ + int v = 0; + if (a) + v++; + else + v--; +} + +/* BEGIN paths + summary: 1/2 + expect: 78(true) 79 82 +*/ +void +pathcov002b (int a) +/* END */ +{ + int v = 0; + if (a) + v++; + else + v--; +} + +/* Identical to 002*, but run for both inputs. This should achieve full + coverage. + + BEGIN paths + summary: 2/2 +*/ +void +pathcov002d (int a) +/* END */ +{ + int v = 0; + if (a) + v++; + else + v--; +} + +/* Test individual control flow structures in isolation. */ + +/* BEGIN paths + summary: 0/2 + expect: 112(true) 113 114 + expect: 112(false) 114 +*/ +void +pathcov003a (int a) +/* END */ +{ + if (a) + a++; +} + +/* BEGIN paths + summary: 0/2 + expect: 125(true) 126 129 + expect: 125(false) 128 129 +*/ +void +pathcov003b (int a) +/* END */ +{ + if (a) + a++; + else + a--; +} + +/* BEGIN paths + summary: 0/3 + expect: 141(true) 142 147 + expect: 141(false) 143(true) 144 147 + expect: 141(false) 143(false) 146 147 +*/ +void +pathcov003c (int a) +/* END */ +{ + if (a > 10) + a++; + else if (a > 20) + a--; + else + a += 2; +} + +/* BEGIN paths + summary: 0/5 + expect: 162 162(true) 163 + expect: 162 162(false) 164 + expect: 163 162(true) 163 + expect: 163 162(false) 164 + expect: 162(true) 163 162 +*/ +void +pathcov003d (int a) +/* END */ +{ + int x = 0; + for (int i = 0; i < a; ++i) + ++x; +} + +/* BEGIN paths + summary: 0/5 + expect: 180 180(true) 181 + expect: 180 180(false) 182 + expect: 181 180(true) 181 + expect: 181 180(false) 182 + expect: 180(true) 181 180 +*/ +void +pathcov003e (int a) +/* END */ +{ + int x = 0; + int i = 0; + while (i++ < a) + x++; +} + +/* BEGIN paths + summary: 0/2 + expect: 194 197(false) 198 + expect: 197(true) 197 +*/ +void +pathcov003f (int a) +/* END */ +{ + int x = 0; + int i = 0; + do { + x++; + } while (i++ < a); +} + +/* BEGIN paths + summary: 0/5 + expect: 213 216(true) 220 + expect: 213 216(false) 222 + expect: 216(true) 220 216 + expect: 220 216(true) 220 + expect: 220 216(false) 222 +*/ +void +pathcov003g (int a) +/* END */ +{ + int i = 0; + int x = 0; + +top: + if (i < a) + { + x++; + i++; + goto top; + } +} + +/* This example has a good mix of control flow structures which makes it nice + at identifying problems with the bookeeping/instrumentation. */ + +/* BEGIN paths + summary: 0/9 + expect: 243(false) 247 247(true) 247(true) 249(true) 250 253 + expect: 243(false) 247 247(true) 247(false) 253 + expect: 243(false) 247 247(false) 253 + expect: 243(true) 253 + expect: 249(false) 247(true) 247(true) 249 + expect: 249(false) 247(true) 247(false) 253 + expect: 247(true) 247(true) 249(false) 247 + expect: 247(true) 249(false) 247(true) 247 + expect: 247(true) 249(false) 247(false) 253 +*/ +void +pathcov004a (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* BEGIN paths + args: (1, 0, 0, 0) + summary: 1/9 */ +void +pathcov004b (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* BEGIN paths + args: (0, 0, 0, 0) + summary: 1/9 */ +void +pathcov004c (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* BEGIN paths + args: (0, 1, 0, 0) + summary: 1/9 */ +void +pathcov004d (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* BEGIN paths + args: (0, 1, 1, 0) + summary: 2/9 */ +void +pathcov004e (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* BEGIN paths + args: (0, 2, 1, 0) + summary: 3/9 */ +void +pathcov004f (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* Funny loop exits. */ + +/* BEGIN paths + summary: 0/14 +*/ +void +pathcov005a (int a, int b, int c) +/* END */ +{ + while (a) + { + if (b) + return; + while (c--) + a++; + } +} + +void +pathcov005b (int a, int b, int c) +/* END */ +{ + if (a) + goto loop; + + while (b > 0) + { + b--; +loop: + while (c--) + a++; + } +} + +void +pathcov005c (int a, int b, int c) +/* END */ +{ + while (a-- > 0) c++; + while (b-- > 0) c++; +} + +/* BEGIN paths + summary: 0/67 + + This is a sanity check and baseline and should not be executed. + + With >64 cases we should have >64 paths which guarantees we cannot fit the + full bitset within a in a single gcov type. We want to only update the + relevant counters because extra instructions are expensive in compile time + and binary bloat, and verify that only taken paths are recorded. */ +void +pathcov006a (int a) +/* END */ +{ + int x = 0; + switch (a) + { + case 0: x++; break; + case 1: x++; break; + case 2: x++; break; + case 3: x++; break; + case 4: x++; break; + case 5: x++; break; + case 6: x++; break; + case 7: x++; break; + case 8: x++; break; + case 9: x++; break; + case 10: x++; break; + case 11: x++; break; + case 12: x++; break; + case 13: x++; break; + case 14: x++; break; + case 15: x++; break; + case 16: x++; break; + case 17: x++; break; + case 18: x++; break; + case 19: x++; break; + case 20: x++; break; + case 21: x++; break; + case 22: x++; break; + case 23: x++; break; + case 24: x++; break; + case 25: x++; break; + case 26: x++; break; + case 27: x++; break; + case 28: x++; break; + case 29: x++; break; + case 30: x++; break; + case 31: x++; break; + case 32: x++; break; + case 33: x++; break; + case 34: x++; break; + case 35: x++; break; + case 36: x++; break; + case 37: x++; break; + case 38: x++; break; + case 39: x++; break; + case 40: x++; break; + case 41: x++; break; + case 42: x++; break; + case 43: x++; break; + case 44: x++; break; + case 45: x++; break; + case 46: x++; break; + case 47: x++; break; + case 48: x++; break; + case 49: x++; break; + case 50: x++; break; + case 51: x++; break; + case 52: x++; break; + case 53: x++; break; + case 54: x++; break; + case 55: x++; break; + case 56: x++; break; + case 57: x++; break; + case 58: x++; break; + case 59: x++; break; + case 60: x++; break; + case 61: x++; break; + case 62: x++; break; + case 63: x++; break; + case 64: x++; break; + case 65: x++; break; + } +} + +/* BEGIN paths + args: (0) + summary: 1/67 +*/ +void +pathcov006b (int a) +/* END */ +{ + int x = 0; + switch (a) + { + case 0: x++; break; + case 1: x++; break; + case 2: x++; break; + case 3: x++; break; + case 4: x++; break; + case 5: x++; break; + case 6: x++; break; + case 7: x++; break; + case 8: x++; break; + case 9: x++; break; + case 10: x++; break; + case 11: x++; break; + case 12: x++; break; + case 13: x++; break; + case 14: x++; break; + case 15: x++; break; + case 16: x++; break; + case 17: x++; break; + case 18: x++; break; + case 19: x++; break; + case 20: x++; break; + case 21: x++; break; + case 22: x++; break; + case 23: x++; break; + case 24: x++; break; + case 25: x++; break; + case 26: x++; break; + case 27: x++; break; + case 28: x++; break; + case 29: x++; break; + case 30: x++; break; + case 31: x++; break; + case 32: x++; break; + case 33: x++; break; + case 34: x++; break; + case 35: x++; break; + case 36: x++; break; + case 37: x++; break; + case 38: x++; break; + case 39: x++; break; + case 40: x++; break; + case 41: x++; break; + case 42: x++; break; + case 43: x++; break; + case 44: x++; break; + case 45: x++; break; + case 46: x++; break; + case 47: x++; break; + case 48: x++; break; + case 49: x++; break; + case 50: x++; break; + case 51: x++; break; + case 52: x++; break; + case 53: x++; break; + case 54: x++; break; + case 55: x++; break; + case 56: x++; break; + case 57: x++; break; + case 58: x++; break; + case 59: x++; break; + case 60: x++; break; + case 61: x++; break; + case 62: x++; break; + case 63: x++; break; + case 64: x++; break; + case 65: x++; break; + } +} + +/* BEGIN paths + args: (64) + summary: 1/67 */ +void +pathcov006c (int a) +/* END */ +{ + int x = 0; + switch (a) + { + case 0: x++; break; + case 1: x++; break; + case 2: x++; break; + case 3: x++; break; + case 4: x++; break; + case 5: x++; break; + case 6: x++; break; + case 7: x++; break; + case 8: x++; break; + case 9: x++; break; + case 10: x++; break; + case 11: x++; break; + case 12: x++; break; + case 13: x++; break; + case 14: x++; break; + case 15: x++; break; + case 16: x++; break; + case 17: x++; break; + case 18: x++; break; + case 19: x++; break; + case 20: x++; break; + case 21: x++; break; + case 22: x++; break; + case 23: x++; break; + case 24: x++; break; + case 25: x++; break; + case 26: x++; break; + case 27: x++; break; + case 28: x++; break; + case 29: x++; break; + case 30: x++; break; + case 31: x++; break; + case 32: x++; break; + case 33: x++; break; + case 34: x++; break; + case 35: x++; break; + case 36: x++; break; + case 37: x++; break; + case 38: x++; break; + case 39: x++; break; + case 40: x++; break; + case 41: x++; break; + case 42: x++; break; + case 43: x++; break; + case 44: x++; break; + case 45: x++; break; + case 46: x++; break; + case 47: x++; break; + case 48: x++; break; + case 49: x++; break; + case 50: x++; break; + case 51: x++; break; + case 52: x++; break; + case 53: x++; break; + case 54: x++; break; + case 55: x++; break; + case 56: x++; break; + case 57: x++; break; + case 58: x++; break; + case 59: x++; break; + case 60: x++; break; + case 61: x++; break; + case 62: x++; break; + case 63: x++; break; + case 64: x++; break; + case 65: x++; break; + } +} + +/* BEGIN paths + args: (2, 65) + summary: 2/67 + + In this case we should record a path in both halves of the accumulator + bitsets. Note that the paths don't overlap with the single-half examples in + 006b and 006c to reduce the chance of accidental passes. */ +void +pathcov006d (int a) +/* END */ +{ + int x = 0; + switch (a) + { + case 0: x++; break; + case 1: x++; break; + case 2: x++; break; + case 3: x++; break; + case 4: x++; break; + case 5: x++; break; + case 6: x++; break; + case 7: x++; break; + case 8: x++; break; + case 9: x++; break; + case 10: x++; break; + case 11: x++; break; + case 12: x++; break; + case 13: x++; break; + case 14: x++; break; + case 15: x++; break; + case 16: x++; break; + case 17: x++; break; + case 18: x++; break; + case 19: x++; break; + case 20: x++; break; + case 21: x++; break; + case 22: x++; break; + case 23: x++; break; + case 24: x++; break; + case 25: x++; break; + case 26: x++; break; + case 27: x++; break; + case 28: x++; break; + case 29: x++; break; + case 30: x++; break; + case 31: x++; break; + case 32: x++; break; + case 33: x++; break; + case 34: x++; break; + case 35: x++; break; + case 36: x++; break; + case 37: x++; break; + case 38: x++; break; + case 39: x++; break; + case 40: x++; break; + case 41: x++; break; + case 42: x++; break; + case 43: x++; break; + case 44: x++; break; + case 45: x++; break; + case 46: x++; break; + case 47: x++; break; + case 48: x++; break; + case 49: x++; break; + case 50: x++; break; + case 51: x++; break; + case 52: x++; break; + case 53: x++; break; + case 54: x++; break; + case 55: x++; break; + case 56: x++; break; + case 57: x++; break; + case 58: x++; break; + case 59: x++; break; + case 60: x++; break; + case 61: x++; break; + case 62: x++; break; + case 63: x++; break; + case 64: x++; break; + case 65: x++; break; + } +} + +/* BEGIN paths + args: (66) + summary: 1/67 + + This case should hit the empty default. */ +void +pathcov006e (int a) +/* END */ +{ + int x = 0; + switch (a) + { + case 0: x++; break; + case 1: x++; break; + case 2: x++; break; + case 3: x++; break; + case 4: x++; break; + case 5: x++; break; + case 6: x++; break; + case 7: x++; break; + case 8: x++; break; + case 9: x++; break; + case 10: x++; break; + case 11: x++; break; + case 12: x++; break; + case 13: x++; break; + case 14: x++; break; + case 15: x++; break; + case 16: x++; break; + case 17: x++; break; + case 18: x++; break; + case 19: x++; break; + case 20: x++; break; + case 21: x++; break; + case 22: x++; break; + case 23: x++; break; + case 24: x++; break; + case 25: x++; break; + case 26: x++; break; + case 27: x++; break; + case 28: x++; break; + case 29: x++; break; + case 30: x++; break; + case 31: x++; break; + case 32: x++; break; + case 33: x++; break; + case 34: x++; break; + case 35: x++; break; + case 36: x++; break; + case 37: x++; break; + case 38: x++; break; + case 39: x++; break; + case 40: x++; break; + case 41: x++; break; + case 42: x++; break; + case 43: x++; break; + case 44: x++; break; + case 45: x++; break; + case 46: x++; break; + case 47: x++; break; + case 48: x++; break; + case 49: x++; break; + case 50: x++; break; + case 51: x++; break; + case 52: x++; break; + case 53: x++; break; + case 54: x++; break; + case 55: x++; break; + case 56: x++; break; + case 57: x++; break; + case 58: x++; break; + case 59: x++; break; + case 60: x++; break; + case 61: x++; break; + case 62: x++; break; + case 63: x++; break; + case 64: x++; break; + case 65: x++; break; + default: + } +} + +void *alloc (int) { return 0; } +void *getcwd (void *, int) { return 0; } +void release (void *) {} + +/* Based on gnu_getcwd from tree.c. This function crashed in early + development, and is mostly useful as a regression test. + + BEGIN paths + summary: 0/8 */ +void *gnu_getcwd() +/* END */ +{ + int size = 100; + void *buffer = alloc (size); + + while (1) { + void *value = getcwd (buffer, size); + if (value != 0) return buffer; + size *= 2; + release (buffer); + buffer = (void *) alloc (size); + } +} + +/* BEGIN paths + summary: 0/5 */ +void pathcov007a (int a) +/* END */ +{ + goto mid; + while (1) + { + a--; + mid: + a--; + if (a < -5) + break; + a--; + } +} + +int +main () +{ + pathcov001a (); + pathcov001b (); + /* not called: pathcov001c (); */ + + /* not called: pathcov002a (); */ + pathcov002b (0); + pathcov002c (1); + pathcov002d (0); + pathcov002d (1); + + pathcov004b (1, 0, 0, 0); + pathcov004c (0, 0, 0, 0); + pathcov004d (0, 1, 0, 0); + pathcov004e (0, 1, 1, 0); + pathcov004f (0, 2, 1, 0); + + /* not called: pathcov006a (); */ + pathcov006b (0); + pathcov006c (64); + pathcov006d (2); + pathcov006d (65); + pathcov006e (66); +} + +/* { dg-final { run-gcov prime-paths { --prime-paths-lines gcov-29.c } } } */ diff --git a/gcc/testsuite/gcc.misc-tests/gcov-30.c b/gcc/testsuite/gcc.misc-tests/gcov-30.c new file mode 100644 index 0000000..dbc1681 --- /dev/null +++ b/gcc/testsuite/gcc.misc-tests/gcov-30.c @@ -0,0 +1,869 @@ +/* { dg-options "--coverage -fpath-coverage -fprofile-update=atomic" } */ +/* { dg-do run { target native } } */ + +void +pathcov001a () +{ + /* Empty functions should not be problematic. */ +} + +/* Straight line, which should have only one path. */ +/* BEGIN paths + summary: 1/1 +*/ +void +pathcov001b () +/* END */ +{ + int a = 0; + ++a; +} + +/* Same as b, but not executed. */ +/* BEGIN paths + summary: 0/1 + expect: 33 +*/ +void +pathcov001c () +/* END */ +{ + int a = 0; + ++a; +} + +/* 002 is a simple baseline test, with no complicated control flow and no + loops, run with different combinations of inputs that tests the paths in + isolation. */ +/* BEGIN paths + summary: 0/2 + expect: 48(true) 49 52 + expect: 48(false) 51 52 +*/ +void +pathcov002a (int a) +/* END */ +{ + int v = 0; + if (a) + v++; + else + v--; +} + +/* BEGIN paths + summary: 1/2 + expect: 63(false) 66 67 +*/ +void +pathcov002c (int a) +/* END */ +{ + int v = 0; + if (a) + v++; + else + v--; +} + +/* BEGIN paths + summary: 1/2 + expect: 78(true) 79 82 +*/ +void +pathcov002b (int a) +/* END */ +{ + int v = 0; + if (a) + v++; + else + v--; +} + +/* Identical to 002*, but run for both inputs. This should achieve full + coverage. + + BEGIN paths + summary: 2/2 +*/ +void +pathcov002d (int a) +/* END */ +{ + int v = 0; + if (a) + v++; + else + v--; +} + +/* Test individual control flow structures in isolation. */ + +/* BEGIN paths + summary: 0/2 + expect: 112(true) 113 114 + expect: 112(false) 114 +*/ +void +pathcov003a (int a) +/* END */ +{ + if (a) + a++; +} + +/* BEGIN paths + summary: 0/2 + expect: 125(true) 126 129 + expect: 125(false) 128 129 +*/ +void +pathcov003b (int a) +/* END */ +{ + if (a) + a++; + else + a--; +} + +/* BEGIN paths + summary: 0/3 + expect: 141(true) 142 147 + expect: 141(false) 143(true) 144 147 + expect: 141(false) 143(false) 146 147 +*/ +void +pathcov003c (int a) +/* END */ +{ + if (a > 10) + a++; + else if (a > 20) + a--; + else + a += 2; +} + +/* BEGIN paths + summary: 0/5 + expect: 162 162(true) 163 + expect: 162 162(false) 164 + expect: 163 162(true) 163 + expect: 163 162(false) 164 + expect: 162(true) 163 162 +*/ +void +pathcov003d (int a) +/* END */ +{ + int x = 0; + for (int i = 0; i < a; ++i) + ++x; +} + +/* BEGIN paths + summary: 0/5 + expect: 180 180(true) 181 + expect: 180 180(false) 182 + expect: 181 180(true) 181 + expect: 181 180(false) 182 + expect: 180(true) 181 180 +*/ +void +pathcov003e (int a) +/* END */ +{ + int x = 0; + int i = 0; + while (i++ < a) + x++; +} + +/* BEGIN paths + summary: 0/2 + expect: 194 197(false) 198 + expect: 197(true) 197 +*/ +void +pathcov003f (int a) +/* END */ +{ + int x = 0; + int i = 0; + do { + x++; + } while (i++ < a); +} + +/* BEGIN paths + summary: 0/5 + expect: 213 216(true) 220 + expect: 213 216(false) 222 + expect: 216(true) 220 216 + expect: 220 216(true) 220 + expect: 220 216(false) 222 +*/ +void +pathcov003g (int a) +/* END */ +{ + int i = 0; + int x = 0; + +top: + if (i < a) + { + x++; + i++; + goto top; + } +} + +/* This example has a good mix of control flow structures which makes it nice + at identifying problems with the bookeeping/instrumentation. */ + +/* BEGIN paths + summary: 0/9 + expect: 243(false) 247 247(true) 247(true) 249(true) 250 253 + expect: 243(false) 247 247(true) 247(false) 253 + expect: 243(false) 247 247(false) 253 + expect: 243(true) 253 + expect: 249(false) 247(true) 247(true) 249 + expect: 249(false) 247(true) 247(false) 253 + expect: 247(true) 247(true) 249(false) 247 + expect: 247(true) 249(false) 247(true) 247 + expect: 247(true) 249(false) 247(false) 253 +*/ +void +pathcov004a (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* BEGIN paths + args: (1, 0, 0, 0) + summary: 1/9 */ +void +pathcov004b (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* BEGIN paths + args: (0, 0, 0, 0) + summary: 1/9 */ +void +pathcov004c (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* BEGIN paths + args: (0, 1, 0, 0) + summary: 1/9 */ +void +pathcov004d (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* BEGIN paths + args: (0, 1, 1, 0) + summary: 2/9 */ +void +pathcov004e (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* BEGIN paths + args: (0, 2, 1, 0) + summary: 3/9 */ +void +pathcov004f (int a, int b, int c, int d) +/* END */ +{ + if (a) + {} + else + { + while (b-- > 0 && c-- > 0) + { + if (d) + break; + } + } +} + +/* Funny loop exits. */ + +/* BEGIN paths + summary: 0/14 +*/ +void +pathcov005a (int a, int b, int c) +/* END */ +{ + while (a) + { + if (b) + return; + while (c--) + a++; + } +} + +void +pathcov005b (int a, int b, int c) +/* END */ +{ + if (a) + goto loop; + + while (b > 0) + { + b--; +loop: + while (c--) + a++; + } +} + +void +pathcov005c (int a, int b, int c) +/* END */ +{ + while (a-- > 0) c++; + while (b-- > 0) c++; +} + +/* BEGIN paths + summary: 0/67 + + This is a sanity check and baseline and should not be executed. + + With >64 cases we should have >64 paths which guarantees we cannot fit the + full bitset within a in a single gcov type. We want to only update the + relevant counters because extra instructions are expensive in compile time + and binary bloat, and verify that only taken paths are recorded. */ +void +pathcov006a (int a) +/* END */ +{ + int x = 0; + switch (a) + { + case 0: x++; break; + case 1: x++; break; + case 2: x++; break; + case 3: x++; break; + case 4: x++; break; + case 5: x++; break; + case 6: x++; break; + case 7: x++; break; + case 8: x++; break; + case 9: x++; break; + case 10: x++; break; + case 11: x++; break; + case 12: x++; break; + case 13: x++; break; + case 14: x++; break; + case 15: x++; break; + case 16: x++; break; + case 17: x++; break; + case 18: x++; break; + case 19: x++; break; + case 20: x++; break; + case 21: x++; break; + case 22: x++; break; + case 23: x++; break; + case 24: x++; break; + case 25: x++; break; + case 26: x++; break; + case 27: x++; break; + case 28: x++; break; + case 29: x++; break; + case 30: x++; break; + case 31: x++; break; + case 32: x++; break; + case 33: x++; break; + case 34: x++; break; + case 35: x++; break; + case 36: x++; break; + case 37: x++; break; + case 38: x++; break; + case 39: x++; break; + case 40: x++; break; + case 41: x++; break; + case 42: x++; break; + case 43: x++; break; + case 44: x++; break; + case 45: x++; break; + case 46: x++; break; + case 47: x++; break; + case 48: x++; break; + case 49: x++; break; + case 50: x++; break; + case 51: x++; break; + case 52: x++; break; + case 53: x++; break; + case 54: x++; break; + case 55: x++; break; + case 56: x++; break; + case 57: x++; break; + case 58: x++; break; + case 59: x++; break; + case 60: x++; break; + case 61: x++; break; + case 62: x++; break; + case 63: x++; break; + case 64: x++; break; + case 65: x++; break; + } +} + +/* BEGIN paths + args: (0) + summary: 1/67 +*/ +void +pathcov006b (int a) +/* END */ +{ + int x = 0; + switch (a) + { + case 0: x++; break; + case 1: x++; break; + case 2: x++; break; + case 3: x++; break; + case 4: x++; break; + case 5: x++; break; + case 6: x++; break; + case 7: x++; break; + case 8: x++; break; + case 9: x++; break; + case 10: x++; break; + case 11: x++; break; + case 12: x++; break; + case 13: x++; break; + case 14: x++; break; + case 15: x++; break; + case 16: x++; break; + case 17: x++; break; + case 18: x++; break; + case 19: x++; break; + case 20: x++; break; + case 21: x++; break; + case 22: x++; break; + case 23: x++; break; + case 24: x++; break; + case 25: x++; break; + case 26: x++; break; + case 27: x++; break; + case 28: x++; break; + case 29: x++; break; + case 30: x++; break; + case 31: x++; break; + case 32: x++; break; + case 33: x++; break; + case 34: x++; break; + case 35: x++; break; + case 36: x++; break; + case 37: x++; break; + case 38: x++; break; + case 39: x++; break; + case 40: x++; break; + case 41: x++; break; + case 42: x++; break; + case 43: x++; break; + case 44: x++; break; + case 45: x++; break; + case 46: x++; break; + case 47: x++; break; + case 48: x++; break; + case 49: x++; break; + case 50: x++; break; + case 51: x++; break; + case 52: x++; break; + case 53: x++; break; + case 54: x++; break; + case 55: x++; break; + case 56: x++; break; + case 57: x++; break; + case 58: x++; break; + case 59: x++; break; + case 60: x++; break; + case 61: x++; break; + case 62: x++; break; + case 63: x++; break; + case 64: x++; break; + case 65: x++; break; + } +} + +/* BEGIN paths + args: (64) + summary: 1/67 */ +void +pathcov006c (int a) +/* END */ +{ + int x = 0; + switch (a) + { + case 0: x++; break; + case 1: x++; break; + case 2: x++; break; + case 3: x++; break; + case 4: x++; break; + case 5: x++; break; + case 6: x++; break; + case 7: x++; break; + case 8: x++; break; + case 9: x++; break; + case 10: x++; break; + case 11: x++; break; + case 12: x++; break; + case 13: x++; break; + case 14: x++; break; + case 15: x++; break; + case 16: x++; break; + case 17: x++; break; + case 18: x++; break; + case 19: x++; break; + case 20: x++; break; + case 21: x++; break; + case 22: x++; break; + case 23: x++; break; + case 24: x++; break; + case 25: x++; break; + case 26: x++; break; + case 27: x++; break; + case 28: x++; break; + case 29: x++; break; + case 30: x++; break; + case 31: x++; break; + case 32: x++; break; + case 33: x++; break; + case 34: x++; break; + case 35: x++; break; + case 36: x++; break; + case 37: x++; break; + case 38: x++; break; + case 39: x++; break; + case 40: x++; break; + case 41: x++; break; + case 42: x++; break; + case 43: x++; break; + case 44: x++; break; + case 45: x++; break; + case 46: x++; break; + case 47: x++; break; + case 48: x++; break; + case 49: x++; break; + case 50: x++; break; + case 51: x++; break; + case 52: x++; break; + case 53: x++; break; + case 54: x++; break; + case 55: x++; break; + case 56: x++; break; + case 57: x++; break; + case 58: x++; break; + case 59: x++; break; + case 60: x++; break; + case 61: x++; break; + case 62: x++; break; + case 63: x++; break; + case 64: x++; break; + case 65: x++; break; + } +} + +/* BEGIN paths + args: (2, 65) + summary: 2/67 + + In this case we should record a path in both halves of the accumulator + bitsets. Note that the paths don't overlap with the single-half examples in + 006b and 006c to reduce the chance of accidental passes. */ +void +pathcov006d (int a) +/* END */ +{ + int x = 0; + switch (a) + { + case 0: x++; break; + case 1: x++; break; + case 2: x++; break; + case 3: x++; break; + case 4: x++; break; + case 5: x++; break; + case 6: x++; break; + case 7: x++; break; + case 8: x++; break; + case 9: x++; break; + case 10: x++; break; + case 11: x++; break; + case 12: x++; break; + case 13: x++; break; + case 14: x++; break; + case 15: x++; break; + case 16: x++; break; + case 17: x++; break; + case 18: x++; break; + case 19: x++; break; + case 20: x++; break; + case 21: x++; break; + case 22: x++; break; + case 23: x++; break; + case 24: x++; break; + case 25: x++; break; + case 26: x++; break; + case 27: x++; break; + case 28: x++; break; + case 29: x++; break; + case 30: x++; break; + case 31: x++; break; + case 32: x++; break; + case 33: x++; break; + case 34: x++; break; + case 35: x++; break; + case 36: x++; break; + case 37: x++; break; + case 38: x++; break; + case 39: x++; break; + case 40: x++; break; + case 41: x++; break; + case 42: x++; break; + case 43: x++; break; + case 44: x++; break; + case 45: x++; break; + case 46: x++; break; + case 47: x++; break; + case 48: x++; break; + case 49: x++; break; + case 50: x++; break; + case 51: x++; break; + case 52: x++; break; + case 53: x++; break; + case 54: x++; break; + case 55: x++; break; + case 56: x++; break; + case 57: x++; break; + case 58: x++; break; + case 59: x++; break; + case 60: x++; break; + case 61: x++; break; + case 62: x++; break; + case 63: x++; break; + case 64: x++; break; + case 65: x++; break; + } +} + +/* BEGIN paths + args: (66) + summary: 1/67 + + This case should hit the empty default. */ +void +pathcov006e (int a) +/* END */ +{ + int x = 0; + switch (a) + { + case 0: x++; break; + case 1: x++; break; + case 2: x++; break; + case 3: x++; break; + case 4: x++; break; + case 5: x++; break; + case 6: x++; break; + case 7: x++; break; + case 8: x++; break; + case 9: x++; break; + case 10: x++; break; + case 11: x++; break; + case 12: x++; break; + case 13: x++; break; + case 14: x++; break; + case 15: x++; break; + case 16: x++; break; + case 17: x++; break; + case 18: x++; break; + case 19: x++; break; + case 20: x++; break; + case 21: x++; break; + case 22: x++; break; + case 23: x++; break; + case 24: x++; break; + case 25: x++; break; + case 26: x++; break; + case 27: x++; break; + case 28: x++; break; + case 29: x++; break; + case 30: x++; break; + case 31: x++; break; + case 32: x++; break; + case 33: x++; break; + case 34: x++; break; + case 35: x++; break; + case 36: x++; break; + case 37: x++; break; + case 38: x++; break; + case 39: x++; break; + case 40: x++; break; + case 41: x++; break; + case 42: x++; break; + case 43: x++; break; + case 44: x++; break; + case 45: x++; break; + case 46: x++; break; + case 47: x++; break; + case 48: x++; break; + case 49: x++; break; + case 50: x++; break; + case 51: x++; break; + case 52: x++; break; + case 53: x++; break; + case 54: x++; break; + case 55: x++; break; + case 56: x++; break; + case 57: x++; break; + case 58: x++; break; + case 59: x++; break; + case 60: x++; break; + case 61: x++; break; + case 62: x++; break; + case 63: x++; break; + case 64: x++; break; + case 65: x++; break; + default: + } +} + +void *alloc (int) { return 0; } +void *getcwd (void *, int) { return 0; } +void release (void *) {} + +/* Based on gnu_getcwd from tree.c. This function crashed in early + development, and is mostly useful as a regression test. + + BEGIN paths + summary: 0/8 */ +void *gnu_getcwd() +/* END */ +{ + int size = 100; + void *buffer = alloc (size); + + while (1) { + void *value = getcwd (buffer, size); + if (value != 0) return buffer; + size *= 2; + release (buffer); + buffer = (void *) alloc (size); + } +} + +/* BEGIN paths + summary: 0/5 */ +void pathcov007a (int a) +/* END */ +{ + goto mid; + while (1) + { + a--; + mid: + a--; + if (a < -5) + break; + a--; + } +} + +int +main () +{ + pathcov001a (); + pathcov001b (); + /* not called: pathcov001c (); */ + + /* not called: pathcov002a (); */ + pathcov002b (0); + pathcov002c (1); + pathcov002d (0); + pathcov002d (1); + + pathcov004b (1, 0, 0, 0); + pathcov004c (0, 0, 0, 0); + pathcov004d (0, 1, 0, 0); + pathcov004e (0, 1, 1, 0); + pathcov004f (0, 2, 1, 0); + + /* not called: pathcov006a (); */ + pathcov006b (0); + pathcov006c (64); + pathcov006d (2); + pathcov006d (65); + pathcov006e (66); +} + +/* { dg-final { run-gcov prime-paths { --prime-paths-lines gcov-30.c } } } */ diff --git a/gcc/testsuite/gcc.misc-tests/gcov-31.c b/gcc/testsuite/gcc.misc-tests/gcov-31.c new file mode 100644 index 0000000..6c42d34 --- /dev/null +++ b/gcc/testsuite/gcc.misc-tests/gcov-31.c @@ -0,0 +1,36 @@ +/* { dg-options "--coverage -fpath-coverage" } */ +/* { dg-do compile } */ +/* { dg-require-effective-target sigsetjmp } */ + +/* A collection of odd crashes and regressions observed when building arbitrary + programs. */ + +#include <setjmp.h> + +/* Based on bash-5.2/trap.c run_pending_traps. This revealed a case where + adding IOR failed because there was no to replace in the phi. */ +extern void jump_to_top_level (int) __attribute__((__noreturn__)); +extern sigjmp_buf return_catch; +extern int running_trap; +void +run_pending_traps () +{ + int sig; + if (running_trap > 0) + jump_to_top_level (2); + + for (sig = 1; sig < (64 + 1) ; sig++) + __sigsetjmp ((return_catch), 0); +} + +/* Distilled from alsalib-1.2.11 pcm/pcm_route.c. */ +void +snd_pcm_route_convert1_many() +{ + void *top = &&fst; + void *mid = &&snd; + int sample = 0; + fst: + snd: + goto *mid; +} diff --git a/gcc/testsuite/gcc.misc-tests/gcov-32.c b/gcc/testsuite/gcc.misc-tests/gcov-32.c new file mode 100644 index 0000000..cb8da01 --- /dev/null +++ b/gcc/testsuite/gcc.misc-tests/gcov-32.c @@ -0,0 +1,25 @@ +/* { dg-options "--coverage -fpath-coverage -g -O2" } */ +/* { dg-do compile } */ +/* { dg-require-effective-target sigsetjmp } */ + +#include <setjmp.h> + +extern sigjmp_buf jmpbuf; +typedef void (*sfun) (void); +extern sfun getfn (int); + +/* This distilled srunner setup/teardown functions in check-0.15.2. The + combination of setjmp, optimization, and debug statements causes a problem + if the gimple statement iterator is not positioned correctely before adding + instrumentation code. */ + +extern void +debug_after_labels (int *itr) +{ + for (; *itr; ++itr) + { + sfun fn = getfn (*itr); + if (setjmp (jmpbuf) == 0) + fn (); + } +} diff --git a/gcc/testsuite/gcc.misc-tests/gcov-33.c b/gcc/testsuite/gcc.misc-tests/gcov-33.c new file mode 100644 index 0000000..ecfa8c2 --- /dev/null +++ b/gcc/testsuite/gcc.misc-tests/gcov-33.c @@ -0,0 +1,27 @@ +/* { dg-options "--coverage -fpath-coverage" } */ +/* { dg-do run { target native } } */ + +/* BEGIN paths + summary: 1/2 + expect covered: 13(true) 14 17 +*/ +void +covered (int a) +/* END */ +{ + int v = 0; + if (a) + v++; + else + v--; +} + +/* BEGIN paths + summary: 1/1 + expect covered: 24 */ +int main () +{ + covered (1); +} + +/* { dg-final { run-gcov prime-paths { --prime-paths-lines=covered gcov-33.c } } } */ diff --git a/gcc/testsuite/gcc.misc-tests/gcov-34.c b/gcc/testsuite/gcc.misc-tests/gcov-34.c new file mode 100644 index 0000000..e3c04e0 --- /dev/null +++ b/gcc/testsuite/gcc.misc-tests/gcov-34.c @@ -0,0 +1,29 @@ +/* { dg-options "--coverage -fpath-coverage" } */ +/* { dg-do run { target native } } */ + +/* BEGIN paths + summary: 1/2 + expect covered: 14(true) 15 18 + expect: 14(false) 17 18 +*/ +void +covered (int a) +/* END */ +{ + int v = 0; + if (a) + v++; + else + v--; +} + +/* BEGIN paths + summary: 1/1 + expect covered: 24 +*/ +int main () +{ + covered (1); +} + +/* { dg-final { run-gcov prime-paths { --prime-paths-lines=both gcov-34.c } } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c index c42c7ac..da9370b 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_dup.c @@ -1,6 +1,6 @@ /* { dg-do assemble { target { aarch64*-*-* } } } */ +/* { dg-skip-if "no optimizations" { *-*-* } { "-O0" } { "" } } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ -/* { dg-options "-O2" } */ /* { dg-add-options arm_v8_2a_bf16_neon } */ /* { dg-additional-options "-save-temps" } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c index 3a5efa5..7478323 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c index 16a986a..ebae422 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c index 4b0e242..dd62e32b 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c index 0bebec7..70279d2 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c index 68ce599..2e8205d 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c index 1b5a09b..eae7189 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c index 766c783..f23900e 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c index 8f5c14b..a735602 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c index ccfecf42..2792c2c1 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c index 161c7a0..6b4e028 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c index 2d3cd8a..cf44631 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c index 0d35385..c95a455 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c index ca23e3f..a801785 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c index f51cac3..9d17b05 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c index 57901c8..94e2f5d 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c index 3218873..a1c8c50 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c index af6a5b6..9620001 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c index 2084c30..05cda23 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c index ebfd62a..f567e9b 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c index a27871b..842005b 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c index 0642ae0..1e23056 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c index 5ae28fc..719769a 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c index 2d197b4..77b226b 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c index 540b637..32a7f92 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c index 2173a0e..a24f787 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c index 5f17dbe..7a7617d 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c index 426700c..7c6ad5a 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c index 1583202..afe6c03 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c index 3413de0..6c988e6 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c index 25265d1..87dcfe5 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c index 9ce9558..944b325 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c index f0adb09..2756d0e 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c index 74c4e60..874726d 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c index d308c35..4ee9dc7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c index b393767..ef61a24 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c index 247f7c9..8e725c7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c index 6e2ee50..f09cab0 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c index 27502c2..668be0f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c index e5f57f1..d3aeb69 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c index 188f60c..c66ee58 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c index cfc33c2..dd2dfbd 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c index 9965654..21055db 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c index 6bff954..c6d8481 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c index c7b3d17..a8bb322 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c index e3c5d3a..a2300b4 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c index d5807d7..1de5551 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c index a904e5e..a5b346f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c index ef0132a..d20e2dc 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c index f4f7b37..474cd20 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c index 7b5b16f..b564749 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c index db56171..1e5c289 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c index 6cda3b6..3ee2194 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c index cae69a3..175bcf2 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c index dec8d85..ef5acbb 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c index 94c333e..2f9855c 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c index 0048b5b..f159ac2 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c index 0a95cea..39d92ec 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c index 97d5fba..fe605b5 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c index 3b1b273..597a2e0 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c index 5ff0d22..d58cad8 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c index 105d236..a2a246d 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c index 290c5b1..a4905b1 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c index e367dad..8e443bd 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c index d66adcd..63b793bc 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c index 0229099..b1238de 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c index c0103fb..99c3e95 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c index 6a99109..c5b458b 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c index c9d553a..789d9e2 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-skip-if "" { arm*-*-* } } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c index 1ac6b67..aae9a94 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c index 00c95d3..363d25f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c index f01aefb..72416dc 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c index ea751da..57ff684 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c index 77021be..d2486f1 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c index 6e56ff1..0892ce7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c @@ -1,5 +1,4 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-do run } */ /* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c index 42aeadf..9465e4a 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c @@ -1,5 +1,4 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-do run } */ /* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c index 694fda8..a1461fd 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c @@ -1,5 +1,4 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-do run } */ /* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c index 182463e..763eb47 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c index 4db4b84..5242d55 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c index ce9872f..3b12e62 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c index 39c4897..bcb56fe 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c index d8efbca..9ee302f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c index f6b0216..e70bc6c 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c index b7c5101..1910d9f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c index c454a53..3ab5432 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmla_float_not_fused.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmla_float_not_fused.c index 18d1767..8f1d012 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmla_float_not_fused.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmla_float_not_fused.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ /* { dg-skip-if "" { arm*-*-* } } */ -/* { dg-options "-O3" } */ - #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmls_float_not_fused.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmls_float_not_fused.c index 6c51d04..f434564 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmls_float_not_fused.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmls_float_not_fused.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ /* { dg-skip-if "" { arm*-*-* } } */ -/* { dg-options "-O3" } */ - #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c index 1719d56..d470308 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c index 09684d2..85fe687 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c index 4cd5c37..fe7cc84 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c index 51bbead..1b5b869 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c index f90a36d..2a4f24f 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c index 140647b..d1fd316 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c index 66c744c..1c85773 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c index 90a5be8..d2df24c 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c index 421d827..37ce039 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c index c8df677..df3b83d 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c index 6ebe074..07d873d 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-skip-if "" { arm*-*-* } } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c index 49d319d..e8f464d 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-skip-if "" { arm*-*-* } } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c index 8d06f11..5a3ea62 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-skip-if "" { arm*-*-* } } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c index e8235fe..80c66fd 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-skip-if "" { arm*-*-* } } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c index 3740d6a..f0d0da7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c index 3e6b24e..9dd8981 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c index fc02b6b..9593b18 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c index bcf47f6..6b40e29 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c index 3c4649e..691fcd7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c index 7a4620b..1c596b0 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c index 4a7b721..6cbcf7c 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c index 9af357d..7accb45 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c index eb4b27d..bc841b5 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c index 3fa9749..856a661 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c index eb4b27d..bc841b5 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c index 7c0e619..02d8bb7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c index a9753a4..b32c44c 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c index 82249a7..77f9460 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */ /* { dg-add-options arm_v8_2a_fp16_neon } */ /* { dg-skip-if "" { arm*-*-* } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c index 7d03827..89b910c 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c index 69be40a..3cf5eb3 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c @@ -1,5 +1,4 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-do run } */ /* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c index 4d42bcc..c05f8e7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c @@ -1,5 +1,4 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-do run } */ /* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c index ddc7fa5..a9867c3 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c @@ -1,5 +1,4 @@ /* We haven't implemented these intrinsics for arm yet. */ -/* { dg-do run } */ /* { dg-skip-if "unimplemented" { arm*-*-* } } */ /* { dg-options "-O3" } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c index a7aba11..d24a599 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */ /* { dg-add-options arm_v8_2a_fp16_scalar } */ diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c index 6debfe5..c9485c3 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-skip-if "" { arm*-*-* } } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c index fe35e15..12ae8b0 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-skip-if "" { arm*-*-* } } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c index 5914192..65bc140 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-skip-if "" { arm*-*-* } } */ #include <arm_neon.h> diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-inst-ldlogic.c b/gcc/testsuite/gcc.target/aarch64/atomic-inst-ldlogic.c index 4879d52..ccb89ce 100644 --- a/gcc/testsuite/gcc.target/aarch64/atomic-inst-ldlogic.c +++ b/gcc/testsuite/gcc.target/aarch64/atomic-inst-ldlogic.c @@ -101,54 +101,54 @@ TEST (xor_load_notreturn, XOR_LOAD_NORETURN) /* Load-OR. */ -/* { dg-final { scan-assembler-times "ldsetb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldsetab\t" 16} } */ -/* { dg-final { scan-assembler-times "ldsetlb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldsetalb\t" 16} } */ +/* { dg-final { scan-assembler-times "ldsetb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldsetab\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldsetlb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldsetalb\t" 16 } } */ -/* { dg-final { scan-assembler-times "ldseth\t" 8} } */ -/* { dg-final { scan-assembler-times "ldsetah\t" 16} } */ -/* { dg-final { scan-assembler-times "ldsetlh\t" 8} } */ -/* { dg-final { scan-assembler-times "ldsetalh\t" 16} } */ +/* { dg-final { scan-assembler-times "ldseth\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldsetah\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldsetlh\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldsetalh\t" 16 } } */ -/* { dg-final { scan-assembler-times "ldset\t" 16} } */ -/* { dg-final { scan-assembler-times "ldseta\t" 32} } */ -/* { dg-final { scan-assembler-times "ldsetl\t" 16} } */ -/* { dg-final { scan-assembler-times "ldsetal\t" 32} } */ +/* { dg-final { scan-assembler-times "ldset\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldseta\t" 32 } } */ +/* { dg-final { scan-assembler-times "ldsetl\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldsetal\t" 32 } } */ /* Load-AND. */ -/* { dg-final { scan-assembler-times "ldclrb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldclrab\t" 16} } */ -/* { dg-final { scan-assembler-times "ldclrlb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldclralb\t" 16} } */ +/* { dg-final { scan-assembler-times "ldclrb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldclrab\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldclrlb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldclralb\t" 16 } } */ -/* { dg-final { scan-assembler-times "ldclrh\t" 8} } */ -/* { dg-final { scan-assembler-times "ldclrah\t" 16} } */ -/* { dg-final { scan-assembler-times "ldclrlh\t" 8} } */ -/* { dg-final { scan-assembler-times "ldclralh\t" 16} } */ +/* { dg-final { scan-assembler-times "ldclrh\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldclrah\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldclrlh\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldclralh\t" 16 } } */ -/* { dg-final { scan-assembler-times "ldclr\t" 16} */ -/* { dg-final { scan-assembler-times "ldclra\t" 32} } */ -/* { dg-final { scan-assembler-times "ldclrl\t" 16} } */ -/* { dg-final { scan-assembler-times "ldclral\t" 32} } */ +/* { dg-final { scan-assembler-times "ldclr\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldclra\t" 32 } } */ +/* { dg-final { scan-assembler-times "ldclrl\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldclral\t" 32 } } */ /* Load-XOR. */ -/* { dg-final { scan-assembler-times "ldeorb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldeorab\t" 16} } */ -/* { dg-final { scan-assembler-times "ldeorlb\t" 8} } */ -/* { dg-final { scan-assembler-times "ldeoralb\t" 16} } */ +/* { dg-final { scan-assembler-times "ldeorb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldeorab\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldeorlb\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldeoralb\t" 16 } } */ -/* { dg-final { scan-assembler-times "ldeorh\t" 8} } */ -/* { dg-final { scan-assembler-times "ldeorah\t" 16} } */ -/* { dg-final { scan-assembler-times "ldeorlh\t" 8} } */ -/* { dg-final { scan-assembler-times "ldeoralh\t" 16} } */ +/* { dg-final { scan-assembler-times "ldeorh\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldeorah\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldeorlh\t" 8 } } */ +/* { dg-final { scan-assembler-times "ldeoralh\t" 16 } } */ -/* { dg-final { scan-assembler-times "ldeor\t" 16} */ -/* { dg-final { scan-assembler-times "ldeora\t" 32} } */ -/* { dg-final { scan-assembler-times "ldeorl\t" 16} } */ -/* { dg-final { scan-assembler-times "ldeoral\t" 32} } */ +/* { dg-final { scan-assembler-times "ldeor\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldeora\t" 32 } } */ +/* { dg-final { scan-assembler-times "ldeorl\t" 16 } } */ +/* { dg-final { scan-assembler-times "ldeoral\t" 32 } } */ /* { dg-final { scan-assembler-not "ldaxr\t" } } */ /* { dg-final { scan-assembler-not "stlxr\t" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/crc-crc32c-data16.c b/gcc/testsuite/gcc.target/aarch64/crc-crc32c-data16.c index d82e625..db08136 100644 --- a/gcc/testsuite/gcc.target/aarch64/crc-crc32c-data16.c +++ b/gcc/testsuite/gcc.target/aarch64/crc-crc32c-data16.c @@ -10,7 +10,7 @@ uint32_t _crc32_O0 (uint32_t crc, uint16_t data) { int i; crc = crc ^ data; - for (i = 0; i < 8; i++) { + for (i = 0; i < 16; i++) { if (crc & 1) crc = (crc >> 1) ^ 0x82F63B78; else @@ -24,7 +24,7 @@ uint32_t _crc32 (uint32_t crc, uint16_t data) { int i; crc = crc ^ data; - for (i = 0; i < 8; i++) { + for (i = 0; i < 16; i++) { if (crc & 1) crc = (crc >> 1) ^ 0x82F63B78; else diff --git a/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_1.c b/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_1.c index 2ac0c37..acd2e11 100644 --- a/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_1.c +++ b/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_1.c @@ -1,4 +1,4 @@ -/* { dg-do-compile } */ +/* { dg-do compile } */ /* { dg-options "-O2 --save-temps -fno-schedule-insns2" } */ /* { dg-final { check-function-bodies "**" "" "" } } */ @@ -33,4 +33,4 @@ #define UMAX UCHAR_MAX #define UMIN 0 -#include "saturating_arithmetic.inc"
\ No newline at end of file +#include "saturating_arithmetic.inc" diff --git a/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_2.c b/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_2.c index 2a55aa9..86c88f8 100644 --- a/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_2.c +++ b/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_2.c @@ -1,4 +1,4 @@ -/* { dg-do-compile } */ +/* { dg-do compile } */ /* { dg-options "-O2 --save-temps -fno-schedule-insns2" } */ /* { dg-final { check-function-bodies "**" "" "" } } */ @@ -33,4 +33,4 @@ #define UMAX USHRT_MAX #define UMIN 0 -#include "saturating_arithmetic.inc"
\ No newline at end of file +#include "saturating_arithmetic.inc" diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect.inc b/gcc/testsuite/gcc.target/aarch64/simd/saturating_arithmetic_autovect.inc index 1fadfd5..1fadfd5 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect.inc +++ b/gcc/testsuite/gcc.target/aarch64/simd/saturating_arithmetic_autovect.inc diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_1.c b/gcc/testsuite/gcc.target/aarch64/simd/saturating_arithmetic_autovect_1.c index 2b72be7..2b72be7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_1.c +++ b/gcc/testsuite/gcc.target/aarch64/simd/saturating_arithmetic_autovect_1.c diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_2.c b/gcc/testsuite/gcc.target/aarch64/simd/saturating_arithmetic_autovect_2.c index 0640361..0640361 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_2.c +++ b/gcc/testsuite/gcc.target/aarch64/simd/saturating_arithmetic_autovect_2.c diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_3.c b/gcc/testsuite/gcc.target/aarch64/simd/saturating_arithmetic_autovect_3.c index ea6e0c7..ea6e0c7 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_3.c +++ b/gcc/testsuite/gcc.target/aarch64/simd/saturating_arithmetic_autovect_3.c diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_4.c b/gcc/testsuite/gcc.target/aarch64/simd/saturating_arithmetic_autovect_4.c index 0139063..0139063 100644 --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_4.c +++ b/gcc/testsuite/gcc.target/aarch64/simd/saturating_arithmetic_autovect_4.c diff --git a/gcc/testsuite/gcc.target/aarch64/vls_sve_vec_dup_1.c b/gcc/testsuite/gcc.target/aarch64/vls_sve_vec_dup_1.c new file mode 100644 index 0000000..ada0d4f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/vls_sve_vec_dup_1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=armv8.2-a+sve -msve-vector-bits=128" } */ + +float fasten_main_etot_0; +void fasten_main() { + for (int l = 0; l < 2;) { + int phphb_nz; + for (; l < 32; l++) { + float dslv_e = l && phphb_nz; + fasten_main_etot_0 += dslv_e; + } + } +} + +/* { dg-final { scan-assembler-not {bfi\tw\[0-9\]+} } } */ diff --git a/gcc/testsuite/gcc.target/alpha/memclr-a2-o1-c9-ptr-safe-partial.c b/gcc/testsuite/gcc.target/alpha/memclr-a2-o1-c9-ptr-safe-partial.c new file mode 100644 index 0000000..15dc1b1 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/memclr-a2-o1-c9-ptr-safe-partial.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mbwx -msafe-partial" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "memclr-a2-o1-c9-ptr.c" + +/* Expect assembly such as: + + stb $31,1($16) + stw $31,2($16) + stw $31,4($16) + stw $31,6($16) + stw $31,8($16) + + that is with a byte store at offset 1, followed by word stores at + offsets 2, 4, 6, and 8. */ + +/* { dg-final { scan-assembler-times "\\sstb\\s\\\$31,1\\\(\\\$16\\\)\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstw\\s\\\$31,2\\\(\\\$16\\\)\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstw\\s\\\$31,4\\\(\\\$16\\\)\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstw\\s\\\$31,6\\\(\\\$16\\\)\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstw\\s\\\$31,8\\\(\\\$16\\\)\\s" 1 } } */ diff --git a/gcc/testsuite/gcc.target/alpha/memclr-a2-o1-c9-ptr.c b/gcc/testsuite/gcc.target/alpha/memclr-a2-o1-c9-ptr.c index 3f7edc8..0ff1049 100644 --- a/gcc/testsuite/gcc.target/alpha/memclr-a2-o1-c9-ptr.c +++ b/gcc/testsuite/gcc.target/alpha/memclr-a2-o1-c9-ptr.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mbwx" } */ +/* { dg-options "-mbwx -mno-safe-partial" } */ /* { dg-skip-if "" { *-*-* } { "-O0" } } */ typedef unsigned int __attribute__ ((mode (QI))) int08_t; diff --git a/gcc/testsuite/gcc.target/alpha/memcpy-di-unaligned-dst-safe-partial-bwx.c b/gcc/testsuite/gcc.target/alpha/memcpy-di-unaligned-dst-safe-partial-bwx.c new file mode 100644 index 0000000..1626261 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/memcpy-di-unaligned-dst-safe-partial-bwx.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-msafe-partial -mbwx" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "memcpy-di-unaligned-dst.c" + +/* { dg-final { scan-assembler-times "\\sldq\\s" 7 } } */ +/* { dg-final { scan-assembler-times "\\sstb\\s" 16 } } */ +/* { dg-final { scan-assembler-times "\\sstq_u\\s" 6 } } */ +/* { dg-final { scan-assembler-not "\\sldq_l\\s" } } */ +/* { dg-final { scan-assembler-not "\\sldq_u\\s" } } */ +/* { dg-final { scan-assembler-not "\\sstq\\s" } } */ +/* { dg-final { scan-assembler-not "\\sstq_c\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/memcpy-di-unaligned-dst-safe-partial.c b/gcc/testsuite/gcc.target/alpha/memcpy-di-unaligned-dst-safe-partial.c new file mode 100644 index 0000000..869fdf3 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/memcpy-di-unaligned-dst-safe-partial.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-msafe-partial -mno-bwx" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "memcpy-di-unaligned-dst.c" + +/* { dg-final { scan-assembler-times "\\sldq\\s" 7 } } */ +/* { dg-final { scan-assembler-times "\\sldq_l\\s" 2 } } */ +/* { dg-final { scan-assembler-times "\\sstq_c\\s" 2 } } */ +/* { dg-final { scan-assembler-times "\\sstq_u\\s" 6 } } */ +/* { dg-final { scan-assembler-not "\\sldq_u\\s" } } */ +/* { dg-final { scan-assembler-not "\\sstq\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/memcpy-di-unaligned-dst.c b/gcc/testsuite/gcc.target/alpha/memcpy-di-unaligned-dst.c index 5e9b5c3..373e2aa 100644 --- a/gcc/testsuite/gcc.target/alpha/memcpy-di-unaligned-dst.c +++ b/gcc/testsuite/gcc.target/alpha/memcpy-di-unaligned-dst.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "" } */ +/* { dg-options "-mno-safe-partial" } */ /* { dg-skip-if "" { *-*-* } { "-O0" } } */ unsigned long unaligned_src_di[9] = { [0 ... 8] = 0xfefdfcfbfaf9f8f7 }; diff --git a/gcc/testsuite/gcc.target/alpha/memcpy-si-unaligned-dst-safe-partial-bwx.c b/gcc/testsuite/gcc.target/alpha/memcpy-si-unaligned-dst-safe-partial-bwx.c new file mode 100644 index 0000000..2464005 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/memcpy-si-unaligned-dst-safe-partial-bwx.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-msafe-partial -mbwx" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "memcpy-si-unaligned-dst.c" + +/* { dg-final { scan-assembler-times "\\sldl\\s" 15 } } */ +/* { dg-final { scan-assembler-times "\\sstb\\s" 20 } } */ +/* { dg-final { scan-assembler-times "\\sstq_u\\s" 6 } } */ +/* { dg-final { scan-assembler-not "\\sldq_l\\s" } } */ +/* { dg-final { scan-assembler-not "\\sldq_u\\s" } } */ +/* { dg-final { scan-assembler-not "\\sstl\\s" } } */ +/* { dg-final { scan-assembler-not "\\sstq_c\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/memcpy-si-unaligned-dst-safe-partial.c b/gcc/testsuite/gcc.target/alpha/memcpy-si-unaligned-dst-safe-partial.c new file mode 100644 index 0000000..6c9f877 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/memcpy-si-unaligned-dst-safe-partial.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-msafe-partial -mno-bwx" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "memcpy-si-unaligned-dst.c" + +/* { dg-final { scan-assembler-times "\\sldl\\s" 15 } } */ +/* { dg-final { scan-assembler-times "\\sldq_l\\s" 4 } } */ +/* { dg-final { scan-assembler-times "\\sstq_c\\s" 4 } } */ +/* { dg-final { scan-assembler-times "\\sstq_u\\s" 6 } } */ +/* { dg-final { scan-assembler-not "\\sldq_u\\s" } } */ +/* { dg-final { scan-assembler-not "\\sstl\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/memcpy-si-unaligned-dst.c b/gcc/testsuite/gcc.target/alpha/memcpy-si-unaligned-dst.c index a2efade..aef4e59 100644 --- a/gcc/testsuite/gcc.target/alpha/memcpy-si-unaligned-dst.c +++ b/gcc/testsuite/gcc.target/alpha/memcpy-si-unaligned-dst.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "" } */ +/* { dg-options "-mno-safe-partial" } */ /* { dg-skip-if "" { *-*-* } { "-O0" } } */ unsigned int unaligned_src_si[17] = { [0 ... 16] = 0xfefdfcfb }; diff --git a/gcc/testsuite/gcc.target/alpha/stb-bwa.c b/gcc/testsuite/gcc.target/alpha/stb-bwa.c new file mode 100644 index 0000000..d7a45db --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stb-bwa.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -msafe-bwa" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +void +stb (char *p, char v) +{ + *p = v; +} + +/* Expect assembly such as: + + bic $16,7,$2 + insbl $17,$16,$17 +$L2: + ldq_l $1,0($2) + mskbl $1,$16,$1 + bis $17,$1,$1 + stq_c $1,0($2) + beq $1,$L2 + + with address masking. */ + +/* { dg-final { scan-assembler-times "\\sldq_l\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstq_c\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sinsbl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\smskbl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sbic\\s\\\$\[0-9\]+,7,\\\$\[0-9\]+\\s" 1 } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stb-bwx.c b/gcc/testsuite/gcc.target/alpha/stb-bwx.c new file mode 100644 index 0000000..556397b --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stb-bwx.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mbwx" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +void +stb (char *p, char v) +{ + *p = v; +} + +/* Expect assembly such as: + + stb $17,0($16) + */ + +/* { dg-final { scan-assembler-times "\\sstb\\s\\\$17,0\\\(\\\$16\\\)\\s" 1 } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stb.c b/gcc/testsuite/gcc.target/alpha/stb.c new file mode 100644 index 0000000..4953bc4 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stb.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -mno-safe-bwa" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +void +stb (char *p, char v) +{ + *p = v; +} + +/* Expect assembly such as: + + insbl $17,$16,$17 + ldq_u $1,0($16) + mskbl $1,$16,$1 + bis $17,$1,$17 + stq_u $17,0($16) + + without address masking. */ + +/* { dg-final { scan-assembler-times "\\sldq_u\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstq_u\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sinsbl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\smskbl\\s" 1 } } */ +/* { dg-final { scan-assembler-not "\\sbic\\s\\\$\[0-9\]+,7,\\\$\[0-9\]+\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stba-bwa.c b/gcc/testsuite/gcc.target/alpha/stba-bwa.c new file mode 100644 index 0000000..07cf954 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stba-bwa.c @@ -0,0 +1,35 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -msafe-bwa" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +typedef union + { + int i; + char c; + } +char_a; + +void +stba (char_a *p, char v) +{ + p->c = v; +} + +/* Expect assembly such as: + + and $17,0xff,$17 +$L2: + ldl_l $1,0($16) + bic $1,255,$1 + bis $17,$1,$1 + stl_c $1,0($16) + beq $1,$L2 + + without any INSBL or MSKBL instructions and without address masking. */ + +/* { dg-final { scan-assembler-times "\\sldl_l\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstl_c\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sand\\s\\\$\[0-9\]+,0xff,\\\$\[0-9\]+\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sbic\\s\\\$\[0-9\]+,255,\\\$\[0-9\]+\\s" 1 } } */ +/* { dg-final { scan-assembler-not "\\sbic\\s\\\$\[0-9\]+,7,\\\$\[0-9\]+\\s" } } */ +/* { dg-final { scan-assembler-not "\\s(?:insbl|mskbl)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stba-bwx.c b/gcc/testsuite/gcc.target/alpha/stba-bwx.c new file mode 100644 index 0000000..08b51b1 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stba-bwx.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mbwx" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +typedef union + { + int i; + char c; + } +char_a; + +void +stba (char_a *p, char v) +{ + p->c = v; +} + +/* Expect assembly such as: + + stb $17,0($16) + */ + +/* { dg-final { scan-assembler-times "\\sstb\\s\\\$17,0\\\(\\\$16\\\)\\s" 1 } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stba.c b/gcc/testsuite/gcc.target/alpha/stba.c new file mode 100644 index 0000000..fe7856c --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stba.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -mno-safe-bwa" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +typedef union + { + int i; + char c; + } +char_a; + +void +stba (char_a *p, char v) +{ + p->c = v; +} + +/* Expect assembly such as: + + and $17,0xff,$17 + ldl $1,0($16) + bic $1,255,$1 + bis $17,$1,$17 + stl $17,0($16) + + without any INSBL or MSKBL instructions and without address masking. */ + +/* { dg-final { scan-assembler-times "\\sldl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sand\\s\\\$\[0-9\]+,0xff,\\\$\[0-9\]+\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sbic\\s\\\$\[0-9\]+,255,\\\$\[0-9\]+\\s" 1 } } */ +/* { dg-final { scan-assembler-not "\\sbic\\s\\\$\[0-9\]+,7,\\\$\[0-9\]+\\s" } } */ +/* { dg-final { scan-assembler-not "\\s(?:insbl|mskbl)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stlx0-safe-partial-bwx.c b/gcc/testsuite/gcc.target/alpha/stlx0-safe-partial-bwx.c new file mode 100644 index 0000000..70df631 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stlx0-safe-partial-bwx.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mbwx -msafe-partial" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "stlx0.c" + +/* Expect assembly such as: + + stb $31,0($16) + stb $31,1($16) + stb $31,2($16) + stb $31,3($16) + + without any LDQ_U or STQ_U instructions. */ + +/* { dg-final { scan-assembler-times "\\sstb\\s" 4 } } */ +/* { dg-final { scan-assembler-not "\\s(?:ldq_u|stq_u)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stlx0-safe-partial.c b/gcc/testsuite/gcc.target/alpha/stlx0-safe-partial.c new file mode 100644 index 0000000..dc3e86d --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stlx0-safe-partial.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -msafe-partial" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "stlx0.c" + +/* Expect assembly such as: + + lda $2,3($16) + bic $2,7,$2 +$L2: + ldq_l $1,0($2) + msklh $1,$16,$1 + stq_c $1,0($2) + beq $1,$L2 + bic $16,7,$2 +$L3: + ldq_l $1,0($2) + mskll $1,$16,$1 + stq_c $1,0($2) + beq $1,$L3 + + without any INSLH, INSLL, BIS, LDQ_U, or STQ_U instructions. */ + +/* { dg-final { scan-assembler-times "\\sldq_l\\s" 2 } } */ +/* { dg-final { scan-assembler-times "\\smsklh\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\smskll\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstq_c\\s" 2 } } */ +/* { dg-final { scan-assembler-not "\\s(?:bis|inslh|insll|ldq_u|stq_u)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stlx0.c b/gcc/testsuite/gcc.target/alpha/stlx0.c index 876eceb..3b340bc 100644 --- a/gcc/testsuite/gcc.target/alpha/stlx0.c +++ b/gcc/testsuite/gcc.target/alpha/stlx0.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "" } */ +/* { dg-options "-mno-safe-partial" } */ /* { dg-skip-if "" { *-*-* } { "-O0" } } */ typedef struct { int v __attribute__ ((packed)); } intx; diff --git a/gcc/testsuite/gcc.target/alpha/stqx0-safe-partial-bwx.c b/gcc/testsuite/gcc.target/alpha/stqx0-safe-partial-bwx.c new file mode 100644 index 0000000..62f6c78 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stqx0-safe-partial-bwx.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mbwx -msafe-partial" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "stqx0.c" + +/* Expect assembly such as: + + stb $31,0($16) + stb $31,1($16) + stb $31,2($16) + stb $31,3($16) + stb $31,4($16) + stb $31,5($16) + stb $31,6($16) + stb $31,7($16) + + without any LDQ_U or STQ_U instructions. */ + +/* { dg-final { scan-assembler-times "\\sstb\\s" 8 } } */ +/* { dg-final { scan-assembler-not "\\s(?:ldq_u|stq_u)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stqx0-safe-partial.c b/gcc/testsuite/gcc.target/alpha/stqx0-safe-partial.c new file mode 100644 index 0000000..7aa9e80 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stqx0-safe-partial.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -msafe-partial" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "stqx0.c" + +/* Expect assembly such as: + + lda $2,7($16) + bic $2,7,$2 +$L2: + ldq_l $1,0($2) + mskqh $1,$16,$1 + stq_c $1,0($2) + beq $1,$L2 + bic $16,7,$2 +$L3: + ldq_l $1,0($2) + mskql $1,$16,$1 + stq_c $1,0($2) + beq $1,$L3 + + without any INSLH, INSLL, BIS, LDQ_U, or STQ_U instructions. */ + +/* { dg-final { scan-assembler-times "\\sldq_l\\s" 2 } } */ +/* { dg-final { scan-assembler-times "\\smskqh\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\smskql\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstq_c\\s" 2 } } */ +/* { dg-final { scan-assembler-not "\\s(?:bis|insqh|insql|ldq_u|stq_u)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stqx0.c b/gcc/testsuite/gcc.target/alpha/stqx0.c index 042cdf0..80261a8 100644 --- a/gcc/testsuite/gcc.target/alpha/stqx0.c +++ b/gcc/testsuite/gcc.target/alpha/stqx0.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "" } */ +/* { dg-options "-mno-safe-partial" } */ /* { dg-skip-if "" { *-*-* } { "-O0" } } */ typedef struct { long v __attribute__ ((packed)); } longx; diff --git a/gcc/testsuite/gcc.target/alpha/stw-bwa.c b/gcc/testsuite/gcc.target/alpha/stw-bwa.c new file mode 100644 index 0000000..8b764b3 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stw-bwa.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -msafe-bwa" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +void +stw (short *p, short v) +{ + *p = v; +} + +/* Expect assembly such as: + + bic $16,7,$2 + inswl $17,$16,$17 +$L2: + ldq_l $1,0($2) + mskwl $1,$16,$1 + bis $17,$1,$1 + stq_c $1,0($2) + beq $1,$L2 + + with address masking. */ + +/* { dg-final { scan-assembler-times "\\sldq_l\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstq_c\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sinswl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\smskwl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sbic\\s\\\$\[0-9\]+,7,\\\$\[0-9\]+\\s" 1 } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stw-bwx.c b/gcc/testsuite/gcc.target/alpha/stw-bwx.c new file mode 100644 index 0000000..b4f18ad --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stw-bwx.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mbwx" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +void +stw (short *p, short v) +{ + *p = v; +} + +/* Expect assembly such as: + + stw $17,0($16) + */ + +/* { dg-final { scan-assembler-times "\\sstw\\s\\\$17,0\\\(\\\$16\\\)\\s" 1 } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stw.c b/gcc/testsuite/gcc.target/alpha/stw.c new file mode 100644 index 0000000..655fdd9 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stw.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -mno-safe-bwa" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +void +stw (short *p, short v) +{ + *p = v; +} + +/* Expect assembly such as: + + inswl $17,$16,$17 + ldq_u $1,0($16) + mskwl $1,$16,$1 + bis $17,$1,$17 + stq_u $17,0($16) + + without address masking. */ + +/* { dg-final { scan-assembler-times "\\sldq_u\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstq_u\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sinswl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\smskwl\\s" 1 } } */ +/* { dg-final { scan-assembler-not "\\sbic\\s\\\$\[0-9\]+,7,\\\$\[0-9\]+\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stwa-bwa.c b/gcc/testsuite/gcc.target/alpha/stwa-bwa.c new file mode 100644 index 0000000..9ee226e2 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stwa-bwa.c @@ -0,0 +1,35 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -msafe-bwa" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +typedef union + { + int i; + short c; + } +short_a; + +void +stwa (short_a *p, short v) +{ + p->c = v; +} + +/* Expect assembly such as: + + zapnot $17,3,$17 +$L2: + ldl_l $1,0($16) + zapnot $1,252,$1 + bis $17,$1,$1 + stl_c $1,0($16) + beq $1,$L2 + + without any INSWL or MSKWL instructions and without address masking. */ + +/* { dg-final { scan-assembler-times "\\sldl_l\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstl_c\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\szapnot\\s\\\$\[0-9\]+,3,\\\$\[0-9\]+\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\szapnot\\s\\\$\[0-9\]+,252,\\\$\[0-9\]+\\s" 1 } } */ +/* { dg-final { scan-assembler-not "\\sbic\\s\\\$\[0-9\]+,7,\\\$\[0-9\]+\\s" } } */ +/* { dg-final { scan-assembler-not "\\s(?:inswl|mskwl)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stwa-bwx.c b/gcc/testsuite/gcc.target/alpha/stwa-bwx.c new file mode 100644 index 0000000..6331d62 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stwa-bwx.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-mbwx" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +typedef union + { + int i; + short c; + } +short_a; + +void +stwa (short_a *p, short v) +{ + p->c = v; +} + +/* Expect assembly such as: + + stw $17,0($16) + */ + +/* { dg-final { scan-assembler-times "\\sstw\\s\\\$17,0\\\(\\\$16\\\)\\s" 1 } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stwa.c b/gcc/testsuite/gcc.target/alpha/stwa.c new file mode 100644 index 0000000..6b273cf --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stwa.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -mno-safe-bwa" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +typedef union + { + int i; + short c; + } +short_a; + +void +stwa (short_a *p, short v) +{ + p->c = v; +} + +/* Expect assembly such as: + + zapnot $17,3,$17 + ldl $1,0($16) + zapnot $1,252,$1 + bis $17,$1,$17 + stl $17,0($16) + + without any INSWL or MSKWL instructions and without address masking. */ + +/* { dg-final { scan-assembler-times "\\sldl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\szapnot\\s\\\$\[0-9\]+,3,\\\$\[0-9\]+\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\szapnot\\s\\\$\[0-9\]+,252,\\\$\[0-9\]+\\s" 1 } } */ +/* { dg-final { scan-assembler-not "\\sbic\\s\\\$\[0-9\]+,7,\\\$\[0-9\]+\\s" } } */ +/* { dg-final { scan-assembler-not "\\s(?:inswl|mskwl)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stwx0-bwx.c b/gcc/testsuite/gcc.target/alpha/stwx0-bwx.c index bba31df..6256f82 100644 --- a/gcc/testsuite/gcc.target/alpha/stwx0-bwx.c +++ b/gcc/testsuite/gcc.target/alpha/stwx0-bwx.c @@ -1,19 +1,15 @@ /* { dg-do compile } */ -/* { dg-options "-mbwx" } */ +/* { dg-options "-mbwx -mno-safe-partial" } */ /* { dg-skip-if "" { *-*-* } { "-O0" } } */ -typedef struct { short v __attribute__ ((packed)); } shortx; - -void -stwx0 (shortx *p) -{ - p->v = 0; -} +#include "stwx0.c" /* Expect assembly such as: stb $31,0($16) stb $31,1($16) - */ + + without any LDQ_U or STQ_U instructions. */ /* { dg-final { scan-assembler-times "\\sstb\\s\\\$31," 2 } } */ +/* { dg-final { scan-assembler-not "\\s(?:ldq_u|stq_u)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stwx0-safe-partial-bwx.c b/gcc/testsuite/gcc.target/alpha/stwx0-safe-partial-bwx.c new file mode 100644 index 0000000..031d4c6 --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stwx0-safe-partial-bwx.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-mbwx -msafe-partial" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "stwx0.c" + +/* Expect assembly such as: + + stb $31,0($16) + stb $31,1($16) + + without any LDQ_U or STQ_U instructions. */ + +/* { dg-final { scan-assembler-times "\\sstb\\s\\\$31," 2 } } */ +/* { dg-final { scan-assembler-not "\\s(?:ldq_u|stq_u)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stwx0-safe-partial.c b/gcc/testsuite/gcc.target/alpha/stwx0-safe-partial.c new file mode 100644 index 0000000..3d0eedd --- /dev/null +++ b/gcc/testsuite/gcc.target/alpha/stwx0-safe-partial.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mno-bwx -msafe-partial" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" } } */ + +#include "stwx0.c" + +/* Expect assembly such as: + + lda $2,1($16) + bic $2,7,$2 +$L2: + ldq_l $1,0($2) + mskwh $1,$16,$1 + stq_c $1,0($2) + beq $1,$L2 + bic $16,7,$2 +$L3: + ldq_l $1,0($2) + mskwl $1,$16,$1 + stq_c $1,0($2) + beq $1,$L3 + + without any INSWH, INSWL, BIS, LDQ_U, or STQ_U instructions. */ + +/* { dg-final { scan-assembler-times "\\sldq_l\\s" 2 } } */ +/* { dg-final { scan-assembler-times "\\smskwh\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\smskwl\\s" 1 } } */ +/* { dg-final { scan-assembler-times "\\sstq_c\\s" 2 } } */ +/* { dg-final { scan-assembler-not "\\s(?:bis|inswh|inswl|ldq_u|stq_u)\\s" } } */ diff --git a/gcc/testsuite/gcc.target/alpha/stwx0.c b/gcc/testsuite/gcc.target/alpha/stwx0.c index d60d33f..ad4e716 100644 --- a/gcc/testsuite/gcc.target/alpha/stwx0.c +++ b/gcc/testsuite/gcc.target/alpha/stwx0.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mno-bwx" } */ +/* { dg-options "-mno-bwx -mno-safe-partial" } */ /* { dg-skip-if "" { *-*-* } { "-O0" } } */ typedef struct { short v __attribute__ ((packed)); } shortx; diff --git a/gcc/testsuite/gcc.target/arc/taux-1.c b/gcc/testsuite/gcc.target/arc/taux-1.c index a2b7778..41b0fc4 100644 --- a/gcc/testsuite/gcc.target/arc/taux-1.c +++ b/gcc/testsuite/gcc.target/arc/taux-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 */ +/* { dg-options "-O1" } */ #define __aux() __attribute__((aux)) diff --git a/gcc/testsuite/gcc.target/arc/taux-2.c b/gcc/testsuite/gcc.target/arc/taux-2.c index 5644bcd..3e57ac8 100644 --- a/gcc/testsuite/gcc.target/arc/taux-2.c +++ b/gcc/testsuite/gcc.target/arc/taux-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 */ +/* { dg-options "-O1" } */ #define __aux(r) __attribute__((aux(r))) static volatile __aux(0x1000) int var; diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-17.c b/gcc/testsuite/gcc.target/arm/cmse/cmse-17.c index a2cce09..c5be810 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/cmse-17.c +++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mcmse"} */ +/* { dg-options "-mcmse" } */ #include <arm_cmse.h> diff --git a/gcc/testsuite/gcc.target/arm/fmaxmin-2.c b/gcc/testsuite/gcc.target/arm/fmaxmin-2.c new file mode 100644 index 0000000..a9990e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/fmaxmin-2.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_arch_v8a_hard_ok } */ +/* { dg-options "-O2 -fno-inline" } */ +/* { dg-add-options arm_arch_v8a_hard } */ + +#include "fmaxmin.x" + +/* { dg-final { scan-assembler-times "vmaxnm.f32\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vminnm.f32\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ + +/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/fmaxmin.c b/gcc/testsuite/gcc.target/arm/fmaxmin.c index 5a6fb80..7f30c12 100644 --- a/gcc/testsuite/gcc.target/arm/fmaxmin.c +++ b/gcc/testsuite/gcc.target/arm/fmaxmin.c @@ -1,13 +1,6 @@ /* { dg-do run } */ /* { dg-require-effective-target arm_v8_neon_hw } */ -/* { dg-options "-O2 -fno-inline -march=armv8-a -save-temps" } */ +/* { dg-options "-O2 -fno-inline" } */ /* { dg-add-options arm_v8_neon } */ #include "fmaxmin.x" - -/* { dg-final { scan-assembler-times "vmaxnm.f32\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ -/* { dg-final { scan-assembler-times "vminnm.f32\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ - -/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ -/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ - diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c index 447a8ec..63d57d4 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v4_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v4 } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c index 28fd2f7..d33beef 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4t" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v4t_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v4t } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c index 78878f7..8f43801 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv4t-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv4t" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v4t_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v4t } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c index 8191299..cc139f1 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5t" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v5t_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v5t } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c index b25d17d..1432018 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5t-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5t" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v5t_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v5t } */ @@ -14,4 +12,9 @@ #define NEED_ARM_ARCH_ISA_THUMB #define VALUE_ARM_ARCH_ISA_THUMB 1 +/* Not in the Thumb ISA, but does exist in Arm state. A call to the library + function should result in using that instruction in Arm state. */ +#define NEED_ARM_FEATURE_CLZ +#define VALUE_ARM_FEATURE_CLZ 1 + #include "ftest-support.h" diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c index e0c0d5c..2917ee6 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5te" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v5te_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v5te } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c index 27a64a2..768dbaa 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv5te-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv5te" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v5te_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v5te } */ @@ -14,4 +12,9 @@ #define NEED_ARM_ARCH_ISA_THUMB #define VALUE_ARM_ARCH_ISA_THUMB 1 +/* Not in the Thumb ISA, but does exist in Arm state. A call to the library + function should result in using that instruction in Arm state. */ +#define NEED_ARM_FEATURE_CLZ +#define VALUE_ARM_FEATURE_CLZ 1 + #include "ftest-support.h" diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c index 5d447c3..648acb1 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v6_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v6 } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c index 15a6d75..02360ee 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v6_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v6 } */ @@ -14,4 +12,9 @@ #define NEED_ARM_ARCH_ISA_THUMB #define VALUE_ARM_ARCH_ISA_THUMB 1 +/* Not in the Thumb ISA, but does exist in Arm state. A call to the library + function should result in using that instruction in Arm state. */ +#define NEED_ARM_FEATURE_CLZ +#define VALUE_ARM_FEATURE_CLZ 1 + #include "ftest-support.h" diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c index 0656e8f..ccc4e03 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v6k_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v6k } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c index b3b6ecf..2c5490f 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6k-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6k" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v6k_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v6k } */ @@ -14,4 +12,9 @@ #define NEED_ARM_ARCH_ISA_THUMB #define VALUE_ARM_ARCH_ISA_THUMB 1 +/* Not in the Thumb ISA, but does exist in Arm state. A call to the library + function should result in using that instruction in Arm state. */ +#define NEED_ARM_FEATURE_CLZ +#define VALUE_ARM_FEATURE_CLZ 1 + #include "ftest-support.h" diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c index 27f71be..46cf957 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6m-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v6m_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v6m } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c index 259d2b5..d24b08c 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6t2" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v6t2_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v6t2 } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c index e624ec5..27d2ccb 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6t2-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6t2" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v6t2_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v6t2 } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c index 6e3a966..7de37ee 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-arm.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6z" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ /* { dg-require-effective-target arm_arch_v6z_arm_ok } */ /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v6z } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c index 23a4fcd..d3e0393 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv6z-thumb.c @@ -1,6 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6z" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ /* { dg-require-effective-target arm_arch_v6z_thumb_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v6z } */ @@ -14,4 +12,9 @@ #define NEED_ARM_ARCH_ISA_THUMB #define VALUE_ARM_ARCH_ISA_THUMB 1 +/* Not in the Thumb ISA, but does exist in Arm state. A call to the library + function should result in using that instruction in Arm state. */ +#define NEED_ARM_FEATURE_CLZ +#define VALUE_ARM_FEATURE_CLZ 1 + #include "ftest-support.h" diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7a-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv7a-arm.c index 43f52fe..ec70bc5 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7a-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7a-arm.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7-a" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7a_ok } /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v7a } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7a-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv7a-thumb.c index 717f44c..d0ae786 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7a-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7a-thumb.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7-a" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7a_ok } /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v7a } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7em-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv7em-thumb.c index 688d766..353dbadc 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7em-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7em-thumb.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7e-m" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ +/* { dg-require-effective-target arm_arch_v7em_ok } */ /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v7em } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7r-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv7r-arm.c index 24b93ea..2809050 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7r-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7r-arm.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7-r" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7r_ok } /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v7r } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7r-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv7r-thumb.c index a7c3772..7ee7981 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7r-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7r-thumb.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7-r" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7r_ok } /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v7r } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7ve-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv7ve-arm.c index 72c4c1f..e6e6862 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7ve-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7ve-arm.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7ve" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7ve_ok } /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v7ve } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv7ve-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv7ve-thumb.c index 772405b..5a2ffd8 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv7ve-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv7ve-thumb.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7ve" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v7ve_ok } /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v7ve } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c b/gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c index feab5ee..40d2437 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv8a-arm.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv8-a" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v8a_ok } /* { dg-options "-marm" } */ /* { dg-add-options arm_arch_v8a } */ diff --git a/gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c b/gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c index 28d54bf..9f13069 100644 --- a/gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c +++ b/gcc/testsuite/gcc.target/arm/ftest-armv8a-thumb.c @@ -1,7 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv8-a" } } */ -/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */ -/* { dg-skip-if "-mpure-code supports M-profile only" { *-*-* } { "-mpure-code" } } */ +/* { dg-require-effective-target arm_arch_v8a_ok } /* { dg-options "-mthumb" } */ /* { dg-add-options arm_arch_v8a } */ diff --git a/gcc/testsuite/gcc.target/arm/lto/pr96939_0.c b/gcc/testsuite/gcc.target/arm/lto/pr96939_0.c index 21d2c1d..8dfbc06 100644 --- a/gcc/testsuite/gcc.target/arm/lto/pr96939_0.c +++ b/gcc/testsuite/gcc.target/arm/lto/pr96939_0.c @@ -1,8 +1,7 @@ /* PR target/96939 */ /* { dg-lto-do link } */ /* { dg-require-effective-target arm_arch_v8a_link } */ -/* { dg-options "-mcpu=unset -march=armv8-a+simd -mfpu=auto" } */ -/* { dg-lto-options { { -flto -O2 } } } */ +/* { dg-lto-options { { -flto -O2 -mcpu=unset -march=armv8-a+simd -mfpu=auto} } } */ extern unsigned crc (unsigned, const void *); typedef unsigned (*fnptr) (unsigned, const void *); diff --git a/gcc/testsuite/gcc.target/arm/mtp_1.c b/gcc/testsuite/gcc.target/arm/mtp_1.c index 678d27d..f78ceb8 100644 --- a/gcc/testsuite/gcc.target/arm/mtp_1.c +++ b/gcc/testsuite/gcc.target/arm/mtp_1.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target tls_native } */ +/* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mtp=cp15" } */ #include "mtp.c" diff --git a/gcc/testsuite/gcc.target/arm/mtp_2.c b/gcc/testsuite/gcc.target/arm/mtp_2.c index bcb308f..1368fe4 100644 --- a/gcc/testsuite/gcc.target/arm/mtp_2.c +++ b/gcc/testsuite/gcc.target/arm/mtp_2.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target tls_native } */ +/* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mtp=tpidrprw" } */ #include "mtp.c" diff --git a/gcc/testsuite/gcc.target/arm/mtp_3.c b/gcc/testsuite/gcc.target/arm/mtp_3.c index 7d5cea3..2ef2e95 100644 --- a/gcc/testsuite/gcc.target/arm/mtp_3.c +++ b/gcc/testsuite/gcc.target/arm/mtp_3.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target tls_native } */ +/* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mtp=tpidruro" } */ #include "mtp.c" diff --git a/gcc/testsuite/gcc.target/arm/mtp_4.c b/gcc/testsuite/gcc.target/arm/mtp_4.c index 068078d..121fc83 100644 --- a/gcc/testsuite/gcc.target/arm/mtp_4.c +++ b/gcc/testsuite/gcc.target/arm/mtp_4.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target tls_native } */ +/* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mtp=tpidrurw" } */ #include "mtp.c" diff --git a/gcc/testsuite/gcc.target/arm/pr42575.c b/gcc/testsuite/gcc.target/arm/pr42575.c index 1998e32..3906c77 100644 --- a/gcc/testsuite/gcc.target/arm/pr42575.c +++ b/gcc/testsuite/gcc.target/arm/pr42575.c @@ -1,4 +1,5 @@ /* { dg-options "-O2" } */ +/* { dg-skip-if "Thumb1 lacks UMULL" { arm_thumb1 } } */ /* Make sure RA does good job allocating registers and avoids unnecessary moves. */ /* { dg-final { scan-assembler-not "mov" } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr65647.c b/gcc/testsuite/gcc.target/arm/pr65647.c index e0c534b..663157c 100644 --- a/gcc/testsuite/gcc.target/arm/pr65647.c +++ b/gcc/testsuite/gcc.target/arm/pr65647.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_arch_v6m_ok } */ -/* { dg-options "-O3 -w -fpermissive" } */ +/* { dg-options "-O3 -w -fpermissive -std=gnu17" } */ /* { dg-add-options arm_arch_v6m } */ a, b, c, e, g = &e, h, i = 7, l = 1, m, n, o, q = &m, r, s = &r, u, w = 9, x, diff --git a/gcc/testsuite/gcc.target/arm/short-vfp-1.c b/gcc/testsuite/gcc.target/arm/short-vfp-1.c index 3ca1ffc..18d38a5 100644 --- a/gcc/testsuite/gcc.target/arm/short-vfp-1.c +++ b/gcc/testsuite/gcc.target/arm/short-vfp-1.c @@ -38,8 +38,8 @@ test_sihi (short x) return (int)x; } -/* {dg-final { scan-assembler-times {vcvt\.s32\.f32\ts[0-9]+,s[0-9]+} 2 }} */ -/* {dg-final { scan-assembler-times {vcvt\.f32\.s32\ts[0-9]+,s[0-9]+} 2 }} */ -/* {dg-final { scan-assembler-times {vmov\tr[0-9]+,s[0-9]+} 2 }} */ -/* {dg-final { scan-assembler-times {vmov\ts[0-9]+,r[0-9]+} 2 }} */ -/* {dg-final { scan-assembler-times {sxth\tr[0-9]+,r[0-9]+} 2 }} */ +/* { dg-final { scan-assembler-times {vcvt\.s32\.f32\ts[0-9]+,s[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vcvt\.f32\.s32\ts[0-9]+,s[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vmov\tr[0-9]+,s[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vmov\ts[0-9]+,r[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {sxth\tr[0-9]+,r[0-9]+} 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c b/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c index 3f074e3..1c79f3b 100644 --- a/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c +++ b/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c @@ -23,4 +23,4 @@ int main () } /* There should be no 'unaligned' comments. */ -/* { dg-final { scan-assembler-not "unaligned" } } */ +/* { dg-final { scan-assembler-not "@ unaligned" } } */ diff --git a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c index 4dc0edd..045f143 100644 --- a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c +++ b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c @@ -18,7 +18,7 @@ int b[N] = {0}; ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) @@ -43,7 +43,7 @@ void f1 () ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) @@ -68,7 +68,7 @@ void f2 () ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) @@ -94,7 +94,7 @@ void f3 () ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) @@ -119,7 +119,7 @@ void f4 () ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) @@ -144,7 +144,7 @@ void f5 () ** vmov r[0-9]+, s[0-9]+ @ int ** ( ** cmp r[0-9]+, #0 -** bne \.L[0-9]+ +** b(ne|eq) \.L[0-9]+ ** | ** cbn?z r[0-9]+, \.L.+ ** ) diff --git a/gcc/testsuite/gcc.target/arm/vect-fmaxmin-2.c b/gcc/testsuite/gcc.target/arm/vect-fmaxmin-2.c new file mode 100644 index 0000000..57b0a3a --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/vect-fmaxmin-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_arch_v8a_hard_ok } */ +/* { dg-options "-O2 -ftree-vectorize -funsafe-math-optimizations -fno-inline -save-temps" } */ +/* { dg-add-options arm_arch_v8a_hard } */ + +#include "fmaxmin.x" + +/* { dg-final { scan-assembler-times "vmaxnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vminnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */ + +/* NOTE: There are no double precision vector versions of vmaxnm/vminnm. */ +/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ + diff --git a/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c b/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c index ba45c4d..89dc14b 100644 --- a/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c +++ b/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c @@ -1,14 +1,6 @@ /* { dg-do run } */ /* { dg-require-effective-target arm_v8_neon_hw } */ -/* { dg-options "-O2 -ftree-vectorize -fno-inline -march=armv8-a -save-temps" } */ +/* { dg-options "-O2 -ftree-vectorize -fno-inline -funsafe-math-optimizations" } */ /* { dg-add-options arm_v8_neon } */ #include "fmaxmin.x" - -/* { dg-final { scan-assembler-times "vmaxnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */ -/* { dg-final { scan-assembler-times "vminnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */ - -/* NOTE: There are no double precision vector versions of vmaxnm/vminnm. */ -/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ -/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ - diff --git a/gcc/testsuite/gcc.target/avr/torture/pr119421-sreg.c b/gcc/testsuite/gcc.target/avr/torture/pr119421-sreg.c new file mode 100644 index 0000000..3752d4f --- /dev/null +++ b/gcc/testsuite/gcc.target/avr/torture/pr119421-sreg.c @@ -0,0 +1,301 @@ +/* { dg-do run } */ +/* { dg-additional-options "-std=gnu99 -Wno-pedantic" } */ + +#include <stdint.h> +#include <stdlib.h> +#include <stdbool.h> + +#define BITNO_I 7 +#define BITNO_T 6 +#define BITNO_H 5 +#define BITNO_S 4 +#define BITNO_V 3 +#define BITNO_N 2 +#define BITNO_Z 1 +#define BITNO_C 0 + +#define I (1u << BITNO_I) +#define T (1u << BITNO_T) +#define H (1u << BITNO_H) +#define S (1u << BITNO_S) +#define V (1u << BITNO_V) +#define N (1u << BITNO_N) +#define Z (1u << BITNO_Z) +#define C (1u << BITNO_C) + +#define bit(a, x) ((bool) ((a) & (1u << (x)))) + +typedef union +{ + uint8_t val; + struct + { + bool c:1; + bool z:1; + bool n:1; + bool v:1; + bool s:1; + bool h:1; + bool t:1; + bool i:1; + }; +} sreg_t; + + +typedef struct +{ + sreg_t sreg; + uint8_t mask; + uint16_t result; +} flags_t; + +flags_t flags_sub (uint8_t d, uint8_t r) +{ + uint8_t res = d - r; + bool R7 = bit (res, 7); + + bool Rd7 = bit (d, 7); + bool Rd3 = bit (d, 3); + + bool R3 = bit (res, 3); + bool Rr7 = bit (r, 7); + bool Rr3 = bit (r, 3); + + sreg_t s = { 0 }; + + s.v = (Rd7 & !Rr7 & !R7) | (!Rd7 & Rr7 & R7); + s.n = R7; + s.z = res == 0; + s.c = (!Rd7 & Rr7) | (Rr7 & R7) | (R7 & !Rd7); + s.h = (!Rd3 & Rr3) | (Rr3 & R3) | (R3 & !Rd3); + s.s = s.n ^ s.v; + + return (flags_t) { s, H | S | V | N | Z | C, res }; +} + +flags_t flags_sbc (uint8_t d, uint8_t r, sreg_t sreg) +{ + uint8_t res = d - r - sreg.c; + bool R7 = bit (res, 7); + + bool Rd7 = bit (d, 7); + bool Rd3 = bit (d, 3); + + bool R3 = bit (res, 3); + bool Rr7 = bit (r, 7); + bool Rr3 = bit (r, 3); + + sreg_t s = { 0 }; + + s.v = (Rd7 & !Rr7 & !R7) | (!Rd7 & Rr7 & R7); + s.n = R7; + s.z = (res == 0) & sreg.z; + s.c = (!Rd7 & Rr7) | (Rr7 & R7) | (R7 & !Rd7); + s.h = (!Rd3 & Rr3) | (Rr3 & R3) | (R3 & !Rd3); + s.s = s.n ^ s.v; + + return (flags_t) { s, H | S | V | N | Z | C, res }; +} + +flags_t flags_neg (uint8_t d) +{ + uint8_t res = -d; + bool R7 = bit (res, 7); + bool R6 = bit (res, 6); + bool R5 = bit (res, 5); + bool R4 = bit (res, 4); + bool R3 = bit (res, 3); + bool R2 = bit (res, 2); + bool R1 = bit (res, 1); + bool R0 = bit (res, 0); + + bool Rd3 = bit (d, 3); + + sreg_t s = { 0 }; + + s.v = R7 & !R6 & !R5 & !R4 & !R3 & !R2 & !R1 & !R0; + s.n = R7; + s.z = res == 0; + s.c = R7 | R6 | R5 | R4 | R3 | R2 | R1 | R0; + s.h = R3 | Rd3; + s.s = s.n ^ s.v; + + return (flags_t) { s, H | S | V | N | Z | C, res }; +} + +flags_t flags_ror (uint8_t d, sreg_t sreg) +{ + uint8_t res = (d + 0x100 * sreg.c) >> 1; + + sreg_t s = { 0 }; + + s.c = bit (d, 0); + s.z = res == 0; + s.n = bit (res, 7); + s.v = s.n ^ s.c; + s.s = s.n ^ s.v; + + return (flags_t) { s, S | V | N | Z | C, res }; +} + +flags_t flags_add (uint8_t d, uint8_t r) +{ + uint8_t res = d + r; + bool R7 = bit (res, 7); + + bool Rd7 = bit (d, 7); + bool Rd3 = bit (d, 3); + + bool R3 = bit (res, 3); + bool Rr7 = bit (r, 7); + bool Rr3 = bit (r, 3); + + sreg_t s = { 0 }; + + s.v = (Rd7 & Rr7 & !R7) | (!Rd7 & !Rr7 & R7); + s.n = R7; + s.z = res == 0; + s.c = (Rd7 & Rr7) | (Rr7 & !R7) | (!R7 & Rd7); + s.h = (Rd3 & Rr3) | (Rr3 & !R3) | (!R3 & Rd3); + s.s = s.n ^ s.v; + + return (flags_t) { s, H | S | V | N | Z | C, res }; +} + +static inline +sreg_t sreg_sub (uint8_t d, uint8_t r, uint8_t sreg, uint8_t result) +{ + __asm ("out __SREG__,%[sreg]" "\n\t" + "sub %[d],%[r]" "\n\t" + "in %[sreg],__SREG__" + : [sreg] "+r" (sreg), [d] "+r" (d) + : [r] "r" (r)); + if (d != result) + exit (__LINE__); + return (sreg_t) sreg; +} + +static inline +sreg_t sreg_sbc (uint8_t d, uint8_t r, uint8_t sreg, uint8_t result) +{ + __asm ("out __SREG__,%[sreg]" "\n\t" + "sbc %[d],%[r]" "\n\t" + "in %[sreg],__SREG__" + : [sreg] "+r" (sreg), [d] "+r" (d) + : [r] "r" (r)); + if (d != result) + exit (__LINE__); + return (sreg_t) sreg; +} + +static inline +sreg_t sreg_neg (uint8_t d, uint8_t sreg, uint8_t result) +{ + __asm ("out __SREG__,%[sreg]" "\n\t" + "neg %[d]" "\n\t" + "in %[sreg],__SREG__" + : [sreg] "+r" (sreg), [d] "+r" (d)); + if (d != result) + exit (__LINE__); + return (sreg_t) sreg; +} + +static inline +sreg_t sreg_ror (uint8_t d, uint8_t sreg, uint8_t result) +{ + __asm ("out __SREG__,%[sreg]" "\n\t" + "ror %[d]" "\n\t" + "in %[sreg],__SREG__" + : [sreg] "+r" (sreg), [d] "+r" (d)); + if (d != result) + exit (__LINE__); + return (sreg_t) sreg; +} + +static inline +sreg_t sreg_add (uint8_t d, uint8_t r, uint8_t sreg, uint8_t result) +{ + __asm ("out __SREG__,%[sreg]" "\n\t" + "add %[d],%[r]" "\n\t" + "in %[sreg],__SREG__" + : [sreg] "+r" (sreg), [d] "+r" (d) + : [r] "r" (r)); + if (d != result) + exit (__LINE__); + return (sreg_t) sreg; +} + +void test_sub (uint8_t d, uint8_t r, sreg_t sreg) +{ + sreg_t s0 = sreg_sub (d, r, sreg.val, d - r); + flags_t f = flags_sub (d, r); + if ((f.sreg.val & f.mask) != (s0.val & f.mask)) + exit (__LINE__); +} + +void test_sbc (uint8_t d, uint8_t r, sreg_t sreg) +{ + sreg_t s0 = sreg_sbc (d, r, sreg.val, d - r - sreg.c); + flags_t f = flags_sbc (d, r, sreg); + if ((f.sreg.val & f.mask) != (s0.val & f.mask)) + exit (__LINE__); +} + +void test_neg (uint8_t d, sreg_t sreg) +{ + sreg_t s0 = sreg_neg (d, sreg.val, -d); + flags_t f = flags_neg (d); + if ((f.sreg.val & f.mask) != (s0.val & f.mask)) + exit (__LINE__); +} + +void test_add (uint8_t d, uint8_t r, sreg_t sreg) +{ + sreg_t s0 = sreg_add (d, r, sreg.val, d + r); + flags_t f = flags_add (d, r); + if ((f.sreg.val & f.mask) != (s0.val & f.mask)) + exit (__LINE__); +} + +void test_ror (uint8_t d, sreg_t sreg) +{ + sreg_t s0 = sreg_ror (d, sreg.val, (d + 0x100 * sreg.c) >> 1); + flags_t f = flags_ror (d, sreg); + if ((f.sreg.val & f.mask) != (s0.val & f.mask)) + exit (__LINE__); +} + +void test_sreg (void) +{ + uint8_t d = 0; + + do + { + uint8_t r = 0; + test_neg (d, (sreg_t) { 0x00 }); + test_neg (d, (sreg_t) { 0xff }); + + test_ror (d, (sreg_t) { 0 }); + test_ror (d, (sreg_t) { C }); + + do + { + test_add (d, r, (sreg_t) { 0x00 }); + test_add (d, r, (sreg_t) { 0xff }); + + test_sub (d, r, (sreg_t) { 0x00 }); + test_sub (d, r, (sreg_t) { 0xff }); + + test_sbc (d, r, (sreg_t) { 0 }); + test_sbc (d, r, (sreg_t) { C }); + test_sbc (d, r, (sreg_t) { Z }); + test_sbc (d, r, (sreg_t) { C | Z }); + } while (++r); + } while (++d); +} + +int main (void) +{ + test_sreg(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/bfin/l2.c b/gcc/testsuite/gcc.target/bfin/l2.c index 56f64cc..2d39c46 100644 --- a/gcc/testsuite/gcc.target/bfin/l2.c +++ b/gcc/testsuite/gcc.target/bfin/l2.c @@ -1,5 +1,5 @@ /* { dg-do run { target bfin-*-linux-uclibc } } */ -/* { dg-bfin-processors bf544 bf547 bf548 bf549 bf561} */ +/* { dg-bfin-processors bf544 bf547 bf548 bf549 bf561 } */ #if defined(__ADSPBF544__) #define L2_START 0xFEB00000 diff --git a/gcc/testsuite/gcc.target/i386/addr-space-1.c b/gcc/testsuite/gcc.target/i386/addr-space-1.c index 1e13147..9a5ce9c 100644 --- a/gcc/testsuite/gcc.target/i386/addr-space-1.c +++ b/gcc/testsuite/gcc.target/i386/addr-space-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-options "-O2" } */ /* { dg-final { scan-assembler "movl\[ \t\]%gs:\\((%eax|%rax)\\), %eax" } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c index dda40af0..444a25e 100644 --- a/gcc/testsuite/gcc.target/i386/avx-1.c +++ b/gcc/testsuite/gcc.target/i386/avx-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -m3dnow -mavx -mavx2 -maes -mpclmul -mgfni -mprefetchi -mavx10.2-512 -mmovrs" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -m3dnow -mavx -mavx2 -maes -mpclmul -mgfni -mprefetchi -mavx10.2 -mmovrs" } */ /* { dg-add-options bind_pic_locally } */ #include <mm_malloc.h> @@ -842,166 +842,6 @@ /* sm3intrin.h */ #define __builtin_ia32_vsm3rnds2(A, B, C, D) __builtin_ia32_vsm3rnds2 (A, B, C, 1) -/* avx10_2roundingintrin.h */ -#define __builtin_ia32_addpd256_mask_round(A, B, C, D, E) __builtin_ia32_addpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addph256_mask_round(A, B, C, D, E) __builtin_ia32_addph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addps256_mask_round(A, B, C, D, E) __builtin_ia32_addps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_cmppd256_mask_round(A, B, C, D, E) __builtin_ia32_cmppd256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpph256_mask_round(A, B, C, D, E) __builtin_ia32_cmpph256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpps256_mask_round(A, B, C, D, E) __builtin_ia32_cmpps256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E) __builtin_ia32_divpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divph256_mask_round(A, B, C, D, E) __builtin_ia32_divph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divps256_mask_round(A, B, C, D, E) __builtin_ia32_divps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfcmaddcph256_round(A, B, C, D) __builtin_ia32_vfcmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfcmulcph256_round(A, B, C) __builtin_ia32_vfcmulcph256_round(A, B, 8) -#define __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_fixupimmpd256_mask_round(A, B, C, I, E, F) __builtin_ia32_fixupimmpd256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, I, E, F) __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_mask_round(A, B, C, I, E, F) __builtin_ia32_fixupimmps256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_maskz_round(A, B, C, I, E, F) __builtin_ia32_fixupimmps256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddcph256_round(A, B, C, D) __builtin_ia32_vfmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmulcph256_round(A, B, C) __builtin_ia32_vfmulcph256_round(A, B, 8) -#define __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_getexppd256_mask_round(A, B, C, D) __builtin_ia32_getexppd256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpph256_mask_round(A, B, C, D) __builtin_ia32_getexpph256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpps256_mask_round(A, B, C, D) __builtin_ia32_getexpps256_mask_round(A, B, C, 8) -#define __builtin_ia32_getmantpd256_mask_round(A, F, C, D, E) __builtin_ia32_getmantpd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantph256_mask_round(A, F, C, D, E) __builtin_ia32_getmantph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantps256_mask_round(A, F, C, D, E) __builtin_ia32_getmantps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_maxpd256_mask_round(A, B, C, D, E) __builtin_ia32_maxpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxph256_mask_round(A, B, C, D, E) __builtin_ia32_maxph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxps256_mask_round(A, B, C, D, E) __builtin_ia32_maxps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minpd256_mask_round(A, B, C, D, E) __builtin_ia32_minpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minph256_mask_round(A, B, C, D, E) __builtin_ia32_minph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minps256_mask_round(A, B, C, D, E) __builtin_ia32_minps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulpd256_mask_round(A, B, C, D, E) __builtin_ia32_mulpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulph256_mask_round(A, B, C, D, E) __builtin_ia32_mulph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulps256_mask_round(A, B, C, D, E) __builtin_ia32_mulps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_rangeps256_mask_round(A, B, I, D, E, F) __builtin_ia32_rangeps256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_rangepd256_mask_round(A, B, I, D, E, F) __builtin_ia32_rangepd256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_reducepd256_mask_round(A, B, C, D, E) __builtin_ia32_reducepd256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceph256_mask_round(A, B, C, D, E) __builtin_ia32_reduceph256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceps256_mask_round(A, B, C, D, E) __builtin_ia32_reduceps256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_rndscalepd256_mask_round(A, B, C, D, E) __builtin_ia32_rndscalepd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleph256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleps256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_scalefpd256_mask_round(A, B, C, D, E) __builtin_ia32_scalefpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefph256_mask_round(A, B, C, D, E) __builtin_ia32_scalefph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefps256_mask_round(A, B, C, D, E) __builtin_ia32_scalefps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_sqrtpd256_mask_round(A, B, C, D) __builtin_ia32_sqrtpd256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtph256_mask_round(A, B, C, D) __builtin_ia32_sqrtph256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) __builtin_ia32_sqrtps256_mask_round(A, B, C, 8) -#define __builtin_ia32_subpd256_mask_round(A, B, C, D, E) __builtin_ia32_subpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subph256_mask_round(A, B, C, D, E) __builtin_ia32_subph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subps256_mask_round(A, B, C, D, E) __builtin_ia32_subps256_mask_round(A, B, C, D, 8) - /* avx10_2-512mediaintrin.h */ #define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1) #define __builtin_ia32_mpsadbw512_mask(A, B, C, D, E) __builtin_ia32_mpsadbw512_mask (A, B, 1, D, E) @@ -1010,9 +850,6 @@ #define __builtin_ia32_mpsadbw128_mask(A, B, C, D, E) __builtin_ia32_mpsadbw128_mask (A, B, 1, D, E) #define __builtin_ia32_mpsadbw256_mask(A, B, C, D, E) __builtin_ia32_mpsadbw256_mask (A, B, 1, D, E) -/* avx10_2convertintrin.h */ -#define __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, 8) - /* avx10_2-512convertintrin.h */ #define __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, 8) @@ -1054,22 +891,6 @@ #define __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, 8) /* avx10_2satcvtintrin.h */ -#define __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, 8) #define __builtin_ia32_cvttsd2sis32_round(A, B) __builtin_ia32_cvttsd2sis32_round(A, 8) #define __builtin_ia32_cvttsd2usis32_round(A, B) __builtin_ia32_cvttsd2usis32_round(A, 8) #define __builtin_ia32_cvttss2sis32_round(A, B) __builtin_ia32_cvttss2sis32_round(A, 8) @@ -1094,11 +915,11 @@ #define __builtin_ia32_minmaxbf16128_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16128_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxbf16256_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxpd128_mask(A, B, C, D, E) __builtin_ia32_minmaxpd128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxpd256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxpd256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxpd256_mask(A, B, C, D, E) __builtin_ia32_minmaxpd256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxph128_mask(A, B, C, D, E) __builtin_ia32_minmaxph128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxph256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxph256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxph256_mask(A, B, C, D, E) __builtin_ia32_minmaxph256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxps128_mask(A, B, C, D, E) __builtin_ia32_minmaxps128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxps256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxps256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxps256_mask(A, B, C, D, E) __builtin_ia32_minmaxps256_mask (A, B, 4, D, E) #include <wmmintrin.h> #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx10-check.h b/gcc/testsuite/gcc.target/i386/avx10-check.h index e847dc3..7d4326d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10-check.h +++ b/gcc/testsuite/gcc.target/i386/avx10-check.h @@ -38,12 +38,9 @@ int main () { /* Run AVX10 test only if host has ISA support. */ - if (__builtin_cpu_supports ("avx10.1-256") + if (__builtin_cpu_supports ("avx10.1") #ifdef AVX10_2 - && __builtin_cpu_supports ("avx10.2-256") -#endif -#ifdef AVX10_2_512 - && __builtin_cpu_supports ("avx10.2-512") + && __builtin_cpu_supports ("avx10.2") #endif && avx10_os_support ()) { diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-1.c index 33ce99e..bd3249e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-1.c @@ -1,5 +1,6 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O2 -march=x86-64 -mavx10.1-256" } */ +/* { dg-options "-O2 -march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-10.c b/gcc/testsuite/gcc.target/i386/avx10_1-10.c index 0db5240..dba2a4e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-10.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-10.c @@ -1,6 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512 -mavx512f -mno-evex512" } */ +/* { dg-options "-march=x86-64 -mavx10.1 -mavx512f -mno-evex512" } */ /* { dg-warning "'-mno-evex512' or '-mno-avx512XXX' cannot disable AVX10 instructions when AVX10.1-512 is available" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-11.c b/gcc/testsuite/gcc.target/i386/avx10_1-11.c index c0ad4fc..608817a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-11.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-11.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512 -mno-avx512f" } */ +/* { dg-options "-march=x86-64 -mavx10.1 -mno-avx512f" } */ /* { dg-warning "'-mno-evex512' or '-mno-avx512XXX' cannot disable AVX10 instructions when AVX10.1-512 is available" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-12.c b/gcc/testsuite/gcc.target/i386/avx10_1-12.c index ae1c77b..1650f26 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-12.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-12.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mno-avx10.1-512 -mavx512f" } */ /* { dg-warning "'-mno-avx10.1-256, -mno-avx10.1-512' cannot disable AVX512 instructions when '-mavx512XXX'" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-13.c b/gcc/testsuite/gcc.target/i386/avx10_1-13.c index e94ac8e..a864e96 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-13.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-13.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mavx10.1-256" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-15.c b/gcc/testsuite/gcc.target/i386/avx10_1-15.c index d1731f0..b227cf3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-15.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-15.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512" } */ +/* { dg-options "-march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-16.c b/gcc/testsuite/gcc.target/i386/avx10_1-16.c index f5f3ff8..b3fdb3f 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-16.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-16.c @@ -1,10 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mavx512f -mno-evex512" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); -__attribute__ ((target ("avx10.1-512"))) __m512d +__attribute__ ((target ("avx10.1"))) __m512d foo () { /* { dg-warning "'-mno-evex512' or '-mno-avx512XXX' cannot disable AVX10 instructions when AVX10.1-512 is available" } */ __m512d a, b; diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-18.c b/gcc/testsuite/gcc.target/i386/avx10_1-18.c index c50fd2b..c1edce8 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-18.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-18.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512" } */ +/* { dg-options "-march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-19.c b/gcc/testsuite/gcc.target/i386/avx10_1-19.c index 7445ecf..25b5887 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-19.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-19.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mno-avx10.1-512" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-2.c b/gcc/testsuite/gcc.target/i386/avx10_1-2.c index 0b3991d..19962bc 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-2.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512" } */ +/* { dg-options "-march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-20.c b/gcc/testsuite/gcc.target/i386/avx10_1-20.c index d63c6b4..a223065 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-20.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-20.c @@ -4,7 +4,7 @@ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); -__attribute__ ((target ("avx10.1-512"))) __m512d +__attribute__ ((target ("avx10.1"))) __m512d foo () { /* { dg-warning "'-mno-evex512' or '-mno-avx512XXX' cannot disable AVX10 instructions when AVX10.1-512 is available" } */ __m512d a, b; diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-21.c b/gcc/testsuite/gcc.target/i386/avx10_1-21.c index 0a1fcc9..2ae437e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-21.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-21.c @@ -1,6 +1,8 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mavx10.1-256 -mevex512 -Wno-psabi" } */ /* { dg-warning "Using '-mevex512' without any AVX512 features enabled together with AVX10.1 only will not enable any AVX512 or AVX10.1-512 features, using 256 as max vector size" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler-not "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-22.c b/gcc/testsuite/gcc.target/i386/avx10_1-22.c index cb649dc..df7bffb 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-22.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-22.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mavx10.1-256 -Wno-psabi" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler-not "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-23.c b/gcc/testsuite/gcc.target/i386/avx10_1-23.c index f31c636..1f84584 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-23.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-23.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mevex512 -Wno-psabi" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler-not "%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-24.c b/gcc/testsuite/gcc.target/i386/avx10_1-24.c deleted file mode 100644 index 1bba0fb..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_1-24.c +++ /dev/null @@ -1,7 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64 -mavx10.1-256" } */ -/* { dg-final { scan-assembler-not "%zmm" } } */ - -typedef float __m512 __attribute__ ((__vector_size__ (64), __may_alias__)); - -void __attribute__((target("avx10.1-256"))) callee256(__m512 *a, __m512 *b) { *a = *b; } diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-25.c b/gcc/testsuite/gcc.target/i386/avx10_1-25.c deleted file mode 100644 index fb378b9..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_1-25.c +++ /dev/null @@ -1,10 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v2 -mavx" } */ -/* { dg-require-ifunc "" } */ - -#include <immintrin.h> -__attribute__((target_clones ("default","avx10.1-256"))) -__m256d foo(__m256d a, __m256d b) -{ - return a + b; -} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-26.c b/gcc/testsuite/gcc.target/i386/avx10_1-26.c index e54e2f5..d887404 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-26.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-26.c @@ -3,7 +3,7 @@ /* { dg-require-ifunc "" } */ #include <immintrin.h> -__attribute__((target_clones ("default","avx10.1-512"))) +__attribute__((target_clones ("default","avx10.1"))) __m512d foo(__m512d a, __m512d b) { return a + b; diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-3.c b/gcc/testsuite/gcc.target/i386/avx10_1-3.c index a176f27..992364a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-3.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-3.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64 -mavx10.1-256" } */ +/* { dg-options "-O2 -march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-4.c b/gcc/testsuite/gcc.target/i386/avx10_1-4.c index 68cbf19..b3d2603 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-4.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-4.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64 -mavx10.1-512" } */ +/* { dg-options "-O2 -march=x86-64 -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-5.c b/gcc/testsuite/gcc.target/i386/avx10_1-5.c deleted file mode 100644 index 3079cf1..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_1-5.c +++ /dev/null @@ -1,5 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O0 -march=x86-64 -mavx10.1-256 -Wno-psabi" } */ -/* { dg-final { scan-assembler-not ".%zmm" } } */ - -#include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-6.c b/gcc/testsuite/gcc.target/i386/avx10_1-6.c deleted file mode 100644 index 60dbd05..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_1-6.c +++ /dev/null @@ -1,13 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64 -mavx10.1-256" } */ - -#include <immintrin.h> - -long long -foo (long long c) -{ - register long long a __asm ("k7") = c; - long long b = foo (a); - asm volatile ("" : "+k" (b)); - return b; -} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-7.c b/gcc/testsuite/gcc.target/i386/avx10_1-7.c index afce290..fb74ffb 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-7.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-7.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64 -mavx10.1-512 -mavx512f" } */ +/* { dg-options "-march=x86-64 -mavx10.1 -mavx512f" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-8.c b/gcc/testsuite/gcc.target/i386/avx10_1-8.c index ec930f7..dbb7d64 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-8.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-8.c @@ -1,4 +1,6 @@ /* { dg-do compile { target { ! ia32 } } } */ /* { dg-options "-march=x86-64 -mavx10.1-256 -mavx512f -mno-evex512" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ #include "avx10_1-1.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-9.c b/gcc/testsuite/gcc.target/i386/avx10_1-9.c index 8e83827..b951738 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_1-9.c +++ b/gcc/testsuite/gcc.target/i386/avx10_1-9.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-march=x86-64 -mavx10.1-256 -mavx512f" } */ /* { dg-warning "Vector size conflicts between AVX10.1 and AVX512, using 512 as max vector size" "" { target *-*-* } 0 } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler "%zmm" } } */ #include "avx10_1-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c index 60121d2..f28be2a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ @@ -71,7 +71,7 @@ volatile __m512bh res, x1, x2; volatile __mmask32 m32; void extern -avx10_2_512_test (void) +avx10_2_test (void) { res = _mm512_add_pbh (x1, x2); res = _mm512_mask_add_pbh (res, m32, x1, x2); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-cmp-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-cmp-1.c index a5e1d43..ff72698 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-cmp-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-cmp-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2 -mprefer-vector-width=512" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2 -mprefer-vector-width=512" } */ /* { dg-final { scan-assembler-times "vcmpbf16" 5 } } */ typedef __bf16 v32bf __attribute__ ((__vector_size__ (64))); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-fma-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-fma-1.c index 77198d2..cc9497c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-fma-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-fma-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vfmadd132bf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vfmsub132bf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vfnmadd132bf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c index e224a36..9ca2b95 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vdivbf16\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-smaxmin-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-smaxmin-1.c index 0282de5..ee2ac85 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-smaxmin-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-smaxmin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -mprefer-vector-width=512 -Ofast" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -mprefer-vector-width=512 -Ofast" } */ /* { dg-final { scan-assembler-times "vmaxbf16" 1 } } */ /* { dg-final { scan-assembler-times "vminbf16" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-convert-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-convert-1.c index c1e44ef..ff103d0 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-convert-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-convert-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ @@ -64,7 +64,7 @@ __m512bh *c; __m512h *d; void extern -avx10_2_512_test (void) +avx10_2_test (void) { y = _mm512_cvtx2ps_ph (a1, b1); y = _mm512_mask_cvtx2ps_ph (y, m32, a1, b1); @@ -76,7 +76,7 @@ avx10_2_512_test (void) } void extern -avx10_2_512_vcvtbiasph2bf8_test (void) +avx10_2_vcvtbiasph2bf8_test (void) { x256i = _mm512_cvtbiasph_bf8 (x512i, x512h); x256i = _mm512_mask_cvtbiasph_bf8 (x256i, m32, x512i, x512h); @@ -84,15 +84,15 @@ avx10_2_512_vcvtbiasph2bf8_test (void) } void extern -avx10_2_512_vcvtbiasph2bf8s_test (void) +avx10_2_vcvtbiasph2bf8s_test (void) { - x256i = _mm512_cvtbiassph_bf8 (x512i, x512h); - x256i = _mm512_mask_cvtbiassph_bf8 (x256i, m32, x512i, x512h); - x256i = _mm512_maskz_cvtbiassph_bf8 (m32, x512i, x512h); + x256i = _mm512_cvts_biasph_bf8 (x512i, x512h); + x256i = _mm512_mask_cvts_biasph_bf8 (x256i, m32, x512i, x512h); + x256i = _mm512_maskz_cvts_biasph_bf8 (m32, x512i, x512h); } void extern -avx10_2_512_vcvtbiasph2hf8_test (void) +avx10_2_vcvtbiasph2hf8_test (void) { x256i = _mm512_cvtbiasph_hf8 (x512i, x512h); x256i = _mm512_mask_cvtbiasph_hf8 (x256i, m32, x512i, x512h); @@ -100,15 +100,15 @@ avx10_2_512_vcvtbiasph2hf8_test (void) } void extern -avx10_2_512_vcvtbiasph2hf8s_test (void) +avx10_2_vcvtbiasph2hf8s_test (void) { - x256i = _mm512_cvtbiassph_hf8 (x512i, x512h); - x256i = _mm512_mask_cvtbiassph_hf8 (x256i, m32, x512i, x512h); - x256i = _mm512_maskz_cvtbiassph_hf8 (m32, x512i, x512h); + x256i = _mm512_cvts_biasph_hf8 (x512i, x512h); + x256i = _mm512_mask_cvts_biasph_hf8 (x256i, m32, x512i, x512h); + x256i = _mm512_maskz_cvts_biasph_hf8 (m32, x512i, x512h); } void extern -avx10_2_512_vcvt2ph2bf8_test (void) +avx10_2_vcvt2ph2bf8_test (void) { x512i = _mm512_cvt2ph_bf8 (x512h, x512h); x512i = _mm512_mask_cvt2ph_bf8 (x512i, m64, x512h, x512h); @@ -116,15 +116,15 @@ avx10_2_512_vcvt2ph2bf8_test (void) } void extern -avx10_2_512_vcvt2ph2bf8s_test (void) +avx10_2_vcvt2ph2bf8s_test (void) { - x512i = _mm512_cvts2ph_bf8 (x512h, x512h); - x512i = _mm512_mask_cvts2ph_bf8 (x512i, m64, x512h, x512h); - x512i = _mm512_maskz_cvts2ph_bf8 (m64, x512h, x512h); + x512i = _mm512_cvts_2ph_bf8 (x512h, x512h); + x512i = _mm512_mask_cvts_2ph_bf8 (x512i, m64, x512h, x512h); + x512i = _mm512_maskz_cvts_2ph_bf8 (m64, x512h, x512h); } void extern -avx10_2_512_vcvt2ph2hf8_test (void) +avx10_2_vcvt2ph2hf8_test (void) { x512i = _mm512_cvt2ph_hf8 (x512h, x512h); x512i = _mm512_mask_cvt2ph_hf8 (x512i, m64, x512h, x512h); @@ -132,15 +132,15 @@ avx10_2_512_vcvt2ph2hf8_test (void) } void extern -avx10_2_512_vcvt2ph2hf8s_test (void) +avx10_2_vcvt2ph2hf8s_test (void) { - x512i = _mm512_cvts2ph_hf8 (x512h, x512h); - x512i = _mm512_mask_cvts2ph_hf8 (x512i, m64, x512h, x512h); - x512i = _mm512_maskz_cvts2ph_hf8 (m64, x512h, x512h); + x512i = _mm512_cvts_2ph_hf8 (x512h, x512h); + x512i = _mm512_mask_cvts_2ph_hf8 (x512i, m64, x512h, x512h); + x512i = _mm512_maskz_cvts_2ph_hf8 (m64, x512h, x512h); } void extern -avx10_2_512_vcvthf82ph_test (void) +avx10_2_vcvthf82ph_test (void) { x512h = _mm512_cvthf8_ph (x256i); x512h = _mm512_mask_cvthf8_ph (x512h, m32, x256i); @@ -148,7 +148,7 @@ avx10_2_512_vcvthf82ph_test (void) } void extern -avx10_2_512_vcvtph2bf8_test (void) +avx10_2_vcvtph2bf8_test (void) { x256i = _mm512_cvtph_bf8 (x512h); x256i = _mm512_mask_cvtph_bf8 (x256i, m32, x512h); @@ -156,15 +156,15 @@ avx10_2_512_vcvtph2bf8_test (void) } void extern -avx10_2_512_vcvtph2bf8s_test (void) +avx10_2_vcvtph2bf8s_test (void) { - x256i = _mm512_cvtsph_bf8 (x512h); - x256i = _mm512_mask_cvtsph_bf8 (x256i, m32, x512h); - x256i = _mm512_maskz_cvtsph_bf8 (m32, x512h); + x256i = _mm512_cvts_ph_bf8 (x512h); + x256i = _mm512_mask_cvts_ph_bf8 (x256i, m32, x512h); + x256i = _mm512_maskz_cvts_ph_bf8 (m32, x512h); } void extern -avx10_2_512_vcvtph2hf8_test (void) +avx10_2_vcvtph2hf8_test (void) { x256i = _mm512_cvtph_hf8 (x512h); x256i = _mm512_mask_cvtph_hf8 (x256i, m32, x512h); @@ -172,15 +172,15 @@ avx10_2_512_vcvtph2hf8_test (void) } void extern -avx10_2_512_vcvtph2hf8s_test (void) +avx10_2_vcvtph2hf8s_test (void) { - x256i = _mm512_cvtsph_hf8 (x512h); - x256i = _mm512_mask_cvtsph_hf8 (x256i, m32, x512h); - x256i = _mm512_maskz_cvtsph_hf8 (m32, x512h); + x256i = _mm512_cvts_ph_hf8 (x512h); + x256i = _mm512_mask_cvts_ph_hf8 (x256i, m32, x512h); + x256i = _mm512_maskz_cvts_ph_hf8 (m32, x512h); } void extern -avx10_2_512_cvtbf8_fp16_test (void) +avx10_2_cvtbf8_fp16_test (void) { y = _mm512_cvtbf8_ph (z1); y = _mm512_mask_cvtbf8_ph (z, m32, z1); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-media-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-media-1.c index d24c06d..a0675f6 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-media-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-media-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -52,7 +52,7 @@ volatile __m512i x,y,z,z1; volatile __mmask16 m16; volatile __mmask32 m32; -void avx10_2_512_test (void) +void avx10_2_test (void) { x = _mm512_dpbssd_epi32 (x, y, z); x = _mm512_mask_dpbssd_epi32 (x, m16, y, z); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-minmax-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-minmax-1.c index adb57eb..fb9a92a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-minmax-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-minmax-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -25,7 +25,7 @@ volatile __mmask16 m16; volatile __mmask8 m8; void extern -avx10_2_512_test (void) +avx10_2_test (void) { x1 = _mm512_minmax_pbh (x1, x1, 100); x1 = _mm512_mask_minmax_pbh (x1, m32, x1, x1, 100); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-movrs-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-movrs-1.c index 682b812..2aaa1a9 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-movrs-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-movrs-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-512 -mmovrs -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -mmovrs -O2" } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %zmm\[0-9\]+" 3 } } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %zmm\[0-9\]+{%k\[1-7\]}" 2 } } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %zmm\[0-9\]+{%k\[1-7\]}{z}" 1 } } */ @@ -23,7 +23,7 @@ volatile __mmask8 m3; volatile __mmask32 m4; void extern -avx512movrs_test (void) +avx10_movrs_test (void) { x = _mm512_loadrs_epi8(px); x = _mm512_mask_loadrs_epi8(x, m1, px); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c index dd24216..74a515b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-satcvt-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vaddbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vaddbf16-2.c index fe13c64..4aca46d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vaddbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vaddbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcmpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcmpbf16-2.c index a6f8f54..885cec7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcmpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcmpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8-2.c index 8662d26..5bd2b7f 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c index 4933a8b..33d9c0c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -64,16 +64,16 @@ TEST (void) CALC(res_ref, src1.a, src2.a); - res1.x = INTRINSIC (_cvts2ph_bf8) (src1.x, src2.x); + res1.x = INTRINSIC (_cvts_2ph_bf8) (src1.x, src2.x); if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvts2ph_bf8) (res2.x, mask, src1.x, src2.x); + res2.x = INTRINSIC (_mask_cvts_2ph_bf8) (res2.x, mask, src1.x, src2.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvts2ph_bf8) (mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_cvts_2ph_bf8) (mask, src1.x, src2.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8-2.c index 633d15a..b9fdbd4 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c index e53e924..b9fdfac 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -64,16 +64,16 @@ TEST (void) CALC(res_ref, src1.a, src2.a); - res1.x = INTRINSIC (_cvts2ph_hf8) (src1.x, src2.x); + res1.x = INTRINSIC (_cvts_2ph_hf8) (src1.x, src2.x); if (UNION_CHECK (AVX512F_LEN, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvts2ph_hf8) (res2.x, mask, src1.x, src2.x); + res2.x = INTRINSIC (_mask_cvts_2ph_hf8) (res2.x, mask, src1.x, src2.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvts2ph_hf8) (mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_cvts_2ph_hf8) (mask, src1.x, src2.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c index e3cc050..f9f799a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c index 7f7e20c..4976892 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c index 3b4c2ec..03bd36a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c index c5edce61..4d90dcf8 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c index c454cb5..93de7ea 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -61,16 +61,16 @@ TEST (void) CALC (res_ref, src1.a, src2.a); - res1.x = INTRINSIC (_cvtbiassph_bf8) (src1.x, src2.x); + res1.x = INTRINSIC (_cvts_biasph_bf8) (src1.x, src2.x); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvtbiassph_bf8) (res2.x, mask, src1.x, src2.x); + res2.x = INTRINSIC (_mask_cvts_biasph_bf8) (res2.x, mask, src1.x, src2.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvtbiassph_bf8) (mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_cvts_biasph_bf8) (mask, src1.x, src2.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c index 84f19ae..14a2251 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c index 2630c69..0333f08 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -60,16 +60,16 @@ TEST (void) CALC (res_ref, src1.a, src2.a); - res1.x = INTRINSIC (_cvtbiassph_hf8) (src1.x, src2.x); + res1.x = INTRINSIC (_cvts_biasph_hf8) (src1.x, src2.x); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvtbiassph_hf8) (res2.x, mask, src1.x, src2.x); + res2.x = INTRINSIC (_mask_cvts_biasph_hf8) (res2.x, mask, src1.x, src2.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvtbiassph_hf8) (mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_cvts_biasph_hf8) (mask, src1.x, src2.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvthf82ph-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvthf82ph-2.c index 48083ae..9301ee3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvthf82ph-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvthf82ph-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8-2.c index 189c2d6..f42f856 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c index 090c4c1..c22e1aa 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -60,16 +60,16 @@ TEST (void) CALC(res_ref, src.a); - res1.x = INTRINSIC (_cvtsph_bf8) (src.x); + res1.x = INTRINSIC (_cvts_ph_bf8) (src.x); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvtsph_bf8) (res2.x, mask, src.x); + res2.x = INTRINSIC (_mask_cvts_ph_bf8) (res2.x, mask, src.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvtsph_bf8) (mask, src.x); + res3.x = INTRINSIC (_maskz_cvts_ph_bf8) (mask, src.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8-2.c index 8cdb513..e328e9d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c index ded773e..e6872e8 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -60,16 +60,16 @@ TEST (void) CALC(res_ref, src.a); - res1.x = INTRINSIC (_cvtsph_hf8) (src.x); + res1.x = INTRINSIC (_cvts_ph_hf8) (src.x); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res1, res_ref)) abort (); - res2.x = INTRINSIC (_mask_cvtsph_hf8) (res2.x, mask, src.x); + res2.x = INTRINSIC (_mask_cvts_ph_hf8) (res2.x, mask, src.x); MASK_MERGE (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res2, res_ref)) abort (); - res3.x = INTRINSIC (_maskz_cvtsph_hf8) (mask, src.x); + res3.x = INTRINSIC (_maskz_cvts_ph_hf8) (mask, src.x); MASK_ZERO (i_b) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN_HALF, i_b) (res3, res_ref)) abort (); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c index 523b3f0..2bddbb1 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -68,7 +68,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c index a8f6e57..df73fcd 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -68,7 +68,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c index 369cb64..2ab24b9 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -69,7 +69,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c index f79264e..2b02ee3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c index eea2e70..38154c8 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c index 9f52302..9ca0912 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c index 7293772..f56e568 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN_HALF, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c index 23eb111..4400c7c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -66,7 +66,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c index 7058423..f687d0e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN_HALF, i_ud) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c index 9c826f4..7b44cdd 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -66,7 +66,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_uq) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c index 7f94020a..13eb9f0 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -68,7 +68,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c index 8a05dfd..1db5a89 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -9,6 +9,7 @@ #endif #include "avx10-helper.h" #include <limits.h> +#include <string.h> #define SIZE (AVX512F_LEN / 16) #include "avx512f-mask-type.h" @@ -37,7 +38,7 @@ TEST (void) UNION_TYPE (AVX512F_LEN, h) s; UNION_TYPE (AVX512F_LEN, i_w) res1, res2, res3; MASK_TYPE mask = MASK_VALUE; - short res_ref[SIZE] = { 0 }; + short res_ref[SIZE] = { 0 }, res_ref2[SIZE] = { 0 }; int i, sign = 1; for (i = 0; i < SIZE; i++) @@ -54,11 +55,7 @@ TEST (void) res3.x = INTRINSIC (_maskz_ipcvtts_ph_epu8) (mask, s.x); CALC (s.a, res_ref); - -#if AVX512F_LEN != 128 - res1.x = INTRINSIC (_ipcvtts_roundph_epu8) (s.x, 8); - res2.x = INTRINSIC (_mask_ipcvtts_roundph_epu8) (res2.x, mask, s.x, 8); - res3.x = INTRINSIC (_maskz_ipcvtts_roundph_epu8) (mask, s.x, 8); + memcpy(res_ref2, res_ref, sizeof(res_ref)); if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref)) abort (); @@ -70,5 +67,24 @@ TEST (void) MASK_ZERO (i_w) (res_ref, mask, SIZE); if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref)) abort (); + +#if AVX512F_LEN == 512 + for (i = 0; i < SIZE; i++) + res2.a[i] = DEFAULT_VALUE; + + res1.x = INTRINSIC (_ipcvtts_roundph_epu8) (s.x, 8); + res2.x = INTRINSIC (_mask_ipcvtts_roundph_epu8) (res2.x, mask, s.x, 8); + res3.x = INTRINSIC (_maskz_ipcvtts_roundph_epu8) (mask, s.x, 8); + + if (UNION_CHECK (AVX512F_LEN, i_w) (res1, res_ref2)) + abort (); + + MASK_MERGE (i_w) (res_ref2, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res2, res_ref2)) + abort (); + + MASK_ZERO (i_w) (res_ref2, mask, SIZE); + if (UNION_CHECK (AVX512F_LEN, i_w) (res3, res_ref2)) + abort (); #endif } diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c index 9d3bc2c..0e9ee27 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -66,7 +66,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c index 9654385..c2dc7fe 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -69,7 +69,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c index 976677f..5f5ee8a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c index 0d5797e..473fffa 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_q) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c index f578cd0..5d7ee3c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -66,7 +66,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_ud) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c index 93e71ac..99ab0ce 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 @@ -67,7 +67,7 @@ TEST (void) if (UNION_CHECK (AVX512F_LEN, i_uq) (res3, res_ref)) abort (); -#if AVX512F_LEN != 128 +#if AVX512F_LEN == 512 for (i = 0; i < SIZE; i++) res2.a[i] = DEFAULT_VALUE; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vdivbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vdivbf16-2.c index 54bc275..ff68470 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vdivbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vdivbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vdpphps-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vdpphps-2.c index 38b984c..8f815ce 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vdpphps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vdpphps-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmaddXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmaddXXXbf16-2.c index 2e5c424..6a50ede 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmaddXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmaddXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmsubXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmsubXXXbf16-2.c index 983ca2e..5869c5c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmsubXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfmsubXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmaddXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmaddXXXbf16-2.c index 0dd1996..2173cd3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmaddXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmaddXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmsubXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmsubXXXbf16-2.c index 95ed19c..dc323fa 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmsubXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfnmsubXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c index 55b3a83..1e8609d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vfpclassbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexpbf16-2.c index 577e20a..a920db5 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetexpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetmantbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetmantbf16-2.c index 0c58873..82e3663 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetmantbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vgetmantbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmaxbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmaxbf16-2.c index 2485e80..75236c6 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmaxbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmaxbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminbf16-2.c index 7591edf..3ca03cf 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxbf16-2.c index 4356d93..b1a7bed 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxpd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxpd-2.c index c0839c1..7bb531f 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxpd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxpd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxph-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxph-2.c index 8759fd1..7647f8e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxph-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxph-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxps-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxps-2.c index 42864a4..1eaa0b2 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vminmaxps-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmpsadbw-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmpsadbw-2.c index 61219d2..a0a90f7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmpsadbw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmpsadbw-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmulbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmulbf16-2.c index 6e03d71..fe65d95 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vmulbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vmulbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssd-2.c index 04d142f..493cd2b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssds-2.c index 75e7a8b..479b893 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbssds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsud-2.c index 6278b44..d0c090d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsuds-2.c index a7e0fc9..8d89c33 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbsuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuud-2.c index 3757303..37a4a54 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuuds-2.c index 56ba154..8b18d6f 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpbuuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsud-2.c index 1f72021..824f814 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsuds-2.c index e4977aa..7e51349 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwsuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusd-2.c index 121b846..4727d91 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusds-2.c index d89e4a2..9f965df 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwusds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuud-2.c index dc4fcb2..bf0a564 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuuds-2.c index bd42480..c075e0e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vpdpwuuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrcpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrcpbf16-2.c index 9bb620eb..28c7ada 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrcpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrcpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vreducebf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vreducebf16-2.c index 1bfca41..d506389 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vreducebf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vreducebf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrndscalebf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrndscalebf16-2.c index 6f671d8..1b29fc6 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrndscalebf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrndscalebf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrsqrtbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrsqrtbf16-2.c index 3858c1c..444b332 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vrsqrtbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vrsqrtbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vscalefbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vscalefbf16-2.c index f3f588d..b1c5f4b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vscalefbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vscalefbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vsqrtbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vsqrtbf16-2.c index 09d87ec..12f87b3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vsqrtbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vsqrtbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-512-vsubbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-512-vsubbf16-2.c index 7e8df5f..16a5ace 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-512-vsubbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-512-vsubbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #ifndef AVX10_2 #define AVX10_2 diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c index 607730f..9b33b91 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-cmp-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-cmp-1.c index 837491c..79bddb5 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-cmp-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-cmp-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vcmpbf16" 10 } } */ typedef __bf16 v16bf __attribute__ ((__vector_size__ (32))); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-fma-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-fma-1.c index f39c254..05f86f7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-fma-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-fma-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vfmadd132bf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vfmsub132bf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vfnmadd132bf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-operations-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-operations-1.c index 5945b0d..530167b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-operations-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-operations-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vdivbf16\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-smaxmin-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-smaxmin-1.c index 6acab8f..703ea64 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-smaxmin-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-smaxmin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -Ofast" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -Ofast" } */ /* { dg-final { scan-assembler-times "vmaxbf16" 2 } } */ /* { dg-final { scan-assembler-times "vminbf16" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-builtin-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-builtin-1.c index 1837674..2c793cf 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-builtin-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-builtin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2-256 -mno-avxvnniint8" } */ +/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2 -mno-avxvnniint8" } */ typedef int v8si __attribute__ ((vector_size (32))); v8si foo (v8si a, v8si b, v8si c) diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-builtin-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-builtin-2.c index 33f7bf3..6eeb20e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-builtin-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-builtin-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2-256 -mno-avxvnniint16" } */ +/* { dg-options "-O0 -march=x86-64-v3 -mavx10.2 -mno-avxvnniint16" } */ typedef int v8si __attribute__ ((vector_size (32))); v8si foo (v8si a, v8si b, v8si c) diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-1.c index a676756..3862f1e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2 -fno-trapping-math" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2 -fno-trapping-math" } */ /* { dg-final { scan-assembler-times "vcomisbf16\[ \\t\]+\[^{}\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 6 } } */ /* { dg-final { scan-assembler-times {j[a-z]+\s} 6 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-2.c index 07d5957..a70904c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2 -fno-trapping-math" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2 -fno-trapping-math" } */ +/* { dg-require-effective-target avx10_2 } */ #include <stdlib.h> #include <stdint.h> @@ -92,7 +92,7 @@ test_ge (__bf16 a, __bf16 b) int main (void) { - if (!__builtin_cpu_supports ("avx10.2-256")) + if (!__builtin_cpu_supports ("avx10.2")) return 0; float test_values[] = { diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-3.c b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-3.c index 26c2a80..28b2ad3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-3.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-3.c @@ -5,7 +5,7 @@ /* { dg-final { scan-assembler-times "set\[aeglnb\]+" 6 } } */ #define AVX10_ATTR \ -__attribute__((noinline, __target__("avx10.2-256"), optimize("no-trapping-math"))) +__attribute__((noinline, __target__("avx10.2"), optimize("no-trapping-math"))) AVX10_ATTR int foo1_avx10 (__bf16 a, __bf16 b, __bf16 c, __bf16 d) diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-4.c b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-4.c index c646e16..18848dd 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-comibf-4.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-comibf-4.c @@ -1,4 +1,4 @@ -/* { dg-do run { target { avx10_2_256 } } } */ +/* { dg-do run { target { avx10_2 } } } */ /* { dg-options "-march=x86-64-v3 -O2" } */ #include "avx10_2-comibf-3.c" @@ -24,7 +24,7 @@ int foo3 (__bf16 a, __bf16 b, __bf16 c, __bf16 d) int main (void) { - if (!__builtin_cpu_supports ("avx10.2-256")) + if (!__builtin_cpu_supports ("avx10.2")) return 0; __bf16 a = 0.5bf16, b = -0.25bf16, c = 1.75bf16, d = -0.125bf16; diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-compare-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-compare-1.c index e841570..17dca5c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-compare-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-compare-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vcomxsd\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcomxss\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vucomxsd\[ \\t\]+\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-compare-1b.c b/gcc/testsuite/gcc.target/i386/avx10_2-compare-1b.c index 23fa4da..cc7f820 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-compare-1b.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-compare-1b.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256 -mfpmath=sse" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2 -mfpmath=sse" } */ /* { dg-final { scan-assembler-times "comi" 6 } } */ /* { dg-final { scan-assembler-times "comx" 12 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-convert-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-convert-1.c index 729496f..3d5e921 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-convert-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-convert-1.c @@ -1,14 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvt2ps2phx\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbiasph2bf8\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbiasph2bf8\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbiasph2bf8\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+,\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -124,9 +121,6 @@ avx10_2_test (void) y2 = _mm256_mask_cvtx2ps_ph (y2, m16, a2, b2); y2 = _mm256_maskz_cvtx2ps_ph (m16, a2, b2); - y2 = _mm256_cvtx_round2ps_ph (a2, b2, 8); - y2 = _mm256_mask_cvtx_round2ps_ph (y2, m16, a2, b2, 8); - y2 = _mm256_maskz_cvtx_round2ps_ph (m16, a2, b2, 8); } void extern @@ -144,13 +138,13 @@ avx10_2_vcvtbiasph2bf8_test (void) void extern avx10_2_vcvtbiasph2bf8s_test (void) { - x128i = _mm_cvtbiassph_bf8 (x128i, x128h); - x128i = _mm_mask_cvtbiassph_bf8 (x128i, m8, x128i, x128h); - x128i = _mm_maskz_cvtbiassph_bf8 (m8, x128i, x128h); + x128i = _mm_cvts_biasph_bf8 (x128i, x128h); + x128i = _mm_mask_cvts_biasph_bf8 (x128i, m8, x128i, x128h); + x128i = _mm_maskz_cvts_biasph_bf8 (m8, x128i, x128h); - x128i = _mm256_cvtbiassph_bf8 (x256i, x256h); - x128i = _mm256_mask_cvtbiassph_bf8 (x128i, m16, x256i, x256h); - x128i = _mm256_maskz_cvtbiassph_bf8 (m16, x256i, x256h); + x128i = _mm256_cvts_biasph_bf8 (x256i, x256h); + x128i = _mm256_mask_cvts_biasph_bf8 (x128i, m16, x256i, x256h); + x128i = _mm256_maskz_cvts_biasph_bf8 (m16, x256i, x256h); } void extern @@ -168,13 +162,13 @@ avx10_2_vcvtbiasph2hf8_test (void) void extern avx10_2_vcvtbiasph2hf8s_test (void) { - x128i = _mm_cvtbiassph_hf8 (x128i, x128h); - x128i = _mm_mask_cvtbiassph_hf8 (x128i, m8, x128i, x128h); - x128i = _mm_maskz_cvtbiassph_hf8 (m8, x128i, x128h); + x128i = _mm_cvts_biasph_hf8 (x128i, x128h); + x128i = _mm_mask_cvts_biasph_hf8 (x128i, m8, x128i, x128h); + x128i = _mm_maskz_cvts_biasph_hf8 (m8, x128i, x128h); - x128i = _mm256_cvtbiassph_hf8 (x256i, x256h); - x128i = _mm256_mask_cvtbiassph_hf8 (x128i, m16, x256i, x256h); - x128i = _mm256_maskz_cvtbiassph_hf8 (m16, x256i, x256h); + x128i = _mm256_cvts_biasph_hf8 (x256i, x256h); + x128i = _mm256_mask_cvts_biasph_hf8 (x128i, m16, x256i, x256h); + x128i = _mm256_maskz_cvts_biasph_hf8 (m16, x256i, x256h); } void extern @@ -191,12 +185,12 @@ avx10_2_vcvt2ph2bf8_test (void) void extern avx10_2_vcvt2ph2bf8s_test (void) { - x128i = _mm_cvts2ph_bf8 (x128h, x128h); - x128i = _mm_mask_cvts2ph_bf8 (x128i, m16, x128h, x128h); - x128i = _mm_maskz_cvts2ph_bf8 (m16, x128h, x128h); - x256i = _mm256_cvts2ph_bf8 (x256h, x256h); - x256i = _mm256_mask_cvts2ph_bf8 (x256i, m32, x256h, x256h); - x256i = _mm256_maskz_cvts2ph_bf8 (m32, x256h, x256h); + x128i = _mm_cvts_2ph_bf8 (x128h, x128h); + x128i = _mm_mask_cvts_2ph_bf8 (x128i, m16, x128h, x128h); + x128i = _mm_maskz_cvts_2ph_bf8 (m16, x128h, x128h); + x256i = _mm256_cvts_2ph_bf8 (x256h, x256h); + x256i = _mm256_mask_cvts_2ph_bf8 (x256i, m32, x256h, x256h); + x256i = _mm256_maskz_cvts_2ph_bf8 (m32, x256h, x256h); } void extern @@ -213,12 +207,12 @@ avx10_2_vcvt2ph2hf8_test (void) void extern avx10_2_vcvt2ph2hf8s_test (void) { - x128i = _mm_cvts2ph_hf8 (x128h, x128h); - x128i = _mm_mask_cvts2ph_hf8 (x128i, m16, x128h, x128h); - x128i = _mm_maskz_cvts2ph_hf8 (m16, x128h, x128h); - x256i = _mm256_cvts2ph_hf8 (x256h, x256h); - x256i = _mm256_mask_cvts2ph_hf8 (x256i, m32, x256h, x256h); - x256i = _mm256_maskz_cvts2ph_hf8 (m32, x256h, x256h); + x128i = _mm_cvts_2ph_hf8 (x128h, x128h); + x128i = _mm_mask_cvts_2ph_hf8 (x128i, m16, x128h, x128h); + x128i = _mm_maskz_cvts_2ph_hf8 (m16, x128h, x128h); + x256i = _mm256_cvts_2ph_hf8 (x256h, x256h); + x256i = _mm256_mask_cvts_2ph_hf8 (x256i, m32, x256h, x256h); + x256i = _mm256_maskz_cvts_2ph_hf8 (m32, x256h, x256h); } void extern @@ -248,13 +242,13 @@ avx10_2_vcvtph2bf8_test (void) void extern avx10_2_vcvtph2bf8s_test (void) { - x128i = _mm_cvtsph_bf8 (x128h); - x128i = _mm_mask_cvtsph_bf8 (x128i, m8, x128h); - x128i = _mm_maskz_cvtsph_bf8 (m8, x128h); + x128i = _mm_cvts_ph_bf8 (x128h); + x128i = _mm_mask_cvts_ph_bf8 (x128i, m8, x128h); + x128i = _mm_maskz_cvts_ph_bf8 (m8, x128h); - x128i = _mm256_cvtsph_bf8 (x256h); - x128i = _mm256_mask_cvtsph_bf8 (x128i, m16, x256h); - x128i = _mm256_maskz_cvtsph_bf8 (m16, x256h); + x128i = _mm256_cvts_ph_bf8 (x256h); + x128i = _mm256_mask_cvts_ph_bf8 (x128i, m16, x256h); + x128i = _mm256_maskz_cvts_ph_bf8 (m16, x256h); } void extern @@ -272,13 +266,13 @@ avx10_2_vcvtph2hf8_test (void) void extern avx10_2_vcvtph2hf8s_test (void) { - x128i = _mm_cvtsph_hf8 (x128h); - x128i = _mm_mask_cvtsph_hf8 (x128i, m8, x128h); - x128i = _mm_maskz_cvtsph_hf8 (m8, x128h); + x128i = _mm_cvts_ph_hf8 (x128h); + x128i = _mm_mask_cvts_ph_hf8 (x128i, m8, x128h); + x128i = _mm_maskz_cvts_ph_hf8 (m8, x128h); - x128i = _mm256_cvtsph_hf8 (x256h); - x128i = _mm256_mask_cvtsph_hf8 (x128i, m16, x256h); - x128i = _mm256_maskz_cvtsph_hf8 (m16, x256h); + x128i = _mm256_cvts_ph_hf8 (x256h); + x128i = _mm256_mask_cvts_ph_hf8 (x128i, m16, x256h); + x128i = _mm256_maskz_cvts_ph_hf8 (m16, x256h); } void extern diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-media-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-media-1.c index a34075b..bdf6a6d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-media-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-media-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpbssd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-minmax-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-minmax-1.c index f16d560..77aacfa 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-minmax-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-minmax-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxbf16\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -12,45 +12,27 @@ /* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxps\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\{\n\]*\[^\}\]%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxpd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsh\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxss\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\{\n\]*\[^\}\]%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminmaxsd\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include <immintrin.h> @@ -80,27 +62,18 @@ avx10_2_test (void) y2 = _mm256_minmax_ph (y2, y2, 100); y2 = _mm256_mask_minmax_ph (y2, m16, y2, y2, 100); y2 = _mm256_maskz_minmax_ph (m16, y2, y2, 100); - y2 = _mm256_minmax_round_ph (y2, y2, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y2 = _mm256_mask_minmax_round_ph (y2, m16, y2, y2, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y2 = _mm256_maskz_minmax_round_ph (m16, y2, y2, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); x3 = _mm_minmax_ps (x3, x3, 100); x3 = _mm_mask_minmax_ps (x3, m8, x3, x3, 100); x3 = _mm_maskz_minmax_ps (m8, x3, x3, 100); y3 = _mm256_minmax_ps (y3, y3, 100); y3 = _mm256_mask_minmax_ps (y3, m8, y3, y3, 100); y3 = _mm256_maskz_minmax_ps (m8, y3, y3, 100); - y3 = _mm256_minmax_round_ps (y3, y3, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y3 = _mm256_mask_minmax_round_ps (y3, m8, y3, y3, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y3 = _mm256_maskz_minmax_round_ps (m8, y3, y3, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); x4 = _mm_minmax_pd (x4, x4, 100); x4 = _mm_mask_minmax_pd (x4, m8, x4, x4, 100); x4 = _mm_maskz_minmax_pd (m8, x4, x4, 100); y4 = _mm256_minmax_pd (y4, y4, 100); y4 = _mm256_mask_minmax_pd (y4, m8, y4, y4, 100); y4 = _mm256_maskz_minmax_pd (m8, y4, y4, 100); - y4 = _mm256_minmax_round_pd (y4, y4, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y4 = _mm256_mask_minmax_round_pd (y4, m8, y4, y4, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - y4 = _mm256_maskz_minmax_round_pd (m8, y4, y4, 100, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); x2 = _mm_minmax_sh (x2, x2, 1); x2 = _mm_mask_minmax_sh (x2, m8, x2, x2, 1); x2 = _mm_maskz_minmax_sh (m8, x2, x2, 1); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-movrs-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-movrs-1.c index 7d1446d..e3f0bfd 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-movrs-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-movrs-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -mmovrs -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -mmovrs -O2" } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %ymm\[0-9\]+" 3 } } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %ymm\[0-9\]+{%k\[1-7\]}" 2 } } */ /* { dg-final { scan-assembler-times "vmovrsb\[ \\t\]\+\\(%(?:r|e).x\\), %ymm\[0-9\]+{%k\[1-7\]}{z}" 1 } } */ @@ -37,7 +37,7 @@ volatile __mmask16 m3; void extern -avx512movrs_test (void) +avx10_movrs_test (void) { x1 = _mm256_loadrs_epi8(px1); x1 = _mm256_mask_loadrs_epi8(x1, m1, px1); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c index 6eb74bf..28856b1 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vrcpbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fma-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fma-1.c index 3db34be..0fa63de 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fma-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fma-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vfmadd132bf16\[^\n\r\]*xmm\[0-9\]" 3 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vfmsub132bf16\[^\n\r\]*xmm\[0-9\]" 3 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vfnmadd132bf16\[^\n\r\]*xmm\[0-9\]" 3 { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c index a7a017c..22ba8a2 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vmulbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vaddbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ /* { dg-final { scan-assembler-times "vdivbf16\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-smaxmin-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-smaxmin-1.c index f27e93a..59a0fc5 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-smaxmin-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-smaxmin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -Ofast" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -Ofast" } */ /* { dg-final { scan-assembler-times "vmaxbf16" 2 } } */ /* { dg-final { scan-assembler-times "vminbf16" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c deleted file mode 100644 index 59951a3..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c +++ /dev/null @@ -1,252 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vaddps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmpph\[ \\t\]+\\\$3\[^\n\r]*\{sae\}\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%k\[0-9\]\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmpph\[ \\t\]+\[^\{\n\]*\\\$4\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%k\[0-9\]\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcmpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtdq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2dq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2dq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2dq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2qq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2qq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2qq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2udq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2udq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2udq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uqq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uqq\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uqq\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uw\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2uw\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2w\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2w\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2w\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2pd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2phxy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2dq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2qq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2udq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2uqq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ - -#include <immintrin.h> - -volatile __m128 hx; -volatile __m128i hxi; -volatile __m128h hxh; -volatile __m256 x; -volatile __m256d xd; -volatile __m256h xh; -volatile __m256i xi; -volatile __mmask8 m8; -volatile __mmask16 m16; -volatile __mmask32 m32; - -void extern -avx10_2_test_1 (void) -{ - xd = _mm256_add_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_add_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_add_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_add_round_ph (xh, xh, 8); - xh = _mm256_mask_add_round_ph (xh, m32, xh, xh, 8); - xh = _mm256_maskz_add_round_ph (m32, xh, xh, 11); - - x = _mm256_add_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_add_round_ps (x, m16, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_add_round_ps (m16, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_2 (void) -{ - m8 = _mm256_cmp_round_pd_mask (xd, xd, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC); - m8 = _mm256_mask_cmp_round_pd_mask (m8, xd, xd, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC); - - m16 = _mm256_cmp_round_ph_mask (xh, xh, 3, 8); - m16 = _mm256_mask_cmp_round_ph_mask (m16, xh, xh, 4, 4); - - m8 = _mm256_cmp_round_ps_mask (x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC); - m8 = _mm256_mask_cmp_round_ps_mask (m8, x, x, _CMP_FALSE_OQ, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_3 (void) -{ - hxh = _mm256_cvt_roundepi32_ph (xi, 4); - hxh = _mm256_mask_cvt_roundepi32_ph (hxh, m8, xi, 8); - hxh = _mm256_maskz_cvt_roundepi32_ph (m8, xi, 11); - - x = _mm256_cvt_roundepi32_ps (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_cvt_roundepi32_ps (x, m8, xi, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_cvt_roundepi32_ps (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_4 (void) -{ - hxh = _mm256_cvt_roundpd_ph (xd, 4); - hxh = _mm256_mask_cvt_roundpd_ph (hxh, m8, xd, 8); - hxh = _mm256_maskz_cvt_roundpd_ph (m8, xd, 11); - - hx = _mm256_cvt_roundpd_ps (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - hx = _mm256_mask_cvt_roundpd_ps (hx, 4, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - hx = _mm256_maskz_cvt_roundpd_ps (6, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_5 (void) -{ - hxi = _mm256_cvt_roundpd_epi32 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - hxi = _mm256_mask_cvt_roundpd_epi32 (hxi, m8, xd, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - hxi = _mm256_maskz_cvt_roundpd_epi32 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xi = _mm256_cvt_roundpd_epi64 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundpd_epi64 (xi, m8, xd, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundpd_epi64 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - hxi = _mm256_cvt_roundpd_epu32 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - hxi = _mm256_mask_cvt_roundpd_epu32 (hxi, m8, xd, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - hxi = _mm256_maskz_cvt_roundpd_epu32 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xi = _mm256_cvt_roundpd_epu64 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundpd_epu64 (xi, m8, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundpd_epu64 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_6 (void) -{ - xi = _mm256_cvt_roundph_epi32 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epi32 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epi32 (m8, hxh, 11); - - xi = _mm256_cvt_roundph_epi64 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epi64 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epi64 (m8, hxh, 11); - - xi = _mm256_cvt_roundph_epu32 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epu32 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epu32 (m8, hxh, 11); - - xi = _mm256_cvt_roundph_epu64 (hxh, 4); - xi = _mm256_mask_cvt_roundph_epu64 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvt_roundph_epu64 (m8, hxh, 11); -} - -void extern -avx10_2_test_7 (void) -{ - xd = _mm256_cvt_roundph_pd (hxh, 4); - xd = _mm256_mask_cvt_roundph_pd (xd, m8, hxh, 8); - xd = _mm256_maskz_cvt_roundph_pd (m8, hxh, 8); - - x = _mm256_cvt_roundph_ps (hxh, _MM_FROUND_NO_EXC); - x = _mm256_mask_cvt_roundph_ps (x, 4, hxh, _MM_FROUND_NO_EXC); - x = _mm256_maskz_cvt_roundph_ps (6, hxh, _MM_FROUND_NO_EXC); - - x = _mm256_cvtx_roundph_ps (hxh, 4); - x = _mm256_mask_cvtx_roundph_ps (x, m8, hxh, 8); - x = _mm256_maskz_cvtx_roundph_ps (m8, hxh, 8); -} - -void extern -avx10_2_test_8 (void) -{ - xi = _mm256_cvt_roundph_epu16 (xh, 4); - xi = _mm256_mask_cvt_roundph_epu16 (xi, m16, xh, 8); - xi = _mm256_maskz_cvt_roundph_epu16 (m16, xh, 11); - - xi = _mm256_cvt_roundph_epi16 (xh, 4); - xi = _mm256_mask_cvt_roundph_epi16 (xi, m16, xh, 8); - xi = _mm256_maskz_cvt_roundph_epi16 (m16, xh, 11); -} - -void extern -avx10_2_test_9 (void) -{ - xd = _mm256_cvt_roundps_pd (hx, _MM_FROUND_NO_EXC); - xd = _mm256_mask_cvt_roundps_pd (xd, m8, hx, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_cvt_roundps_pd (m8, hx, _MM_FROUND_NO_EXC); - - hxh = _mm256_cvtx_roundps_ph (x, 4); - hxh = _mm256_mask_cvtx_roundps_ph (hxh, m8, x, 8); - hxh = _mm256_maskz_cvtx_roundps_ph (m8, x, 11); -} - -void extern -avx10_2_test_10 (void) -{ - xi = _mm256_cvt_roundps_epi32 (x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundps_epi32 (xi, m8, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundps_epi32 (m8, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xi = _mm256_cvt_roundps_epi64 (hx, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundps_epi64 (xi, m8, hx, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundps_epi64 (m8, hx, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xi = _mm256_cvt_roundps_epu32 (x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundps_epu32 (xi, m8, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundps_epu32 (m8, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xi = _mm256_cvt_roundps_epu64 (hx, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvt_roundps_epu64 (xi, m8, hx, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvt_roundps_epu64 (m8, hx, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-2.c deleted file mode 100644 index cc2d780..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-2.c +++ /dev/null @@ -1,193 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtqq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2dq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2dq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2dq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2qq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2qq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2qq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2udq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2udq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2udq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uqq\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uqq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uqq\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uw\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2uw\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2w\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2w\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2w\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqq\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtudq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuqq2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ - -#include <immintrin.h> - -volatile __m128 hx; -volatile __m128i hxi; -volatile __m128h hxh; -volatile __m256 x; -volatile __m256d xd; -volatile __m256h xh; -volatile __m256i xi; -volatile __mmask8 m8; -volatile __mmask16 m16; -volatile __mmask32 m32; - -void extern -avx10_2_test_1 (void) -{ - xd = _mm256_cvt_roundepi64_pd (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_cvt_roundepi64_pd (xd, m8, xi, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_cvt_roundepi64_pd (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - hxh = _mm256_cvt_roundepi64_ph (xi, 4); - hxh = _mm256_mask_cvt_roundepi64_ph (hxh, m8, xi, 8); - hxh = _mm256_maskz_cvt_roundepi64_ph (m8, xi, 11); - - hx = _mm256_cvt_roundepi64_ps (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - hx = _mm256_mask_cvt_roundepi64_ps (hx, m8, xi, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - hx = _mm256_maskz_cvt_roundepi64_ps (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_2 (void) -{ - hxi = _mm256_cvtt_roundpd_epi32 (xd, _MM_FROUND_NO_EXC); - hxi = _mm256_mask_cvtt_roundpd_epi32 (hxi, m8, xd, _MM_FROUND_NO_EXC); - hxi = _mm256_maskz_cvtt_roundpd_epi32 (m8, xd, _MM_FROUND_NO_EXC); - - xi = _mm256_cvtt_roundpd_epi64 (xd, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundpd_epi64 (xi, m8, xd, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundpd_epi64 (m8, xd, _MM_FROUND_NO_EXC); - - hxi = _mm256_cvtt_roundpd_epu32 (xd, _MM_FROUND_NO_EXC); - hxi = _mm256_mask_cvtt_roundpd_epu32 (hxi, m8, xd, _MM_FROUND_NO_EXC); - hxi = _mm256_maskz_cvtt_roundpd_epu32 (m8, xd, _MM_FROUND_NO_EXC); - - xi = _mm256_cvtt_roundpd_epu64 (xd, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundpd_epu64 (xi, m8, xd, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundpd_epu64 (m8, xd, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_3 (void) -{ - xi = _mm256_cvtt_roundph_epi32 (hxh, 4); - xi = _mm256_mask_cvtt_roundph_epi32 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvtt_roundph_epi32 (m8, hxh, 8); - - xi = _mm256_cvtt_roundph_epi64 (hxh, 4); - xi = _mm256_mask_cvtt_roundph_epi64 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvtt_roundph_epi64 (m8, hxh, 8); - - xi = _mm256_cvtt_roundph_epu32 (hxh, 4); - xi = _mm256_mask_cvtt_roundph_epu32 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvtt_roundph_epu32 (m8, hxh, 8); - - xi = _mm256_cvtt_roundph_epu64 (hxh, 4); - xi = _mm256_mask_cvtt_roundph_epu64 (xi, m8, hxh, 8); - xi = _mm256_maskz_cvtt_roundph_epu64 (m8, hxh, 8); - - xi = _mm256_cvtt_roundph_epu16 (xh, 4); - xi = _mm256_mask_cvtt_roundph_epu16 (xi, m16, xh, 8); - xi = _mm256_maskz_cvtt_roundph_epu16 (m16, xh, 8); - - xi = _mm256_cvtt_roundph_epi16 (xh, 4); - xi = _mm256_mask_cvtt_roundph_epi16 (xi, m16, xh, 8); - xi = _mm256_maskz_cvtt_roundph_epi16 (m16, xh, 8); -} - -void extern -avx10_2_test_4 (void) -{ - xi = _mm256_cvtt_roundps_epi32 (x, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundps_epi32 (xi, m8, x, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundps_epi32 (m8, x, _MM_FROUND_NO_EXC); - - xi = _mm256_cvtt_roundps_epi64 (hx, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundps_epi64 (xi, m8, hx, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundps_epi64 (m8, hx, _MM_FROUND_NO_EXC); - - xi = _mm256_cvtt_roundps_epu32 (x, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundps_epu32 (xi, m8, x, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundps_epu32 (m8, x, _MM_FROUND_NO_EXC); - - xi = _mm256_cvtt_roundps_epu64 (hx, _MM_FROUND_NO_EXC); - xi = _mm256_mask_cvtt_roundps_epu64 (xi, m8, hx, _MM_FROUND_NO_EXC); - xi = _mm256_maskz_cvtt_roundps_epu64 (m8, hx, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_5 (void) -{ - hxh = _mm256_cvt_roundepu32_ph (xi, 4); - hxh = _mm256_mask_cvt_roundepu32_ph (hxh, m8, xi, 8); - hxh = _mm256_maskz_cvt_roundepu32_ph (m8, xi, 11); - - x = _mm256_cvt_roundepu32_ps (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_cvt_roundepu32_ps (x, m8, xi, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_cvt_roundepu32_ps (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_6 (void) -{ - xd = _mm256_cvt_roundepu64_pd (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_cvt_roundepu64_pd (xd, m8, xi, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_cvt_roundepu64_pd (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - hxh = _mm256_cvt_roundepu64_ph (xi, 4); - hxh = _mm256_mask_cvt_roundepu64_ph (hxh, m8, xi, 8); - hxh = _mm256_maskz_cvt_roundepu64_ph (m8, xi, 11); - - hx = _mm256_cvt_roundepu64_ps (xi, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - hx = _mm256_mask_cvt_roundepu64_ps (hx, m8, xi, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - hx = _mm256_maskz_cvt_roundepu64_ps (m8, xi, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c deleted file mode 100644 index 57839f4..0000000 --- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c +++ /dev/null @@ -1,601 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-final { scan-assembler-times "vcvtuw2ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuw2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtuw2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtw2ph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtw2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtw2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vdivps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmaddcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmaddcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfcmaddcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfcmulcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfixupimmpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfixupimmps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfmaddcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsub...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmsubadd...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfmulcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmadd...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vfnmsub...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexppd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetexpps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vgetmantps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vmaxph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmaxps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminpd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */ -/* { dg-final { scan-assembler-times "vminph\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscalepd\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleph\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vrndscaleps\[ \\t\]+\\S*,\[ \\t\]+\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscalefps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsqrtps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vsubps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ - -#include <immintrin.h> - -volatile __m128 hx; -volatile __m128i hxi; -volatile __m128h hxh; -volatile __m256 x; -volatile __m256d xd; -volatile __m256h xh; -volatile __m256i xi; -volatile __mmask8 m8; -volatile __mmask16 m16; -volatile __mmask32 m32; - -void extern -avx10_2_test_1 (void) -{ - xh = _mm256_cvt_roundepu16_ph (xi, 4); - xh = _mm256_mask_cvt_roundepu16_ph (xh, m16, xi, 8); - xh = _mm256_maskz_cvt_roundepu16_ph (m16, xi, 11); - - xh = _mm256_cvt_roundepi16_ph (xi, 4); - xh = _mm256_mask_cvt_roundepi16_ph (xh, m16, xi, 8); - xh = _mm256_maskz_cvt_roundepi16_ph (m16, xi, 11); -} - -void extern -avx10_2_test_2 (void) -{ - xd = _mm256_div_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_div_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_div_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_div_round_ph (xh, xh, 8); - xh = _mm256_mask_div_round_ph (xh, m16, xh, xh, 8); - xh = _mm256_maskz_div_round_ph (m16, xh, xh, 11); - - x = _mm256_div_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_div_round_ps (x, m16, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_div_round_ps (m16, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_3 (void) -{ - xh = _mm256_fcmadd_round_pch (xh, xh, xh, 8); - xh = _mm256_mask_fcmadd_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_mask3_fcmadd_round_pch (xh, xh, xh, m8, 8); - xh = _mm256_maskz_fcmadd_round_pch (m8, xh, xh, xh, 11); -} - -void extern -avx10_2_test_4 (void) -{ - xh = _mm256_fcmul_round_pch (xh, xh, 8); - xh = _mm256_mask_fcmul_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_maskz_fcmul_round_pch (m8, xh, xh, 11); -} - -void extern -avx10_2_test_5 (void) -{ - xh = _mm256_cmul_round_pch (xh, xh, 8); - xh = _mm256_mask_cmul_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_maskz_cmul_round_pch (m8, xh, xh, 11); -} - -void extern -avx10_2_test_6 (void) -{ - xd = _mm256_fixupimm_round_pd (xd, xd, xi, 3, _MM_FROUND_NO_EXC); - xd = _mm256_mask_fixupimm_round_pd (xd, m8, xd, xi, 3, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fixupimm_round_pd (m8, xd, xd, xi, 3, _MM_FROUND_NO_EXC); - - x = _mm256_fixupimm_round_ps (x, x, xi, 3, _MM_FROUND_NO_EXC); - x = _mm256_mask_fixupimm_round_ps (x, m8, x, xi, 3, _MM_FROUND_NO_EXC); - x = _mm256_maskz_fixupimm_round_ps (m8, x, x, xi, 3, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_7 (void) -{ - xd = _mm256_fmadd_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fmadd_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fmadd_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fmadd_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fmadd_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fmadd_round_ph (xh, m16, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fmadd_round_ph (xh, xh, xh, m16, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fmadd_round_ph (m16, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fmadd_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fmadd_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fmadd_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fmadd_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_8 (void) -{ - xh = _mm256_fmadd_round_pch (xh, xh, xh, 8); - xh = _mm256_mask_fmadd_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_mask3_fmadd_round_pch (xh, xh, xh, m8, 8); - xh = _mm256_maskz_fmadd_round_pch (m8, xh, xh, xh, 11); -} - -void extern -avx10_2_test_9 (void) -{ - xd = _mm256_fmaddsub_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fmaddsub_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fmaddsub_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fmaddsub_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fmaddsub_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fmaddsub_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fmaddsub_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fmaddsub_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fmaddsub_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fmaddsub_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fmaddsub_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fmaddsub_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_10 (void) -{ - xd = _mm256_fmsub_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fmsub_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fmsub_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fmsub_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fmsub_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fmsub_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fmsub_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fmsub_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fmsub_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fmsub_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fmsub_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fmsub_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_11 (void) -{ - xd = _mm256_fmsubadd_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fmsubadd_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fmsubadd_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fmsubadd_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fmsubadd_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fmsubadd_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fmsubadd_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fmsubadd_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fmsubadd_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fmsubadd_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fmsubadd_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fmsubadd_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_12 (void) -{ - xh = _mm256_fmul_round_pch (xh, xh, 8); - xh = _mm256_mask_fmul_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_maskz_fmul_round_pch (m8, xh, xh, 11); -} - -void extern -avx10_2_test_13 (void) -{ - xh = _mm256_mul_round_pch (xh, xh, 8); - xh = _mm256_mask_mul_round_pch (xh, m8, xh, xh, 8); - xh = _mm256_maskz_mul_round_pch (m8, xh, xh, 11); -} - -void extern -avx10_2_test_14 (void) -{ - xd = _mm256_fnmadd_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fnmadd_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fnmadd_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fnmadd_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fnmadd_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fnmadd_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fnmadd_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fnmadd_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fnmadd_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fnmadd_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fnmadd_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fnmadd_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_15 (void) -{ - xd = _mm256_fnmsub_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_fnmsub_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_mask3_fnmsub_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_fnmsub_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_fnmsub_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xh = _mm256_mask_fnmsub_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xh = _mm256_mask3_fnmsub_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - xh = _mm256_maskz_fnmsub_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - x = _mm256_fnmsub_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_fnmsub_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - x = _mm256_mask3_fnmsub_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_fnmsub_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_16 (void) -{ - xd = _mm256_getexp_round_pd (xd, _MM_FROUND_NO_EXC); - xd = _mm256_mask_getexp_round_pd (xd, m8, xd, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_getexp_round_pd (m8, xd, _MM_FROUND_NO_EXC); - - xh = _mm256_getexp_round_ph (xh, _MM_FROUND_NO_EXC); - xh = _mm256_mask_getexp_round_ph (xh, m16, xh, _MM_FROUND_NO_EXC); - xh = _mm256_maskz_getexp_round_ph (m16, xh, _MM_FROUND_NO_EXC); - - x = _mm256_getexp_round_ps (x, _MM_FROUND_NO_EXC); - x = _mm256_mask_getexp_round_ps (x, m8, x, _MM_FROUND_NO_EXC); - x = _mm256_maskz_getexp_round_ps (m8, x, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_17 (void) -{ - xd = _mm256_getmant_round_pd (xd, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, - _MM_FROUND_NO_EXC); - xd = _mm256_mask_getmant_round_pd (xd, m8, xd, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_getmant_round_pd (m8, xd, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); - - xh = _mm256_getmant_round_ph (xh, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, - _MM_FROUND_NO_EXC); - xh = _mm256_mask_getmant_round_ph (xh, m16, xh, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); - xh = _mm256_maskz_getmant_round_ph (m16, xh, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); - - x = _mm256_getmant_round_ps (x, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, - _MM_FROUND_NO_EXC); - x = _mm256_mask_getmant_round_ps (x, m8, x, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); - x = _mm256_maskz_getmant_round_ps (m8, x, _MM_MANT_NORM_p75_1p5, - _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_18 (void) -{ - xd = _mm256_max_round_pd (xd, xd, _MM_FROUND_NO_EXC); - xd = _mm256_mask_max_round_pd (xd, m8, xd, xd, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_max_round_pd (m8, xd, xd, _MM_FROUND_NO_EXC); - - xh = _mm256_max_round_ph (xh, xh, _MM_FROUND_NO_EXC); - xh = _mm256_mask_max_round_ph (xh, m16, xh, xh, _MM_FROUND_NO_EXC); - xh = _mm256_maskz_max_round_ph (m16, xh, xh, _MM_FROUND_NO_EXC); - - x = _mm256_max_round_ps (x, x, _MM_FROUND_NO_EXC); - x = _mm256_mask_max_round_ps (x, m8, x, x, _MM_FROUND_NO_EXC); - x = _mm256_maskz_max_round_ps (m8, x, x, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_19 (void) -{ - xd = _mm256_min_round_pd (xd, xd, _MM_FROUND_NO_EXC); - xd = _mm256_mask_min_round_pd (xd, m8, xd, xd, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_min_round_pd (m8, xd, xd, _MM_FROUND_NO_EXC); - - xh = _mm256_min_round_ph (xh, xh, _MM_FROUND_NO_EXC); - xh = _mm256_mask_min_round_ph (xh, m16, xh, xh, _MM_FROUND_NO_EXC); - xh = _mm256_maskz_min_round_ph (m16, xh, xh, _MM_FROUND_NO_EXC); - - x = _mm256_min_round_ps (x, x, _MM_FROUND_NO_EXC); - x = _mm256_mask_min_round_ps (x, m8, x, x, _MM_FROUND_NO_EXC); - x = _mm256_maskz_min_round_ps (m8, x, x, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_20 (void) -{ - xd = _mm256_mul_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_mul_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_mul_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_mul_round_ph (xh, xh, 8); - xh = _mm256_mask_mul_round_ph (xh, m16, xh, xh, 8); - xh = _mm256_maskz_mul_round_ph (m16, xh, xh, 11); - - x = _mm256_mul_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_mul_round_ps (x, m8, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_mul_round_ps (m8, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_21 (void) -{ - xd = _mm256_range_round_pd (xd, xd, 15, _MM_FROUND_NO_EXC); - xd = _mm256_mask_range_round_pd (xd, m8, xd, xd, 15, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_range_round_pd (m8, xd, xd, 15, _MM_FROUND_NO_EXC); - - x = _mm256_range_round_ps (x, x, 15, _MM_FROUND_NO_EXC); - x = _mm256_mask_range_round_ps (x, m16, x, x, 15, _MM_FROUND_NO_EXC); - x = _mm256_maskz_range_round_ps (m16, x, x, 15, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_22 (void) -{ - xd = _mm256_reduce_round_pd (xd, 123, _MM_FROUND_NO_EXC); - xd = _mm256_mask_reduce_round_pd (xd, m8, xd, 123, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_reduce_round_pd (m8, xd, 123, _MM_FROUND_NO_EXC); - - xh = _mm256_reduce_round_ph (xh, 123, _MM_FROUND_NO_EXC); - xh = _mm256_mask_reduce_round_ph (xh, m16, xh, 123, _MM_FROUND_NO_EXC); - xh = _mm256_maskz_reduce_round_ph (m16, xh, 123, _MM_FROUND_NO_EXC); - - x = _mm256_reduce_round_ps (x, 123, _MM_FROUND_NO_EXC); - x = _mm256_mask_reduce_round_ps (x, m8, x, 123, _MM_FROUND_NO_EXC); - x = _mm256_maskz_reduce_round_ps (m8, x, 123, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_23 (void) -{ - xd = _mm256_roundscale_round_pd (xd, 0x42, _MM_FROUND_NO_EXC); - xd = _mm256_mask_roundscale_round_pd (xd, 2, xd, 0x42, _MM_FROUND_NO_EXC); - xd = _mm256_maskz_roundscale_round_pd (2, xd, 0x42, _MM_FROUND_NO_EXC); - - xh = _mm256_roundscale_round_ph (xh, 123, 8); - xh = _mm256_mask_roundscale_round_ph (xh, m16, xh, 123, 8); - xh = _mm256_maskz_roundscale_round_ph (m16, xh, 123, 8); - - x = _mm256_roundscale_round_ps (x, 0x42, _MM_FROUND_NO_EXC); - x = _mm256_mask_roundscale_round_ps (x, 2, x, 0x42, _MM_FROUND_NO_EXC); - x = _mm256_maskz_roundscale_round_ps (2, x, 0x42, _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_24 (void) -{ - xd = _mm256_scalef_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_scalef_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_scalef_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_scalef_round_ph (xh, xh, 8); - xh = _mm256_mask_scalef_round_ph (xh, m16, xh, xh, 8); - xh = _mm256_maskz_scalef_round_ph (m16, xh, xh, 11); - - x = _mm256_scalef_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_scalef_round_ps (x, m8, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_scalef_round_ps (m8, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_25 (void) -{ - xd = _mm256_sqrt_round_pd (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_sqrt_round_pd (xd, m8, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_sqrt_round_pd (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_sqrt_round_ph (xh, 4); - xh = _mm256_mask_sqrt_round_ph (xh, m16, xh, 8); - xh = _mm256_maskz_sqrt_round_ph (m16, xh, 11); - - x = _mm256_sqrt_round_ps (x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_sqrt_round_ps (x, m8, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_sqrt_round_ps (m8, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} - -void extern -avx10_2_test_26 (void) -{ - xd = _mm256_sub_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - xd = _mm256_mask_sub_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC); - xd = _mm256_maskz_sub_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); - - xh = _mm256_sub_round_ph (xh, xh, 8); - xh = _mm256_mask_sub_round_ph (xh, m16, xh, xh, 8); - xh = _mm256_maskz_sub_round_ph (m16, xh, xh, 11); - - x = _mm256_sub_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC); - x = _mm256_mask_sub_round_ps (x, m8, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC); - x = _mm256_maskz_sub_round_ps (m8, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); -} diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c index dd8b874..4ae1fc1 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-satcvt-1.c @@ -1,45 +1,29 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2ibs\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtph2iubs\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2ibs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttph2iubs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2ibs\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtps2iubs\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2ibs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2iubs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbf162ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbf162ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvtbf162ibs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ @@ -91,51 +75,27 @@ /* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2dqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2udqsy\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttpd2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2dqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2qqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2udqs\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttps2uqqs\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2dqsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2dqsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vcvttpd2dqsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ @@ -202,58 +162,34 @@ avx10_2_test (void) xi = _mm256_ipcvts_ph_epi8 (xh); xi = _mm256_mask_ipcvts_ph_epi8 (xi, m16, xh); xi = _mm256_maskz_ipcvts_ph_epi8 (m16, xh); - xi = _mm256_ipcvts_roundph_epi8 (xh, 4); - xi = _mm256_mask_ipcvts_roundph_epi8 (xi, m16, xh, 8); - xi = _mm256_maskz_ipcvts_roundph_epi8 (m16, xh, 11); xi = _mm256_ipcvts_ph_epu8 (xh); xi = _mm256_mask_ipcvts_ph_epu8 (xi, m16, xh); xi = _mm256_maskz_ipcvts_ph_epu8 (m16, xh); - xi = _mm256_ipcvts_roundph_epu8 (xh, 4); - xi = _mm256_mask_ipcvts_roundph_epu8 (xi, m16, xh, 8); - xi = _mm256_maskz_ipcvts_roundph_epu8 (m16, xh, 11); xi = _mm256_ipcvtts_ph_epi8 (xh); xi = _mm256_mask_ipcvtts_ph_epi8 (xi, m16, xh); xi = _mm256_maskz_ipcvtts_ph_epi8 (m16, xh); - xi = _mm256_ipcvtts_roundph_epi8 (xh, 4); - xi = _mm256_mask_ipcvtts_roundph_epi8 (xi, m16, xh, 8); - xi = _mm256_maskz_ipcvtts_roundph_epi8 (m16, xh, 8); xi = _mm256_ipcvtts_ph_epu8 (xh); xi = _mm256_mask_ipcvtts_ph_epu8 (xi, m16, xh); xi = _mm256_maskz_ipcvtts_ph_epu8 (m16, xh); - xi = _mm256_ipcvtts_roundph_epu8 (xh, 4); - xi = _mm256_mask_ipcvtts_roundph_epu8 (xi, m16, xh, 8); - xi = _mm256_maskz_ipcvtts_roundph_epu8 (m16, xh, 8); xi = _mm256_ipcvts_ps_epi8 (x); xi = _mm256_mask_ipcvts_ps_epi8 (xi, m8, x); xi = _mm256_maskz_ipcvts_ps_epi8 (m8, x); - xi = _mm256_ipcvts_roundps_epi8 (x, 4); - xi = _mm256_mask_ipcvts_roundps_epi8 (xi, m8, x, 8); - xi = _mm256_maskz_ipcvts_roundps_epi8 (m8, x, 11); xi = _mm256_ipcvts_ps_epu8 (x); xi = _mm256_mask_ipcvts_ps_epu8 (xi, m8, x); xi = _mm256_maskz_ipcvts_ps_epu8 (m8, x); - xi = _mm256_ipcvts_roundps_epu8 (x, 4); - xi = _mm256_mask_ipcvts_roundps_epu8 (xi, m8, x, 8); - xi = _mm256_maskz_ipcvts_roundps_epu8 (m8, x, 11); xi = _mm256_ipcvtts_ps_epi8 (x); xi = _mm256_mask_ipcvtts_ps_epi8 (xi, m8, x); xi = _mm256_maskz_ipcvtts_ps_epi8 (m8, x); - xi = _mm256_ipcvtts_roundps_epi8 (x, 4); - xi = _mm256_mask_ipcvtts_roundps_epi8 (xi, m8, x, 8); - xi = _mm256_maskz_ipcvtts_roundps_epi8 (m8, x, 8); xi = _mm256_ipcvtts_ps_epu8 (x); xi = _mm256_mask_ipcvtts_ps_epu8 (xi, m8, x); xi = _mm256_maskz_ipcvtts_ps_epu8 (m8, x); - xi = _mm256_ipcvtts_roundps_epu8 (x, 4); - xi = _mm256_mask_ipcvtts_roundps_epu8 (xi, m8, x, 8); - xi = _mm256_maskz_ipcvtts_roundps_epu8 (m8, x, 8); xi = _mm256_ipcvts_bf16_epi8 (xbh); xi = _mm256_mask_ipcvts_bf16_epi8 (xi, m16, xbh); @@ -322,58 +258,34 @@ avx10_2_test (void) hxi = _mm256_cvtts_pd_epi32 (xd); hxi = _mm256_mask_cvtts_pd_epi32 (hxi, m8, xd); hxi = _mm256_maskz_cvtts_pd_epi32 (m8, xd); - hxi = _mm256_cvtts_roundpd_epi32 (xd, 8); - hxi = _mm256_mask_cvtts_roundpd_epi32 (hxi, m8, xd, 8); - hxi = _mm256_maskz_cvtts_roundpd_epi32 (m8, xd, 8); xi = _mm256_cvtts_pd_epi64 (xd); xi = _mm256_mask_cvtts_pd_epi64 (xi, m8, xd); xi = _mm256_maskz_cvtts_pd_epi64 (m8, xd); - xi = _mm256_cvtts_roundpd_epi64 (xd, 8); - xi = _mm256_mask_cvtts_roundpd_epi64 (xi, m8, xd, 8); - xi = _mm256_maskz_cvtts_roundpd_epi64 (m8, xd, 8); hxi = _mm256_cvtts_pd_epu32 (xd); hxi = _mm256_mask_cvtts_pd_epu32 (hxi, m8, xd); hxi = _mm256_maskz_cvtts_pd_epu32 (m8, xd); - hxi = _mm256_cvtts_roundpd_epu32 (xd, 8); - hxi = _mm256_mask_cvtts_roundpd_epu32 (hxi, m8, xd, 8); - hxi = _mm256_maskz_cvtts_roundpd_epu32 (m8, xd, 8); xi = _mm256_cvtts_pd_epu64 (xd); xi = _mm256_mask_cvtts_pd_epu64 (xi, m8, xd); xi = _mm256_maskz_cvtts_pd_epu64 (m8, xd); - xi = _mm256_cvtts_roundpd_epu64 (xd, 8); - xi = _mm256_mask_cvtts_roundpd_epu64 (xi, m8, xd, 8); - xi = _mm256_maskz_cvtts_roundpd_epu64 (m8, xd, 8); xi = _mm256_cvtts_ps_epi32 (x); xi = _mm256_mask_cvtts_ps_epi32 (xi, m16, x); xi = _mm256_maskz_cvtts_ps_epi32 (m16, x); - xi = _mm256_cvtts_roundps_epi32 (x, 8); - xi = _mm256_mask_cvtts_roundps_epi32 (xi, m16, x, 8); - xi = _mm256_maskz_cvtts_roundps_epi32 (m16, x, 8); xi = _mm256_cvtts_ps_epi64 (hx); xi = _mm256_mask_cvtts_ps_epi64 (xi, m8, hx); xi = _mm256_maskz_cvtts_ps_epi64 (m8, hx); - xi = _mm256_cvtts_roundps_epi64 (hx, 8); - xi = _mm256_mask_cvtts_roundps_epi64 (xi, m8, hx, 8); - xi = _mm256_maskz_cvtts_roundps_epi64 (m8, hx, 8); xi = _mm256_cvtts_ps_epu32 (x); xi = _mm256_mask_cvtts_ps_epu32 (xi, m16, x); xi = _mm256_maskz_cvtts_ps_epu32 (m16, x); - xi = _mm256_cvtts_roundps_epu32 (x, 8); - xi = _mm256_mask_cvtts_roundps_epu32 (xi, m16, x, 8); - xi = _mm256_maskz_cvtts_roundps_epu32 (m16, x, 8); xi = _mm256_cvtts_ps_epu64 (hx); xi = _mm256_mask_cvtts_ps_epu64 (xi, m8, hx); xi = _mm256_maskz_cvtts_ps_epu64 (m8, hx); - xi = _mm256_cvtts_roundps_epu64 (hx, 8); - xi = _mm256_mask_cvtts_roundps_epu64 (xi, m8, hx, 8); - xi = _mm256_maskz_cvtts_roundps_epu64 (m8, hx, 8); hxi = _mm_cvtts_pd_epi32 (hxd); hxi = _mm_mask_cvtts_pd_epi32 (hxi, m8, hxd); diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vaddbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vaddbf16-2.c index c2564b6..d880454 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vaddbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vaddbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcmpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcmpbf16-2.c index 7ac7eda..cb6506a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcmpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcmpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-1.c index ac981b1..3f08ff5 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=x86-64-v3 -mavx10.2-256 -O2" } */ +/* { dg-options "-march=x86-64-v3 -mavx10.2 -O2" } */ /* { dg-final { scan-assembler-times "vcomisbf16\[ \\t\]+\[^{}\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 6 } } */ /* { dg-final { scan-assembler-times "jp" 2 } } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-2.c index 1dd15a9..7266e3a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcomisbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8-2.c index eee2539..9dd940c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8s-2.c index ee5b35a..2a9caca 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8-2.c index 683196b..80dc248 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8s-2.c index 3d2c6eec..30f6a60 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ps2phx-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ps2phx-2.c index 82aaa6c..125713c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ps2phx-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvt2ps2phx-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c index a328598..824ec68 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c index 7b48ee1..b8f9925 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbf162iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8-2.c index 7769571..e3f2a81 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8s-2.c index 9ca0104..2b9f81d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8-2.c index 15c6dc4..27e5f210 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8s-2.c index 0854a71..b93a1f978 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtbiasph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvthf82ph-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvthf82ph-2.c index 57203d5..d647fde 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvthf82ph-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvthf82ph-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8-2.c index df0d10d..826b5ff 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8s-2.c index eeee592..c5b9576 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2bf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8-2.c index 12a4ebf..00f2928 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8s-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8s-2.c index cea6899..a2fa0c8 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8s-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2hf8s-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2ibs-2.c index c0261f4..2265f81 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2iubs-2.c index ef53dd3..c4b2b575 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtph2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2ibs-2.c index 9f6a8ad..fdf825b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2iubs-2.c index d58019e..a27d5c7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvtps2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c index 066bc06..0585048 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c index 38021ca..3082ca0 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttbf162iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2dqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2dqs-2.c index e4f71c2..d23024d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2dqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2dqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2qqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2qqs-2.c index 466ce37..d7aa1e5 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2qqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2qqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2udqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2udqs-2.c index 761c7c5..88caedf 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2udqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2udqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2uqqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2uqqs-2.c index 42fb9e7..3304eeb 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2uqqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttpd2uqqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2ibs-2.c index 52f3e13..dfa110c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2iubs-2.c index b37bc72..500e323 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttph2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2dqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2dqs-2.c index 51db01a..d2ef60b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2dqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2dqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2ibs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2ibs-2.c index 745c934..7002945 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2ibs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2ibs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2iubs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2iubs-2.c index 95b6238..4c05d3c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2iubs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2iubs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2qqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2qqs-2.c index 5a39579..a7882ad 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2qqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2qqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2udqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2udqs-2.c index 3bb3d4c..66b654e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2udqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2udqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2uqqs-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2uqqs-2.c index 85658bf..3f32060 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2uqqs-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttps2uqqs-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2sis-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2sis-2.c index 72c7fe4..8069497 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2sis-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2sis-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2usis-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2usis-2.c index bce0043..e2b18d6 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2usis-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttsd2usis-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2sis-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2sis-2.c index 0c64922..82db8ef 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2sis-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2sis-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2usis-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2usis-2.c index af63bb7..c3d16ff 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2usis-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vcvttss2usis-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vdivbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vdivbf16-2.c index ad18ce8..69d5019 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vdivbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vdivbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vdpphps-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vdpphps-2.c index c15d838..e2f422d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vdpphps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vdpphps-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfmaddXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfmaddXXXbf16-2.c index c3aafae..85041d4 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vfmaddXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfmaddXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfmsubXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfmsubXXXbf16-2.c index 7a26f17..761d5d1 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vfmsubXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfmsubXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfnmaddXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfnmaddXXXbf16-2.c index 862a998..9b260aa 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vfnmaddXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfnmaddXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfnmsubXXXbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfnmsubXXXbf16-2.c index 00da303..86539f7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vfnmsubXXXbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfnmsubXXXbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c index 8fb655b6..40baeca 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vfpclassbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c index 1447c12..e6a707c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vgetexpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vgetmantbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vgetmantbf16-2.c index 285b286..9cdec14 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vgetmantbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vgetmantbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmaxbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmaxbf16-2.c index 4591d9b..950870f 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmaxbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmaxbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminbf16-2.c index 84912d0..9786127 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxbf16-2.c index 4458ddb..0c181d9 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxpd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxpd-2.c index 9caea72..106083d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxpd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxpd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxph-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxph-2.c index edbbb53..d465e7a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxph-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxph-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxps-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxps-2.c index 1d8b4db..88aaf5b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxps-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxps-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsd-2.c index 7add239..b8db288 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsh-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsh-2.c index 5037337..8ce838d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsh-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxsh-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxss-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxss-2.c index f87cc8b..65f59ca 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxss-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vminmaxss-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-fsignaling-nans -mfpmath=sse -O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c index d6bcbe5..21bd1a1 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vmovd\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 1 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vmovss\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 1 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vmovd\t%xmm0, %xmm0" 3 { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-2.c index ace18d6..0929950 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c index 06712c5..49fa51d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vmovw\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 4 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vmovw\t%xmm0, %xmm0" 4 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vmovw\t%edi, %xmm0" 1 { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-2.c index 54016a5..c474638 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_SCALAR diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmpsadbw-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmpsadbw-2.c index 7f01c73..fdf68e6 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmpsadbw-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmpsadbw-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmulbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmulbf16-2.c index 8bda6d6..568c0a9 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vmulbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmulbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssd-2.c index 5565049..256d10e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssds-2.c index 8302f17..88ab613 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbssds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsud-2.c index e41c5e4..cdbd57c 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsuds-2.c index f27983a..5e9937a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbsuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuud-2.c index d9fde4a..73e3f71 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuuds-2.c index fe5a133..09c1c81 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpbuuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsud-2.c index 1684967..f68d3ed 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsuds-2.c index 1e28e5f..3b3f5df 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwsuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusd-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusd-2.c index bf1bddf..209e62d 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusd-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusds-2.c index 66eca16..6e9692b 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwusds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuud-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuud-2.c index 73f87fe..8feb5d7 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuud-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuud-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuuds-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuuds-2.c index 905038c..930839e 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuuds-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vpdpwuuds-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vrcpbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vrcpbf16-2.c index 7d804c4..367b2cf 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vrcpbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vrcpbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vreducebf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vreducebf16-2.c index 9d4209f..318e430 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vreducebf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vreducebf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vrndscalebf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vrndscalebf16-2.c index a6ad6b0..5720438 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vrndscalebf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vrndscalebf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vrsqrtbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vrsqrtbf16-2.c index 1f33d12..6083c86 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vrsqrtbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vrsqrtbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vscalefbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vscalefbf16-2.c index bed0871..81b24f3 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vscalefbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vscalefbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vsqrtbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vsqrtbf16-2.c index fffa45c..5188e05 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vsqrtbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vsqrtbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vsubbf16-2.c b/gcc/testsuite/gcc.target/i386/avx10_2-vsubbf16-2.c index 42f7d4f..16f444a 100644 --- a/gcc/testsuite/gcc.target/i386/avx10_2-vsubbf16-2.c +++ b/gcc/testsuite/gcc.target/i386/avx10_2-vsubbf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-256" } */ -/* { dg-require-effective-target avx10_2_256 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX512VL diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovw-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovw-1b.c index a96007d..9b08f5a 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovw-1b.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovw-1b.c @@ -1,4 +1,4 @@ -/* { dg-do run {target avx512fp16} } */ +/* { dg-do run { target avx512fp16 } } */ /* { dg-options "-O2 -mavx512fp16" } */ static void do_test (void); diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc index 34c821a..e462ead 100644 --- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc +++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc @@ -87,8 +87,7 @@ extern void test_sm3 (void) __attribute__((__target__("sm3"))); extern void test_sha512 (void) __attribute__((__target__("sha512"))); extern void test_sm4 (void) __attribute__((__target__("sm4"))); extern void test_user_msr (void) __attribute__((__target__("usermsr"))); -extern void test_avx10_2_256 (void) __attribute__((__target__("avx10.2-256"))); -extern void test_avx10_2_512 (void) __attribute__((__target__("avx10.2-512"))); +extern void test_avx10_2 (void) __attribute__((__target__("avx10.2"))); extern void test_amx_avx512 (void) __attribute__((__target__("amx-avx512"))); extern void test_amx_tf32 (void) __attribute__((__target__("amx-tf32"))); extern void test_amx_transpose (void) __attribute__((__target__("amx-transpose"))); diff --git a/gcc/testsuite/gcc.target/i386/noevex512-1.c b/gcc/testsuite/gcc.target/i386/noevex512-1.c index 7fd45f1..89eb528 100644 --- a/gcc/testsuite/gcc.target/i386/noevex512-1.c +++ b/gcc/testsuite/gcc.target/i386/noevex512-1.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O0 -march=x86-64 -mavx512f -mno-evex512 -Wno-psabi" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ /* { dg-final { scan-assembler-not ".%zmm" } } */ typedef double __m512d __attribute__ ((__vector_size__ (64), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/noevex512-2.c b/gcc/testsuite/gcc.target/i386/noevex512-2.c index b7915d8..34740ff 100644 --- a/gcc/testsuite/gcc.target/i386/noevex512-2.c +++ b/gcc/testsuite/gcc.target/i386/noevex512-2.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -march=x86-64 -mavx512bw -mno-evex512" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/part-vect-vec_cmpbf.c b/gcc/testsuite/gcc.target/i386/part-vect-vec_cmpbf.c index d4138f2..c904dc0 100644 --- a/gcc/testsuite/gcc.target/i386/part-vect-vec_cmpbf.c +++ b/gcc/testsuite/gcc.target/i386/part-vect-vec_cmpbf.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O2 -mavx10.2-256" } */ +/* { dg-options "-O2 -mavx10.2" } */ /* { dg-final { scan-assembler-times "vcmpbf16" 10 } } */ typedef __bf16 __attribute__((__vector_size__ (4))) v2bf; diff --git a/gcc/testsuite/gcc.target/i386/pr111068.c b/gcc/testsuite/gcc.target/i386/pr111068.c index 4ff2ea0..70c1e9a 100644 --- a/gcc/testsuite/gcc.target/i386/pr111068.c +++ b/gcc/testsuite/gcc.target/i386/pr111068.c @@ -1,6 +1,7 @@ /* PR target/111068 */ /* { dg-do compile } */ -/* { dg-options "-ffloat-store -mavx10.1-512" } */ +/* { dg-options "-ffloat-store -mavx10.1" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ typedef _Float16 __attribute__((__vector_size__ (8))) V; V u, v, w; diff --git a/gcc/testsuite/gcc.target/i386/pr111907.c b/gcc/testsuite/gcc.target/i386/pr111907.c index 5275e94..cadc9e4 100644 --- a/gcc/testsuite/gcc.target/i386/pr111907.c +++ b/gcc/testsuite/gcc.target/i386/pr111907.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -mno-evex512" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ _Float128 foo (_Float128 d, _Float128 e) diff --git a/gcc/testsuite/gcc.target/i386/pr117240_avx512f.c b/gcc/testsuite/gcc.target/i386/pr117240_avx512f.c index c2d616a..d34ebb7 100644 --- a/gcc/testsuite/gcc.target/i386/pr117240_avx512f.c +++ b/gcc/testsuite/gcc.target/i386/pr117240_avx512f.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mvaes -mevex512 -mno-xsave -Wno-psabi" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ typedef __attribute__((__vector_size__(64))) char V; diff --git a/gcc/testsuite/gcc.target/i386/pr117304-1.c b/gcc/testsuite/gcc.target/i386/pr117304-1.c index ec75f27..58fb53c 100644 --- a/gcc/testsuite/gcc.target/i386/pr117304-1.c +++ b/gcc/testsuite/gcc.target/i386/pr117304-1.c @@ -1,6 +1,7 @@ /* PR target/117304 */ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f -mno-evex512" } */ +/* { dg-warning "'-mevex512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ typedef __attribute__((__vector_size__(32))) int __v8si; typedef __attribute__((__vector_size__(32))) unsigned int __v8su; diff --git a/gcc/testsuite/gcc.target/i386/pr117495.c b/gcc/testsuite/gcc.target/i386/pr117495.c index 5f17bb9..90f3561 100644 --- a/gcc/testsuite/gcc.target/i386/pr117495.c +++ b/gcc/testsuite/gcc.target/i386/pr117495.c @@ -3,7 +3,7 @@ /* { dg-options "-march=x86-64-v3 -fno-trapping-math" } */ /* { dg-final { scan-assembler-times "vcomisbf16" 2 } } */ -__attribute__((target("avx10.2-256"))) +__attribute__((target("avx10.2"))) int foo (int b, int x) { return (__bf16) b < x; @@ -14,7 +14,7 @@ int foo2 (int b, int x) return (__bf16) b < x; } -__attribute__((target("avx10.2-256"))) +__attribute__((target("avx10.2"))) int foo3 (__bf16 b, __bf16 x) { return (__bf16) b < x; diff --git a/gcc/testsuite/gcc.target/i386/pr117946.c b/gcc/testsuite/gcc.target/i386/pr117946.c index e7b660b..b46921c 100644 --- a/gcc/testsuite/gcc.target/i386/pr117946.c +++ b/gcc/testsuite/gcc.target/i386/pr117946.c @@ -1,5 +1,7 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O -favoid-store-forwarding -mavx10.1-256 -mprefer-avx128 --param=store-forwarding-max-distance=128 -Wno-psabi" } */ +/* { dg-require-effective-target dfp } */ +/* { dg-options "-O -favoid-store-forwarding -mavx10.1 -mprefer-avx128 --param=store-forwarding-max-distance=128 -Wno-psabi" } */ +/* { dg-warning "'-mavx10.1' is aliased to 512 bit since GCC14.3 and GCC15.1 while '-mavx10.1-256' and '-mavx10.1-512' will be deprecated in GCC 16 due to all machines 512 bit vector size supported" "" { target *-*-* } 0 } */ typedef __attribute__((__vector_size__ (64))) _Decimal32 V; void diff --git a/gcc/testsuite/gcc.target/i386/pr118017.c b/gcc/testsuite/gcc.target/i386/pr118017.c index 28797a0..831ec6e 100644 --- a/gcc/testsuite/gcc.target/i386/pr118017.c +++ b/gcc/testsuite/gcc.target/i386/pr118017.c @@ -1,5 +1,7 @@ /* PR target/118017 */ -/* { dg-do compile { target int128 } } */ +/* { dg-do compile } */ +/* { dg-require-effective-target int128 } */ +/* { dg-require-effective-target dfp } */ /* { dg-options "-Og -frounding-math -mno-80387 -mno-mmx -Wno-psabi" } */ typedef __attribute__((__vector_size__ (64))) _Float128 F; diff --git a/gcc/testsuite/gcc.target/i386/pr118815.c b/gcc/testsuite/gcc.target/i386/pr118815.c index 84308fc..7de20d4 100644 --- a/gcc/testsuite/gcc.target/i386/pr118815.c +++ b/gcc/testsuite/gcc.target/i386/pr118815.c @@ -2,7 +2,7 @@ /* { dg-options "-O2 -march=x86-64-v3" } */ #pragma GCC push_options -#pragma GCC target("avx10.2-256") +#pragma GCC target("avx10.2") void foo(); diff --git a/gcc/testsuite/gcc.target/i386/pr119425.c b/gcc/testsuite/gcc.target/i386/pr119425.c new file mode 100644 index 0000000..b926979 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119425.c @@ -0,0 +1,37 @@ +/* PR target/119425 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-Os -fno-vect-cost-model -ftree-slp-vectorize -mavxneconvert -mapxf" } */ +extern long K512[]; +extern long sha512_block_data_order_ctx[]; + +#define Ch(x, y, z) ~x &z +#define ROUND_00_15(i, a, b, c, d, e, f, g, h) \ + T1 += ~e & g + K512[i]; \ +h = 0; \ +d += h += T1 +#define ROUND_16_80(i, j, a, b, c, d, e, f, g, h, X) \ + ROUND_00_15(i + j, , , , d, e, , g, h) + +unsigned sha512_block_data_order_f, sha512_block_data_order_g; + +void +sha512_block_data_order() +{ + unsigned a, b, c, d, e, h, T1; + int i = 6; + for (; i < 80; i += 6) { + ROUND_16_80(i, 0, , , , d, e, , , h, ); + ROUND_16_80(i, 11, , , , a, b, , d, e, ); + ROUND_16_80(i, 12, , , , h, a, , c, d, ); + ROUND_16_80(i, 13, , , , sha512_block_data_order_g, h, , b, c, ); + ROUND_16_80(i, 14, , , , sha512_block_data_order_f, + sha512_block_data_order_g, , a, b, ); + ROUND_16_80(i, 15, , , , e, sha512_block_data_order_f, , , a, ); + + } + sha512_block_data_order_ctx[0] += a; + sha512_block_data_order_ctx[1] += b; + sha512_block_data_order_ctx[2] += c; + sha512_block_data_order_ctx[3] += d; + +} diff --git a/gcc/testsuite/gcc.target/i386/pr119450.c b/gcc/testsuite/gcc.target/i386/pr119450.c new file mode 100644 index 0000000..fa4bbda --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119450.c @@ -0,0 +1,15 @@ +/* PR target/119450 */ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +long *a; +int b; + +void +foo (void) +{ + unsigned d = b >> 30; + a = (long *) (__UINTPTR_TYPE__) d; + if (*a & 1 << 30) + *a = 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr55583.c b/gcc/testsuite/gcc.target/i386/pr55583.c index ea6a2d5..8773451 100644 --- a/gcc/testsuite/gcc.target/i386/pr55583.c +++ b/gcc/testsuite/gcc.target/i386/pr55583.c @@ -1,9 +1,8 @@ /* { dg-do compile } */ /* { dg-options "-O2 -Wno-shift-count-overflow" } */ -/* { dg-final { scan-assembler-times {(?n)shrd[ql]?[\t ]*\$2} 4 { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler-times {(?n)shrdl?[\t ]*\$2} 2 { target ia32 } } } */ -/* { dg-final { scan-assembler-times {(?n)shldl?[\t ]*\$2} 1 { target ia32 } } } */ -/* { dg-final { scan-assembler-times {(?n)shld[ql]?[\t ]*\$2} 2 { target { ! ia32 } } } } */ +/* { dg-additional-options "-mno-sse -mno-mmx" { target ia32 } } */ +/* { dg-final { scan-assembler-times {(?n)shrd[ql]?[\t ]*\$2} 4 } } */ +/* { dg-final { scan-assembler-times {(?n)shld[ql]?[\t ]*\$2} 2 } } */ typedef unsigned long long u64; typedef unsigned int u32; diff --git a/gcc/testsuite/gcc.target/i386/sm4-avx10_2-1.c b/gcc/testsuite/gcc.target/i386/sm4-avx10_2-1.c index 4f5733c..4746f6f 100644 --- a/gcc/testsuite/gcc.target/i386/sm4-avx10_2-1.c +++ b/gcc/testsuite/gcc.target/i386/sm4-avx10_2-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2-256" } */ +/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2" } */ #include <immintrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sm4-avx10_2-512-1.c b/gcc/testsuite/gcc.target/i386/sm4-avx10_2-512-1.c index 546472a..e7f7934 100644 --- a/gcc/testsuite/gcc.target/i386/sm4-avx10_2-512-1.c +++ b/gcc/testsuite/gcc.target/i386/sm4-avx10_2-512-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2-512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2" } */ /* { dg-final { scan-assembler "vsm4key4\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]" } } */ /* { dg-final { scan-assembler "vsm4rnds4\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]+\[^\n\]*%zmm\[0-9\]" } } */ diff --git a/gcc/testsuite/gcc.target/i386/sm4-check.h b/gcc/testsuite/gcc.target/i386/sm4-check.h index 7fc431d..76c16db 100644 --- a/gcc/testsuite/gcc.target/i386/sm4-check.h +++ b/gcc/testsuite/gcc.target/i386/sm4-check.h @@ -194,10 +194,7 @@ main () /* Check CPU support for SM4. */ if (__builtin_cpu_supports ("sm4") #ifdef AVX10_2 - && __builtin_cpu_supports ("avx10.2-256") -#endif -#ifdef AVX10_2_512 - && __builtin_cpu_supports ("avx10.2-512") + && __builtin_cpu_supports ("avx10.2") #endif ) { diff --git a/gcc/testsuite/gcc.target/i386/sm4key4-avx10_2-512-2.c b/gcc/testsuite/gcc.target/i386/sm4key4-avx10_2-512-2.c index 85b7e3e..1c8b2c3 100644 --- a/gcc/testsuite/gcc.target/i386/sm4key4-avx10_2-512-2.c +++ b/gcc/testsuite/gcc.target/i386/sm4key4-avx10_2-512-2.c @@ -1,7 +1,7 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2-512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2" } */ /* { dg-require-effective-target sm4 } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_2_512 diff --git a/gcc/testsuite/gcc.target/i386/sm4rnds4-avx10_2-512-2.c b/gcc/testsuite/gcc.target/i386/sm4rnds4-avx10_2-512-2.c index 1eaf08b..5418a53 100644 --- a/gcc/testsuite/gcc.target/i386/sm4rnds4-avx10_2-512-2.c +++ b/gcc/testsuite/gcc.target/i386/sm4rnds4-avx10_2-512-2.c @@ -1,7 +1,7 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2-512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -msm4 -mavx10.2" } */ /* { dg-require-effective-target sm4 } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-require-effective-target avx10_2 } */ #define AVX10_2 #define AVX10_2_512 diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c index c9907fc..cabccb0 100644 --- a/gcc/testsuite/gcc.target/i386/sse-12.c +++ b/gcc/testsuite/gcc.target/i386/sse-12.c @@ -3,7 +3,7 @@ popcntintrin.h gfniintrin.h and mm_malloc.h are usable with -O -std=c89 -pedantic-errors. */ /* { dg-do compile } */ -/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mamx-fp16 -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2-512 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ +/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mamx-fp16 -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c index 2418773..3132eca 100644 --- a/gcc/testsuite/gcc.target/i386/sse-13.c +++ b/gcc/testsuite/gcc.target/i386/sse-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2-512 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ /* { dg-add-options bind_pic_locally } */ #include <mm_malloc.h> @@ -849,167 +849,6 @@ /* sm3intrin.h */ #define __builtin_ia32_vsm3rnds2(A, B, C, D) __builtin_ia32_vsm3rnds2 (A, B, C, 1) -/* avx10_2roundingintrin.h */ -#define __builtin_ia32_addpd256_mask_round(A, B, C, D, E) __builtin_ia32_addpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addph256_mask_round(A, B, C, D, E) __builtin_ia32_addph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addps256_mask_round(A, B, C, D, E) __builtin_ia32_addps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_cmppd256_mask_round(A, B, C, D, E) __builtin_ia32_cmppd256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpph256_mask_round(A, B, C, D, E) __builtin_ia32_cmpph256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpps256_mask_round(A, B, C, D, E) __builtin_ia32_cmpps256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E) __builtin_ia32_divpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divph256_mask_round(A, B, C, D, E) __builtin_ia32_divph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divps256_mask_round(A, B, C, D, E) __builtin_ia32_divps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfcmaddcph256_round(A, B, C, D) __builtin_ia32_vfcmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfcmulcph256_round(A, B, C) __builtin_ia32_vfcmulcph256_round(A, B, 8) -#define __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_fixupimmpd256_mask_round(A, B, C, D, E, F) __builtin_ia32_fixupimmpd256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, D, E, F) __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_mask_round(A, B, C, D, E, F) __builtin_ia32_fixupimmps256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_maskz_round(A, B, C, D, E, F) __builtin_ia32_fixupimmps256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddcph256_round(A, B, C, D) __builtin_ia32_vfmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmulcph256_round(A, B, C) __builtin_ia32_vfmulcph256_round(A, B, 8) -#define __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_getexppd256_mask_round(A, B, C, D) __builtin_ia32_getexppd256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpph256_mask_round(A, B, C, D) __builtin_ia32_getexpph256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpps256_mask_round(A, B, C, D) __builtin_ia32_getexpps256_mask_round(A, B, C, 8) -#define __builtin_ia32_getmantpd256_mask_round(A, F, C, D, E) __builtin_ia32_getmantpd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantph256_mask_round(A, F, C, D, E) __builtin_ia32_getmantph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantps256_mask_round(A, F, C, D, E) __builtin_ia32_getmantps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_maxpd256_mask_round(A, B, C, D, E) __builtin_ia32_maxpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxph256_mask_round(A, B, C, D, E) __builtin_ia32_maxph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxps256_mask_round(A, B, C, D, E) __builtin_ia32_maxps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minpd256_mask_round(A, B, C, D, E) __builtin_ia32_minpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minph256_mask_round(A, B, C, D, E) __builtin_ia32_minph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minps256_mask_round(A, B, C, D, E) __builtin_ia32_minps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulpd256_mask_round(A, B, C, D, E) __builtin_ia32_mulpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulph256_mask_round(A, B, C, D, E) __builtin_ia32_mulph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulps256_mask_round(A, B, C, D, E) __builtin_ia32_mulps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_rangeps256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangeps256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_rangepd256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangepd256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_reducepd256_mask_round(A, B, C, D, E) __builtin_ia32_reducepd256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceph256_mask_round(A, B, C, D, E) __builtin_ia32_reduceph256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceps256_mask_round(A, B, C, D, E) __builtin_ia32_reduceps256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_rndscalepd256_mask_round(A, B, C, D, E) __builtin_ia32_rndscalepd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleph256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleps256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_scalefpd256_mask_round(A, B, C, D, E) __builtin_ia32_scalefpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefph256_mask_round(A, B, C, D, E) __builtin_ia32_scalefph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefps256_mask_round(A, B, C, D, E) __builtin_ia32_scalefps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) __builtin_ia32_sqrtps256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtpd256_mask_round(A, B, C, D) __builtin_ia32_sqrtpd256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtph256_mask_round(A, B, C, D) __builtin_ia32_sqrtph256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) __builtin_ia32_sqrtps256_mask_round(A, B, C, 8) -#define __builtin_ia32_subpd256_mask_round(A, B, C, D, E) __builtin_ia32_subpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subph256_mask_round(A, B, C, D, E) __builtin_ia32_subph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subps256_mask_round(A, B, C, D, E) __builtin_ia32_subps256_mask_round(A, B, C, D, 8) - /* avx10_2-512mediaintrin.h */ #define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1) #define __builtin_ia32_mpsadbw512_mask(A, B, C, D, E) __builtin_ia32_mpsadbw512_mask (A, B, 1, D, E) @@ -1018,9 +857,6 @@ #define __builtin_ia32_mpsadbw128_mask(A, B, C, D, E) __builtin_ia32_mpsadbw128_mask (A, B, 1, D, E) #define __builtin_ia32_mpsadbw256_mask(A, B, C, D, E) __builtin_ia32_mpsadbw256_mask (A, B, 1, D, E) -/* avx10_2convertintrin.h */ -#define __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, 8) - /* avx10_2-512convertintrin.h */ #define __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, 8) @@ -1062,22 +898,6 @@ #define __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, 8) /* avx10_2satcvtintrin.h */ -#define __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, 8) #define __builtin_ia32_cvttsd2sis32_round(A, B) __builtin_ia32_cvttsd2sis32_round(A, 8) #define __builtin_ia32_cvttsd2usis32_round(A, B) __builtin_ia32_cvttsd2usis32_round(A, 8) #define __builtin_ia32_cvttss2sis32_round(A, B) __builtin_ia32_cvttss2sis32_round(A, 8) @@ -1102,10 +922,10 @@ #define __builtin_ia32_minmaxbf16128_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16128_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxbf16256_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxpd128_mask(A, B, C, D, E) __builtin_ia32_minmaxpd128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxpd256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxpd256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxpd256_mask(A, B, C, D, E) __builtin_ia32_minmaxpd256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxph128_mask(A, B, C, D, E) __builtin_ia32_minmaxph128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxph256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxph256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxph256_mask(A, B, C, D, E) __builtin_ia32_minmaxph256_mask (A, B, 4, D, E) #define __builtin_ia32_minmaxps128_mask(A, B, C, D, E) __builtin_ia32_minmaxps128_mask (A, B, 4, D, E) -#define __builtin_ia32_minmaxps256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxps256_mask_round (A, B, 4, D, E, 4) +#define __builtin_ia32_minmaxps256_mask(A, B, C, D, E) __builtin_ia32_minmaxps256_mask (A, B, 4, D, E) #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c index 1afe408..8ae41c1 100644 --- a/gcc/testsuite/gcc.target/i386/sse-14.c +++ b/gcc/testsuite/gcc.target/i386/sse-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mamx-fp16 -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2-512 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ +/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx-tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma -mavxvnniint8 -mavxneconvert -mamx-fp16 -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mavx10.2 -mamx-avx512 -mamx-tf32 -mamx-transpose -mamx-fp8 -mmovrs -mamx-movrs" } */ /* { dg-add-options bind_pic_locally } */ #include <mm_malloc.h> @@ -1020,358 +1020,6 @@ test_2 (_mm512_gf2p8affine_epi64_epi8, __m512i, __m512i, __m512i, 1) /* sm3intrin.h */ test_3 (_mm_sm3rnds2_epi32, __m128i, __m128i, __m128i, __m128i, 1) -/* avx10_2roundingintrin.h */ -test_1 (_mm256_cvt_roundepi32_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepi32_ps, __m256, __m256i, 9) -test_1 (_mm256_cvt_roundpd_ph, __m128h, __m256d, 8) -test_1 (_mm256_cvt_roundpd_ps, __m128, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epi32, __m128i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epi64, __m256i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epu32, __m128i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epu64, __m256i, __m256d, 9) -test_1 (_mm256_cvt_roundph_epi32, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_pd, __m256d, __m128h, 8) -test_1 (_mm256_cvt_roundph_ps, __m256, __m128i, 8) -test_1 (_mm256_cvtx_roundph_ps, __m256, __m128h, 8) -test_1 (_mm256_cvt_roundph_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu16, __m256i, __m256h, 8) -test_1 (_mm256_cvt_roundph_epi16, __m256i, __m256h, 8) -test_1 (_mm256_cvt_roundps_pd, __m256d, __m128, 8) -test_1 (_mm256_cvtx_roundps_ph, __m128h, __m256, 8) -test_1 (_mm256_cvt_roundps_epi32, __m256i, __m256, 9) -test_1 (_mm256_cvt_roundps_epu32, __m256i, __m256, 9) -test_1 (_mm256_cvt_roundps_epi64, __m256i, __m128, 8) -test_1 (_mm256_cvt_roundps_epu64, __m256i, __m128, 8) -test_1 (_mm256_cvt_roundepi64_pd, __m256d, __m256i, 8) -test_1 (_mm256_cvt_roundepi64_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepi64_ps, __m128, __m256i, 8) -test_1 (_mm256_cvtt_roundpd_epi32, __m128i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epi64, __m256i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epu32, __m128i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epu64, __m256i, __m256d, 8) -test_1 (_mm256_cvtt_roundph_epi32, __m256i, __m128d, 8) -test_1 (_mm256_cvtt_roundph_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundph_epu32, __m256i, __m128d, 8) -test_1 (_mm256_cvtt_roundph_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundph_epu16, __m256i, __m256h, 8) -test_1 (_mm256_cvtt_roundph_epi16, __m256i, __m256h, 8) -test_1 (_mm256_cvtt_roundps_epi32, __m256i, __m256, 8) -test_1 (_mm256_cvtt_roundps_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundps_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundepu32_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepu32_ps, __m256, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_pd, __m256d, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_ph, __m128h, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_ps, __m128, __m256i, 9) -test_1 (_mm256_cvt_roundepu16_ph, __m256h, __m256i, 8) -test_1 (_mm256_cvt_roundepi16_ph, __m256h, __m256i, 8) -test_1 (_mm256_getexp_round_pd, __m256d, __m256d, 8) -test_1 (_mm256_getexp_round_ph, __m256h, __m256h, 8) -test_1 (_mm256_getexp_round_ps, __m256, __m256, 8) -test_1 (_mm256_sqrt_round_pd, __m256d, __m256d, 9) -test_1 (_mm256_sqrt_round_ph, __m256h, __m256h, 9) -test_1 (_mm256_sqrt_round_ps, __m256, __m256, 9) -test_1x (_mm256_reduce_round_ph, __m256h, __m256h, 123, 8) -test_1x (_mm256_reduce_round_ps, __m256, __m256, 123, 8) -test_1x (_mm256_reduce_round_pd, __m256d, __m256d, 123, 8) -test_1x (_mm256_roundscale_round_ph, __m256h, __m256h, 123, 8) -test_1x (_mm256_roundscale_round_ps, __m256, __m256, 123, 8) -test_1x (_mm256_roundscale_round_pd, __m256d, __m256d, 123, 8) -test_1y (_mm256_getmant_round_ph, __m256h, __m256h, 1, 1, 8) -test_1y (_mm256_getmant_round_ps, __m256, __m256, 1, 1, 8) -test_1y (_mm256_getmant_round_pd, __m256d, __m256d, 1, 1, 8) -test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_maskz_cvt_roundepi32_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi32_ps, __m256, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundpd_ph, __m128h, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvt_roundpd_ps, __m128, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epi32, __m128i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epi64, __m256i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epu32, __m128i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epu64, __m256i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundph_epi32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_pd, __m256d, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_ps, __m256, __mmask8, __m128i, 8) -test_2 (_mm256_maskz_cvtx_roundph_ps, __m256, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvt_roundph_epi16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvt_roundps_pd, __m256d, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvtx_roundps_ph, __m128h, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvt_roundps_epi32, __m256i, __mmask8, __m256, 9) -test_2 (_mm256_maskz_cvt_roundps_epu32, __m256i, __mmask8, __m256, 9) -test_2 (_mm256_maskz_cvt_roundps_epi64, __m256i, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvt_roundps_epu64, __m256i, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvt_roundepi64_pd, __m256d, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi64_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi64_ps, __m128, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epi32, __m128i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epi64, __m256i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epu32, __m128i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epu64, __m256i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvtt_roundps_epi32, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvtt_roundps_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundps_epu32, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvtt_roundps_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundepu32_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepu32_ps, __m256, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu64_pd, __m256d, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu64_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepu64_ps, __m128, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu16_ph, __m256h, __mmask16, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi16_ph, __m256h, __mmask16, __m256i, 8) -test_2 (_mm256_div_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_div_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_div_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_fcmul_round_pch, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_maskz_getexp_round_pd, __m256d, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_getexp_round_ph, __m256h, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_getexp_round_ps, __m256, __mmask8, __m256, 8) -test_2 (_mm256_max_round_pd, __m256d, __m256d, __m256d, 8) -test_2 (_mm256_max_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_max_round_ps, __m256, __m256, __m256, 8) -test_2 (_mm256_min_round_pd, __m256d, __m256d, __m256d, 8) -test_2 (_mm256_min_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_min_round_ps, __m256, __m256, __m256, 8) -test_2 (_mm256_mul_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_mul_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_mul_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_scalef_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_scalef_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_scalef_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_maskz_sqrt_round_pd, __m256d, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_sqrt_round_ph, __m256h, __mmask16, __m256h, 9) -test_2 (_mm256_maskz_sqrt_round_ps, __m256, __mmask8, __m256, 9) -test_2 (_mm256_sub_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_sub_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_sub_round_ps, __m256, __m256, __m256, 9) -test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8) -test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8) -test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8) -test_2x (_mm256_range_round_pd, __m256d, __m256d, __m256d, 15, 8) -test_2x (_mm256_range_round_ps, __m256, __m256, __m256, 15, 8) -test_2x (_mm256_maskz_reduce_round_pd, __m256d, __mmask8, __m256d, 123, 8) -test_2x (_mm256_maskz_reduce_round_ph, __m256h, __mmask8, __m256h, 123, 8) -test_2x (_mm256_maskz_reduce_round_ps, __m256, __mmask16, __m256, 123, 8) -test_2x (_mm256_maskz_roundscale_round_pd, __m256d, __mmask8, __m256d, 123, 8) -test_2x (_mm256_maskz_roundscale_round_ph, __m256h, __mmask8, __m256h, 123, 8) -test_2x (_mm256_maskz_roundscale_round_ps, __m256, __mmask16, __m256, 123, 8) -test_2y (_mm256_maskz_getmant_round_pd, __m256d, __mmask8, __m256d, 1, 1, 8) -test_2y (_mm256_maskz_getmant_round_ph, __m256h, __mmask16, __m256h, 1, 1, 8) -test_2y (_mm256_maskz_getmant_round_ps, __m256, __mmask8, __m256, 1, 1, 8) -test_3 (_mm256_maskz_add_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_add_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_add_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_mask_cvt_roundepi32_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi32_ps, __m256, __m256, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundpd_ph, __m128h, __m128h, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvt_roundpd_ps, __m128, __m128, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundph_epi32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_pd, __m256d, __m256d, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_ps, __m256, __m256, __mmask8, __m128i, 8) -test_3 (_mm256_mask_cvtx_roundph_ps, __m256, __m256, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvt_roundph_epi16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvt_roundps_pd, __m256d, __m256d, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtx_roundps_ph, __m128h, __m128h, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvt_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 9) -test_3 (_mm256_mask_cvt_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 9) -test_3 (_mm256_mask_cvt_roundps_epi64, __m256i, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvt_roundps_epu64, __m256i, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvt_roundepi64_pd, __m256d, __m256d, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi64_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi64_ps, __m128, __m128, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvtt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundph_epi32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvtt_roundph_epi16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvtt_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtt_roundps_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtt_roundps_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundepu32_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepu32_ps, __m256, __m256, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu64_pd, __m256d, __m256d, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu64_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepu64_ps, __m128, __m128, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu16_ph, __m256h, __m256h, __mmask16, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi16_ph, __m256h, __m256h, __mmask16, __m256i, 8) -test_3 (_mm256_maskz_div_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_div_round_ph, __m256h, __mmask8, __m256h, __m256h, 9) -test_3 (_mm256_maskz_div_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8) -test_3 (_mm256_maskz_fcmul_round_pch, __m256h, __mmask8, __m256h, __m256h, 8) -test_3 (_mm256_fmadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8) -test_3 (_mm256_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmaddsub_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fmsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmsub_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fmsubadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmsubadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmsubadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_maskz_fmul_round_pch, __m256h, __mmask8, __m256h, __m256h, 8) -test_3 (_mm256_fnmadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fnmadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fnmadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fnmsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fnmsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fnmsub_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_mask_getexp_round_pd, __m256d, __m256d, __mmask8, __m256d, 8) -test_3 (_mm256_mask_getexp_round_ph, __m256h, __m256h, __mmask16, __m256h, 8) -test_3 (_mm256_mask_getexp_round_ps, __m256, __m256, __mmask8, __m256, 8) -test_3 (_mm256_maskz_max_round_pd, __m256d, __mmask8, __m256d, __m256d, 8) -test_3 (_mm256_maskz_max_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_max_round_ps, __m256, __mmask8, __m256, __m256, 8) -test_3 (_mm256_maskz_min_round_pd, __m256d, __mmask8, __m256d, __m256d, 8) -test_3 (_mm256_maskz_min_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_min_round_ps, __m256, __mmask8, __m256, __m256, 8) -test_3 (_mm256_maskz_mul_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_mul_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_mul_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_maskz_scalef_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_scalef_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_scalef_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_mask_sqrt_round_pd, __m256d, __m256d, __mmask8, __m256d, 9) -test_3 (_mm256_mask_sqrt_round_ph, __m256h, __m256h, __mmask16, __m256h, 9) -test_3 (_mm256_mask_sqrt_round_ps, __m256, __m256, __mmask8, __m256, 9) -test_3 (_mm256_maskz_sub_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_sub_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_sub_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8) -test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8) -test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8) -test_3x (_mm256_fixupimm_round_pd, __m256d, __m256d, __m256d, __m256i, 3, 8) -test_3x (_mm256_fixupimm_round_ps, __m256, __m256, __m256, __m256i, 3, 8) -test_3x (_mm256_maskz_range_round_pd, __m256d, __mmask8, __m256d, __m256d, 15, 8) -test_3x (_mm256_maskz_range_round_ps, __m256, __mmask8, __m256, __m256, 15, 8) -test_3x (_mm256_mask_reduce_round_ph, __m256h, __m256h, __mmask8, __m256h, 123, 8) -test_3x (_mm256_mask_reduce_round_ps, __m256, __m256, __mmask16, __m256, 123, 8) -test_3x (_mm256_mask_reduce_round_pd, __m256d, __m256d, __mmask8, __m256d, 123, 8) -test_3x (_mm256_mask_roundscale_round_ph, __m256h, __m256h, __mmask8, __m256h, 123, 8) -test_3x (_mm256_mask_roundscale_round_ps, __m256, __m256, __mmask16, __m256, 123, 8) -test_3x (_mm256_mask_roundscale_round_pd, __m256d, __m256d, __mmask8, __m256d, 123, 8) -test_3y (_mm256_mask_getmant_round_pd, __m256d, __m256d, __mmask8, __m256d, 1, 1, 8) -test_3y (_mm256_mask_getmant_round_ph, __m256h, __m256h, __mmask16, __m256h, 1, 1, 8) -test_3y (_mm256_mask_getmant_round_ps, __m256, __m256, __mmask8, __m256, 1, 1, 8) -test_4 (_mm256_mask_add_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_add_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_add_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_div_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_div_round_ph, __m256h, __m256h, __mmask8, __m256h, __m256h, 9) -test_4 (_mm256_mask_div_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_fcmadd_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h, __mmask8, 9) -test_4 (_mm256_maskz_fcmadd_round_pch, __m256h, __mmask8, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fcmul_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask_fmadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmadd_round_pd, __m256d, __mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmadd_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask3_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, __mmask8, 8) -test_4 (_mm256_maskz_fmadd_round_pch, __m256h, __mmask8, __m256h, __m256h, __m256h, 8) -test_4 (_mm256_mask_fmaddsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmaddsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmaddsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmaddsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmaddsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmaddsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmaddsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmsubadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmsubadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmsubadd_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmsubadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmsubadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmsubadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmsubadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmsubadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmsubadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmul_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask_fnmadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fnmadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fnmadd_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fnmadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fnmadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fnmadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fnmadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fnmadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fnmadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fnmsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fnmsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fnmsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fnmsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fnmsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fnmsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fnmsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fnmsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fnmsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_max_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 8) -test_4 (_mm256_mask_max_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_max_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8) -test_4 (_mm256_mask_min_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 8) -test_4 (_mm256_mask_min_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_min_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8) -test_4 (_mm256_mask_mul_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_mul_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_mul_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_scalef_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_scalef_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_scalef_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_sub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_sub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_sub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d, __m256i, 3, 8) -test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256, __m256i, 3, 8) -test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256i, 3, 8) -test_4x (_mm256_mask_fixupimm_round_ps, __m256, __m256, __mmask8, __m256, __m256i, 3, 8) -test_4x (_mm256_mask_range_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 15, 8) -test_4x (_mm256_mask_range_round_ps, __m256, __m256, __mmask8, __m256, __m256, 15, 8) - /* avx10_2-512mediaintrin.h */ test_2 (_mm512_mpsadbw_epu8, __m512i, __m512i, __m512i, 1) test_3 (_mm512_maskz_mpsadbw_epu8, __m512i, __mmask32, __m512i, __m512i, 1) @@ -1383,9 +1031,6 @@ test_3 (_mm256_maskz_mpsadbw_epu8, __m256i, __mmask16, __m256i, __m256i, 1) test_4 (_mm_mask_mpsadbw_epu8, __m128i, __m128i, __mmask8, __m128i, __m128i, 1) test_4 (_mm256_mask_mpsadbw_epu8, __m256i, __m256i, __mmask16, __m256i, __m256i, 1) -/* avx10_2convertintrin */ -test_2 (_mm256_cvtx_round2ps_ph, __m256h, __m256, __m256, 4) - /* avx10_2-512convertintrin.h */ test_2 (_mm512_cvtx_round2ps_ph, __m512h, __m512, __m512, 4) @@ -1483,54 +1128,6 @@ test_2 (_mm512_maskz_cvtts_roundps_epu64, __m512i, __mmask8, __m256, 8) test_3 (_mm512_mask_cvtts_roundps_epu64, __m512i, __m512i, __mmask8, __m256, 8) /* avx10_2satcvtintrin.h */ -test_1 (_mm256_ipcvts_roundph_epi8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvts_roundph_epu8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvts_roundps_epi8, __m256i, __m256, 8) -test_1 (_mm256_ipcvts_roundps_epu8, __m256i, __m256, 8) -test_1 (_mm256_ipcvtts_roundph_epi8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvtts_roundph_epu8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvtts_roundps_epi8, __m256i, __m256, 8) -test_1 (_mm256_ipcvtts_roundps_epu8, __m256i, __m256, 8) -test_2 (_mm256_maskz_ipcvts_roundph_epi8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvts_roundph_epu8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvts_roundps_epi8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvts_roundps_epu8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvtts_roundph_epi8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvtts_roundph_epu8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvtts_roundps_epi8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvtts_roundps_epu8, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvts_roundph_epi8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvts_roundph_epu8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvts_roundps_epi8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvts_roundps_epu8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvtts_roundph_epi8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvtts_roundph_epu8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvtts_roundps_epi8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvtts_roundps_epu8, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundpd_epi32, __m128i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epi32, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epi64, __m256i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epi64, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epu32, __m128i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epu32, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epu64, __m256i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epu64, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundps_epi32, __m256i, __m256, 8) -test_2 (_mm256_maskz_cvtts_roundps_epi32, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtts_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundps_epi64, __m256i, __m128, 8) -test_2 (_mm256_maskz_cvtts_roundps_epi64, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtts_roundps_epi64, __m256i, __m256i, __mmask8, __m128, 8) -test_1 (_mm256_cvtts_roundps_epu32, __m256i, __m256, 8) -test_2 (_mm256_maskz_cvtts_roundps_epu32, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtts_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundps_epu64, __m256i, __m128, 8) -test_2 (_mm256_maskz_cvtts_roundps_epu64, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtts_roundps_epu64, __m256i, __m256i, __mmask8, __m128, 8) test_1 (_mm_cvtts_roundsd_epi32, int, __m128d, 8) test_1 (_mm_cvtts_roundsd_epu32, unsigned int, __m128d, 8) test_1 (_mm_cvtts_roundss_epi32, int, __m128, 8) @@ -1569,15 +1166,6 @@ test_4 (_mm512_mask_minmax_ph, __m512h, __m512h, __mmask32, __m512h, __m512h, 10 test_2 (_mm256_minmax_pbh, __m256bh, __m256bh, __m256bh, 100) test_3 (_mm256_maskz_minmax_pbh, __m256bh, __mmask16, __m256bh, __m256bh, 100) test_4 (_mm256_mask_minmax_pbh, __m256bh, __m256bh, __mmask16, __m256bh, __m256bh, 100) -test_2x (_mm256_minmax_round_pd, __m256d, __m256d, __m256d, 100, 4) -test_3x (_mm256_maskz_minmax_round_pd, __m256d, __mmask8, __m256d, __m256d, 100, 4) -test_4x (_mm256_mask_minmax_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 100, 4) -test_2x (_mm256_minmax_round_ps, __m256, __m256, __m256, 100, 4) -test_3x (_mm256_maskz_minmax_round_ps, __m256, __mmask8, __m256, __m256, 100, 4) -test_4x (_mm256_mask_minmax_round_ps, __m256, __m256, __mmask8, __m256, __m256, 100, 4) -test_2x (_mm256_minmax_round_ph, __m256h, __m256h, __m256h, 100, 4) -test_3x (_mm256_maskz_minmax_round_ph, __m256h, __mmask16, __m256h, __m256h, 100, 4) -test_4x (_mm256_mask_minmax_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 100, 4) test_2 (_mm256_minmax_pd, __m256d, __m256d, __m256d, 100) test_3 (_mm256_maskz_minmax_pd, __m256d, __mmask8, __m256d, __m256d, 100) test_4 (_mm256_mask_minmax_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 100) diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c index 2da3d05..16b059e 100644 --- a/gcc/testsuite/gcc.target/i386/sse-22.c +++ b/gcc/testsuite/gcc.target/i386/sse-22.c @@ -103,7 +103,7 @@ #ifndef DIFFERENT_PRAGMAS -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,gfni,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,amx-fp16,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2-512,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,gfni,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,amx-fp16,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") #endif /* Following intrinsics require immediate arguments. They @@ -220,7 +220,7 @@ test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1) /* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */ #ifdef DIFFERENT_PRAGMAS -#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,sha,gfni,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,amx-fp16,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2-512,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") +#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,sha,gfni,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,amx-fp16,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") #endif #include <immintrin.h> test_1 (_cvtss_sh, unsigned short, float, 1) @@ -1061,356 +1061,6 @@ test_1 ( __bextri_u64, unsigned long long, unsigned long long, 1) /* sm3intrin.h */ test_3 (_mm_sm3rnds2_epi32, __m128i, __m128i, __m128i, __m128i, 1) -/* avx10_2roundingintrin.h */ -test_1 (_mm256_cvt_roundepi32_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepi32_ps, __m256, __m256i, 9) -test_1 (_mm256_cvt_roundpd_ph, __m128h, __m256d, 8) -test_1 (_mm256_cvt_roundpd_ps, __m128, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epi32, __m128i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epi64, __m256i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epu32, __m128i, __m256d, 9) -test_1 (_mm256_cvt_roundpd_epu64, __m256i, __m256d, 9) -test_1 (_mm256_cvt_roundph_epi32, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_pd, __m256d, __m128h, 8) -test_1 (_mm256_cvt_roundph_ps, __m256, __m128i, 8) -test_1 (_mm256_cvtx_roundph_ps, __m256, __m128h, 8) -test_1 (_mm256_cvt_roundph_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu32, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundph_epu16, __m256i, __m256h, 8) -test_1 (_mm256_cvt_roundph_epi16, __m256i, __m256h, 8) -test_1 (_mm256_cvt_roundps_pd, __m256d, __m128, 8) -test_1 (_mm256_cvtx_roundps_ph, __m128h, __m256, 8) -test_1 (_mm256_cvt_roundps_epi32, __m256i, __m256, 9) -test_1 (_mm256_cvt_roundps_epu32, __m256i, __m256, 9) -test_1 (_mm256_cvt_roundps_epi64, __m256i, __m128, 8) -test_1 (_mm256_cvt_roundps_epu64, __m256i, __m128, 8) -test_1 (_mm256_cvt_roundepi64_pd, __m256d, __m256i, 8) -test_1 (_mm256_cvt_roundepi64_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepi64_ps, __m128, __m256i, 8) -test_1 (_mm256_cvtt_roundpd_epi32, __m128i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epi64, __m256i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epu32, __m128i, __m256d, 8) -test_1 (_mm256_cvtt_roundpd_epu64, __m256i, __m256d, 8) -test_1 (_mm256_cvtt_roundph_epi32, __m256i, __m128d, 8) -test_1 (_mm256_cvtt_roundph_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundph_epu32, __m256i, __m128d, 8) -test_1 (_mm256_cvtt_roundph_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundph_epu16, __m256i, __m256h, 8) -test_1 (_mm256_cvtt_roundph_epi16, __m256i, __m256h, 8) -test_1 (_mm256_cvtt_roundps_epi32, __m256i, __m256, 8) -test_1 (_mm256_cvtt_roundps_epi64, __m256i, __m128h, 8) -test_1 (_mm256_cvtt_roundps_epu32, __m256i, __m256, 8) -test_1 (_mm256_cvtt_roundps_epu64, __m256i, __m128h, 8) -test_1 (_mm256_cvt_roundepu32_ph, __m128h, __m256i, 8) -test_1 (_mm256_cvt_roundepu32_ps, __m256, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_pd, __m256d, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_ph, __m128h, __m256i, 9) -test_1 (_mm256_cvt_roundepu64_ps, __m128, __m256i, 9) -test_1 (_mm256_cvt_roundepu16_ph, __m256h, __m256i, 8) -test_1 (_mm256_cvt_roundepi16_ph, __m256h, __m256i, 8) -test_1 (_mm256_getexp_round_pd, __m256d, __m256d, 8) -test_1 (_mm256_getexp_round_ph, __m256h, __m256h, 8) -test_1 (_mm256_getexp_round_ps, __m256, __m256, 8) -test_1 (_mm256_sqrt_round_pd, __m256d, __m256d, 9) -test_1 (_mm256_sqrt_round_ph, __m256h, __m256h, 9) -test_1 (_mm256_sqrt_round_ps, __m256, __m256, 9) -test_1x (_mm256_reduce_round_ph, __m256h, __m256h, 123, 8) -test_1x (_mm256_reduce_round_ps, __m256, __m256, 123, 8) -test_1x (_mm256_reduce_round_pd, __m256d, __m256d, 123, 8) -test_1x (_mm256_roundscale_round_ph, __m256h, __m256h, 123, 8) -test_1x (_mm256_roundscale_round_ps, __m256, __m256, 123, 8) -test_1x (_mm256_roundscale_round_pd, __m256d, __m256d, 123, 8) -test_1y (_mm256_getmant_round_ph, __m256h, __m256h, 1, 1, 8) -test_1y (_mm256_getmant_round_ps, __m256, __m256, 1, 1, 8) -test_1y (_mm256_getmant_round_pd, __m256d, __m256d, 1, 1, 8) -test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_maskz_cvt_roundepi32_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi32_ps, __m256, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundpd_ph, __m128h, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvt_roundpd_ps, __m128, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epi32, __m128i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epi64, __m256i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epu32, __m128i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundpd_epu64, __m256i, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_cvt_roundph_epi32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_pd, __m256d, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_ps, __m256, __mmask8, __m128i, 8) -test_2 (_mm256_maskz_cvtx_roundph_ps, __m256, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundph_epu16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvt_roundph_epi16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvt_roundps_pd, __m256d, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvtx_roundps_ph, __m128h, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvt_roundps_epi32, __m256i, __mmask8, __m256, 9) -test_2 (_mm256_maskz_cvt_roundps_epu32, __m256i, __mmask8, __m256, 9) -test_2 (_mm256_maskz_cvt_roundps_epi64, __m256i, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvt_roundps_epu64, __m256i, __mmask8, __m128, 8) -test_2 (_mm256_maskz_cvt_roundepi64_pd, __m256d, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi64_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi64_ps, __m128, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epi32, __m128i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epi64, __m256i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epu32, __m128i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundpd_epu64, __m256i, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu32, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epu16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvtt_roundph_epi16, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_cvtt_roundps_epi32, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvtt_roundps_epi64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvtt_roundps_epu32, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_cvtt_roundps_epu64, __m256i, __mmask8, __m128h, 8) -test_2 (_mm256_maskz_cvt_roundepu32_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepu32_ps, __m256, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu64_pd, __m256d, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu64_ph, __m128h, __mmask8, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepu64_ps, __m128, __mmask8, __m256i, 9) -test_2 (_mm256_maskz_cvt_roundepu16_ph, __m256h, __mmask16, __m256i, 8) -test_2 (_mm256_maskz_cvt_roundepi16_ph, __m256h, __mmask16, __m256i, 8) -test_2 (_mm256_div_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_div_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_div_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_fcmul_round_pch, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_maskz_getexp_round_pd, __m256d, __mmask8, __m256d, 8) -test_2 (_mm256_maskz_getexp_round_ph, __m256h, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_getexp_round_ps, __m256, __mmask8, __m256, 8) -test_2 (_mm256_max_round_pd, __m256d, __m256d, __m256d, 8) -test_2 (_mm256_max_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_max_round_ps, __m256, __m256, __m256, 8) -test_2 (_mm256_min_round_pd, __m256d, __m256d, __m256d, 8) -test_2 (_mm256_min_round_ph, __m256h, __m256h, __m256h, 8) -test_2 (_mm256_min_round_ps, __m256, __m256, __m256, 8) -test_2 (_mm256_mul_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_mul_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_mul_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_scalef_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_scalef_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_scalef_round_ps, __m256, __m256, __m256, 9) -test_2 (_mm256_maskz_sqrt_round_pd, __m256d, __mmask8, __m256d, 9) -test_2 (_mm256_maskz_sqrt_round_ph, __m256h, __mmask16, __m256h, 9) -test_2 (_mm256_maskz_sqrt_round_ps, __m256, __mmask8, __m256, 9) -test_2 (_mm256_sub_round_pd, __m256d, __m256d, __m256d, 9) -test_2 (_mm256_sub_round_ph, __m256h, __m256h, __m256h, 9) -test_2 (_mm256_sub_round_ps, __m256, __m256, __m256, 9) -test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8) -test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8) -test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8) -test_2x (_mm256_range_round_pd, __m256d, __m256d, __m256d, 15, 8) -test_2x (_mm256_range_round_ps, __m256, __m256, __m256, 15, 8) -test_2x (_mm256_maskz_reduce_round_pd, __m256d, __mmask8, __m256d, 123, 8) -test_2x (_mm256_maskz_reduce_round_ph, __m256h, __mmask8, __m256h, 123, 8) -test_2x (_mm256_maskz_reduce_round_ps, __m256, __mmask16, __m256, 123, 8) -test_2x (_mm256_maskz_roundscale_round_pd, __m256d, __mmask8, __m256d, 123, 8) -test_2x (_mm256_maskz_roundscale_round_ph, __m256h, __mmask8, __m256h, 123, 8) -test_2x (_mm256_maskz_roundscale_round_ps, __m256, __mmask16, __m256, 123, 8) -test_2y (_mm256_maskz_getmant_round_pd, __m256d, __mmask8, __m256d, 1, 1, 8) -test_2y (_mm256_maskz_getmant_round_ph, __m256h, __mmask16, __m256h, 1, 1, 8) -test_2y (_mm256_maskz_getmant_round_ps, __m256, __mmask8, __m256, 1, 1, 8) -test_3 (_mm256_maskz_add_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_add_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_add_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_mask_cvt_roundepi32_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi32_ps, __m256, __m256, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundpd_ph, __m128h, __m128h, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvt_roundpd_ps, __m128, __m128, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 9) -test_3 (_mm256_mask_cvt_roundph_epi32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_pd, __m256d, __m256d, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_ps, __m256, __m256, __mmask8, __m128i, 8) -test_3 (_mm256_mask_cvtx_roundph_ps, __m256, __m256, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundph_epu16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvt_roundph_epi16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvt_roundps_pd, __m256d, __m256d, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtx_roundps_ph, __m128h, __m128h, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvt_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 9) -test_3 (_mm256_mask_cvt_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 9) -test_3 (_mm256_mask_cvt_roundps_epi64, __m256i, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvt_roundps_epu64, __m256i, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvt_roundepi64_pd, __m256d, __m256d, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi64_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi64_ps, __m128, __m128, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvtt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtt_roundph_epi32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu32, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundph_epu16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvtt_roundph_epi16, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_cvtt_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtt_roundps_epi64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvtt_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtt_roundps_epu64, __m256i, __m256i, __mmask8, __m128h, 8) -test_3 (_mm256_mask_cvt_roundepu32_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepu32_ps, __m256, __m256, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu64_pd, __m256d, __m256d, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu64_ph, __m128h, __m128h, __mmask8, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepu64_ps, __m128, __m128, __mmask8, __m256i, 9) -test_3 (_mm256_mask_cvt_roundepu16_ph, __m256h, __m256h, __mmask16, __m256i, 8) -test_3 (_mm256_mask_cvt_roundepi16_ph, __m256h, __m256h, __mmask16, __m256i, 8) -test_3 (_mm256_maskz_div_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_div_round_ph, __m256h, __mmask8, __m256h, __m256h, 9) -test_3 (_mm256_maskz_div_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8) -test_3 (_mm256_maskz_fcmul_round_pch, __m256h, __mmask8, __m256h, __m256h, 8) -test_3 (_mm256_fmadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8) -test_3 (_mm256_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmsub_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fmsubadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fmsubadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fmsubadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_maskz_fmul_round_pch, __m256h, __mmask8, __m256h, __m256h, 8) -test_3 (_mm256_fnmadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fnmadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fnmadd_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_fnmsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9) -test_3 (_mm256_fnmsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9) -test_3 (_mm256_fnmsub_round_ps, __m256, __m256, __m256, __m256, 9) -test_3 (_mm256_mask_getexp_round_pd, __m256d, __m256d, __mmask8, __m256d, 8) -test_3 (_mm256_mask_getexp_round_ph, __m256h, __m256h, __mmask16, __m256h, 8) -test_3 (_mm256_mask_getexp_round_ps, __m256, __m256, __mmask8, __m256, 8) -test_3 (_mm256_maskz_max_round_pd, __m256d, __mmask8, __m256d, __m256d, 8) -test_3 (_mm256_maskz_max_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_max_round_ps, __m256, __mmask8, __m256, __m256, 8) -test_3 (_mm256_maskz_min_round_pd, __m256d, __mmask8, __m256d, __m256d, 8) -test_3 (_mm256_maskz_min_round_ph, __m256h, __mmask16, __m256h, __m256h, 8) -test_3 (_mm256_maskz_min_round_ps, __m256, __mmask8, __m256, __m256, 8) -test_3 (_mm256_maskz_mul_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_mul_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_mul_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_maskz_scalef_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_scalef_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_scalef_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3 (_mm256_maskz_sub_round_pd, __m256d, __mmask8, __m256d, __m256d, 9) -test_3 (_mm256_maskz_sub_round_ph, __m256h, __mmask16, __m256h, __m256h, 9) -test_3 (_mm256_maskz_sub_round_ps, __m256, __mmask8, __m256, __m256, 9) -test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8) -test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8) -test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8) -test_3x (_mm256_fixupimm_round_pd, __m256d, __m256d, __m256d, __m256i, 3, 8) -test_3x (_mm256_fixupimm_round_ps, __m256, __m256, __m256, __m256i, 3, 8) -test_3x (_mm256_maskz_range_round_pd, __m256d, __mmask8, __m256d, __m256d, 15, 8) -test_3x (_mm256_maskz_range_round_ps, __m256, __mmask16, __m256, __m256, 15, 8) -test_3x (_mm256_mask_reduce_round_ph, __m256h, __m256h, __mmask8, __m256h, 123, 8) -test_3x (_mm256_mask_reduce_round_ps, __m256, __m256, __mmask16, __m256, 123, 8) -test_3x (_mm256_mask_reduce_round_pd, __m256d, __m256d, __mmask8, __m256d, 123, 8) -test_3x (_mm256_mask_roundscale_round_ph, __m256h, __m256h, __mmask8, __m256h, 123, 8) -test_3x (_mm256_mask_roundscale_round_ps, __m256, __m256, __mmask16, __m256, 123, 8) -test_3x (_mm256_mask_roundscale_round_pd, __m256d, __m256d, __mmask8, __m256d, 123, 8) -test_3y (_mm256_mask_getmant_round_pd, __m256d, __m256d, __mmask8, __m256d, 1, 1, 8) -test_3y (_mm256_mask_getmant_round_ph, __m256h, __m256h, __mmask16, __m256h, 1, 1, 8) -test_3y (_mm256_mask_getmant_round_ps, __m256, __m256, __mmask8, __m256, 1, 1, 8) -test_4 (_mm256_mask_add_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_add_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_add_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_div_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_div_round_ph, __m256h, __m256h, __mmask8, __m256h, __m256h, 9) -test_4 (_mm256_mask_div_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_fcmadd_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fcmadd_round_pch, __m256h, __m256h, __m256h, __m256h, __mmask8, 9) -test_4 (_mm256_maskz_fcmadd_round_pch, __m256h, __mmask8, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fcmul_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask_fmadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmadd_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmadd_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask3_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, __mmask8, 8) -test_4 (_mm256_maskz_fmadd_round_pch, __m256h, __mmask8, __m256h, __m256h, __m256h, 8) -test_4 (_mm256_mask_fmaddsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmaddsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmaddsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmaddsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmaddsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmaddsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmaddsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmsubadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fmsubadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fmsubadd_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fmsubadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fmsubadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fmsubadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fmsubadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fmsubadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fmsubadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fmul_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8) -test_4 (_mm256_mask_fnmadd_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fnmadd_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fnmadd_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fnmadd_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fnmadd_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fnmadd_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fnmadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fnmadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fnmadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_fnmsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask3_fnmsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9) -test_4 (_mm256_maskz_fnmsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9) -test_4 (_mm256_mask_fnmsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask3_fnmsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9) -test_4 (_mm256_maskz_fnmsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9) -test_4 (_mm256_mask_fnmsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask3_fnmsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9) -test_4 (_mm256_maskz_fnmsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9) -test_4 (_mm256_mask_max_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 8) -test_4 (_mm256_mask_max_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_max_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8) -test_4 (_mm256_mask_min_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 8) -test_4 (_mm256_mask_min_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8) -test_4 (_mm256_mask_min_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8) -test_4 (_mm256_mask_mul_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_mul_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_mul_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_scalef_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_scalef_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_scalef_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4 (_mm256_mask_sub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9) -test_4 (_mm256_mask_sub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9) -test_4 (_mm256_mask_sub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9) -test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d, __m256i, 3, 8) -test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256, __m256i, 3, 8) -test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256i, 3, 8) -test_4x (_mm256_mask_fixupimm_round_ps, __m256, __m256, __mmask8, __m256, __m256i, 3, 8) -test_4x (_mm256_mask_range_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 15, 8) -test_4x (_mm256_mask_range_round_ps, __m256, __m256, __mmask8, __m256, __m256, 15, 8) - /* avx10_2-512mediaintrin.h */ test_2 (_mm512_mpsadbw_epu8, __m512i, __m512i, __m512i, 1) test_3 (_mm512_maskz_mpsadbw_epu8, __m512i, __mmask32, __m512i, __m512i, 1) @@ -1422,9 +1072,6 @@ test_3 (_mm256_maskz_mpsadbw_epu8, __m256i, __mmask16, __m256i, __m256i, 1) test_4 (_mm_mask_mpsadbw_epu8, __m128i, __m128i, __mmask8, __m128i, __m128i, 1) test_4 (_mm256_mask_mpsadbw_epu8, __m256i, __m256i, __mmask16, __m256i, __m256i, 1) -/* avx10_2convertintrin */ -test_2 (_mm256_cvtx_round2ps_ph, __m256h, __m256, __m256, 4) - /* avx10_2-512convertintrin.h */ test_2 (_mm512_cvtx_round2ps_ph, __m512h, __m512, __m512, 4) @@ -1522,54 +1169,6 @@ test_2 (_mm512_maskz_cvtts_roundps_epu64, __m512i, __mmask8, __m256, 8) test_3 (_mm512_mask_cvtts_roundps_epu64, __m512i, __m512i, __mmask8, __m256, 8) /* avx10_2satcvtintrin.h */ -test_1 (_mm256_ipcvts_roundph_epi8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvts_roundph_epu8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvts_roundps_epi8, __m256i, __m256, 8) -test_1 (_mm256_ipcvts_roundps_epu8, __m256i, __m256, 8) -test_1 (_mm256_ipcvtts_roundph_epi8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvtts_roundph_epu8, __m256i, __m256h, 8) -test_1 (_mm256_ipcvtts_roundps_epi8, __m256i, __m256, 8) -test_1 (_mm256_ipcvtts_roundps_epu8, __m256i, __m256, 8) -test_2 (_mm256_maskz_ipcvts_roundph_epi8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvts_roundph_epu8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvts_roundps_epi8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvts_roundps_epu8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvtts_roundph_epi8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvtts_roundph_epu8, __m256i, __mmask16, __m256h, 8) -test_2 (_mm256_maskz_ipcvtts_roundps_epi8, __m256i, __mmask8, __m256, 8) -test_2 (_mm256_maskz_ipcvtts_roundps_epu8, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvts_roundph_epi8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvts_roundph_epu8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvts_roundps_epi8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvts_roundps_epu8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvtts_roundph_epi8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvtts_roundph_epu8, __m256i, __m256i, __mmask16, __m256h, 8) -test_3 (_mm256_mask_ipcvtts_roundps_epi8, __m256i, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_ipcvtts_roundps_epu8, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundpd_epi32, __m128i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epi32, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epi64, __m256i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epi64, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epu32, __m128i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epu32, __m128i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundpd_epu64, __m256i, __m256d, 8) -test_2 (_mm256_maskz_cvtts_roundpd_epu64, __m256i, __mmask8, __m256d, 8) -test_3 (_mm256_mask_cvtts_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 8) -test_1 (_mm256_cvtts_roundps_epi32, __m256i, __m256, 8) -test_2 (_mm256_maskz_cvtts_roundps_epi32, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtts_roundps_epi32, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundps_epi64, __m256i, __m128, 8) -test_2 (_mm256_maskz_cvtts_roundps_epi64, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtts_roundps_epi64, __m256i, __m256i, __mmask8, __m128, 8) -test_1 (_mm256_cvtts_roundps_epu32, __m256i, __m256, 8) -test_2 (_mm256_maskz_cvtts_roundps_epu32, __m256i, __mmask8, __m256, 8) -test_3 (_mm256_mask_cvtts_roundps_epu32, __m256i, __m256i, __mmask8, __m256, 8) -test_1 (_mm256_cvtts_roundps_epu64, __m256i, __m128, 8) -test_2 (_mm256_maskz_cvtts_roundps_epu64, __m256i, __mmask8, __m128, 8) -test_3 (_mm256_mask_cvtts_roundps_epu64, __m256i, __m256i, __mmask8, __m128, 8) test_1 (_mm_cvtts_roundsd_epi32, int, __m128d, 8) test_1 (_mm_cvtts_roundsd_epu32, unsigned int, __m128d, 8) test_1 (_mm_cvtts_roundss_epi32, int, __m128, 8) @@ -1608,15 +1207,6 @@ test_4 (_mm512_mask_minmax_ph, __m512h, __m512h, __mmask32, __m512h, __m512h, 10 test_2 (_mm256_minmax_pbh, __m256bh, __m256bh, __m256bh, 100) test_3 (_mm256_maskz_minmax_pbh, __m256bh, __mmask16, __m256bh, __m256bh, 100) test_4 (_mm256_mask_minmax_pbh, __m256bh, __m256bh, __mmask16, __m256bh, __m256bh, 100) -test_2x (_mm256_minmax_round_pd, __m256d, __m256d, __m256d, 100, 4) -test_3x (_mm256_maskz_minmax_round_pd, __m256d, __mmask8, __m256d, __m256d, 100, 4) -test_4x (_mm256_mask_minmax_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 100, 4) -test_2x (_mm256_minmax_round_ps, __m256, __m256, __m256, 100, 4) -test_3x (_mm256_maskz_minmax_round_ps, __m256, __mmask8, __m256, __m256, 100, 4) -test_4x (_mm256_mask_minmax_round_ps, __m256, __m256, __mmask8, __m256, __m256, 100, 4) -test_2x (_mm256_minmax_round_ph, __m256h, __m256h, __m256h, 100, 4) -test_3x (_mm256_maskz_minmax_round_ph, __m256h, __mmask16, __m256h, __m256h, 100, 4) -test_4x (_mm256_mask_minmax_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 100, 4) test_2 (_mm256_minmax_pd, __m256d, __m256d, __m256d, 100) test_3 (_mm256_maskz_minmax_pd, __m256d, __mmask8, __m256d, __m256d, 100) test_4 (_mm256_mask_minmax_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 100) diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c index 26a2d01..2cfcf28 100644 --- a/gcc/testsuite/gcc.target/i386/sse-23.c +++ b/gcc/testsuite/gcc.target/i386/sse-23.c @@ -824,166 +824,6 @@ /* sm3intrin.h */ #define __builtin_ia32_vsm3rnds2(A, B, C, D) __builtin_ia32_vsm3rnds2 (A, B, C, 1) -/* avx10_2roundingintrin.h */ -#define __builtin_ia32_addpd256_mask_round(A, B, C, D, E) __builtin_ia32_addpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addph256_mask_round(A, B, C, D, E) __builtin_ia32_addph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_addps256_mask_round(A, B, C, D, E) __builtin_ia32_addps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_cmppd256_mask_round(A, B, C, D, E) __builtin_ia32_cmppd256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpph256_mask_round(A, B, C, D, E) __builtin_ia32_cmpph256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_cmpps256_mask_round(A, B, C, D, E) __builtin_ia32_cmpps256_mask_round(A, B, 1, D, 8) -#define __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtdq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2psx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvtph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2phx256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvtps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2uw256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvttph2w256_mask_round(A, B, C, D) __builtin_ia32_vcvttph2w256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udq256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqq256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtudq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtudq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2pd256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuqq2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtuqq2ps256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtuw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtw2ph256_mask_round(A, B, C, 8) -#define __builtin_ia32_divpd256_mask_round(A, B, C, D, E) __builtin_ia32_divpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divph256_mask_round(A, B, C, D, E) __builtin_ia32_divph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_divps256_mask_round(A, B, C, D, E) __builtin_ia32_divps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfcmaddcph256_round(A, B, C, D) __builtin_ia32_vfcmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfcmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfcmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfcmulcph256_round(A, B, C) __builtin_ia32_vfcmulcph256_round(A, B, 8) -#define __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfcmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_fixupimmpd256_mask_round(A, B, C, D, E, F) __builtin_ia32_fixupimmpd256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, D, E, F) __builtin_ia32_fixupimmpd256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_mask_round(A, B, C, D, E, F) __builtin_ia32_fixupimmps256_mask_round(A, B, C, 1, E, 8) -#define __builtin_ia32_fixupimmps256_maskz_round(A, B, C, D, E, F) __builtin_ia32_fixupimmps256_maskz_round(A, B, C, 1, E, 8) -#define __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddcph256_round(A, B, C, D) __builtin_ia32_vfmaddcph256_round(A, B, C, 8) -#define __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, 8) -#define __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, 8) -#define __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmsubaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfmulcph256_round(A, B, C) __builtin_ia32_vfmulcph256_round(A, B, 8) -#define __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmulcph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmaddps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubpd256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubph256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_mask3_round(A, B, C, D, 8) -#define __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfnmsubps256_maskz_round(A, B, C, D, 8) -#define __builtin_ia32_getexppd256_mask_round(A, B, C, D) __builtin_ia32_getexppd256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpph256_mask_round(A, B, C, D) __builtin_ia32_getexpph256_mask_round(A, B, C, 8) -#define __builtin_ia32_getexpps256_mask_round(A, B, C, D) __builtin_ia32_getexpps256_mask_round(A, B, C, 8) -#define __builtin_ia32_getmantpd256_mask_round(A, F, C, D, E) __builtin_ia32_getmantpd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantph256_mask_round(A, F, C, D, E) __builtin_ia32_getmantph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_getmantps256_mask_round(A, F, C, D, E) __builtin_ia32_getmantps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_maxpd256_mask_round(A, B, C, D, E) __builtin_ia32_maxpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxph256_mask_round(A, B, C, D, E) __builtin_ia32_maxph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_maxps256_mask_round(A, B, C, D, E) __builtin_ia32_maxps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minpd256_mask_round(A, B, C, D, E) __builtin_ia32_minpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minph256_mask_round(A, B, C, D, E) __builtin_ia32_minph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_minps256_mask_round(A, B, C, D, E) __builtin_ia32_minps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulpd256_mask_round(A, B, C, D, E) __builtin_ia32_mulpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulph256_mask_round(A, B, C, D, E) __builtin_ia32_mulph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_mulps256_mask_round(A, B, C, D, E) __builtin_ia32_mulps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_rangeps256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangeps256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_rangepd256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangepd256_mask_round(A, B, 1, D, E, 8) -#define __builtin_ia32_reducepd256_mask_round(A, B, C, D, E) __builtin_ia32_reducepd256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceph256_mask_round(A, B, C, D, E) __builtin_ia32_reduceph256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_reduceps256_mask_round(A, B, C, D, E) __builtin_ia32_reduceps256_mask_round(A, 8, C, D, 8) -#define __builtin_ia32_rndscalepd256_mask_round(A, B, C, D, E) __builtin_ia32_rndscalepd256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleph256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleph256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_rndscaleps256_mask_round(A, B, C, D, E) __builtin_ia32_rndscaleps256_mask_round(A, 1, C, D, 8) -#define __builtin_ia32_scalefpd256_mask_round(A, B, C, D, E) __builtin_ia32_scalefpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefph256_mask_round(A, B, C, D, E) __builtin_ia32_scalefph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_scalefps256_mask_round(A, B, C, D, E) __builtin_ia32_scalefps256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_sqrtpd256_mask_round(A, B, C, D) __builtin_ia32_sqrtpd256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtph256_mask_round(A, B, C, D) __builtin_ia32_sqrtph256_mask_round(A, B, C, 8) -#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) __builtin_ia32_sqrtps256_mask_round(A, B, C, 8) -#define __builtin_ia32_subpd256_mask_round(A, B, C, D, E) __builtin_ia32_subpd256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subph256_mask_round(A, B, C, D, E) __builtin_ia32_subph256_mask_round(A, B, C, D, 8) -#define __builtin_ia32_subps256_mask_round(A, B, C, D, E) __builtin_ia32_subps256_mask_round(A, B, C, D, 8) - /* avx10_2-512mediaintrin.h */ #define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1) #define __builtin_ia32_mpsadbw512_mask(A, B, C, D, E) __builtin_ia32_mpsadbw512_mask (A, B, 1, D, E) @@ -992,9 +832,6 @@ #define __builtin_ia32_mpsadbw128_mask(A, B, C, D, E) __builtin_ia32_mpsadbw128_mask (A, B, 1, D, E) #define __builtin_ia32_mpsadbw256_mask(A, B, C, D, E) __builtin_ia32_mpsadbw256_mask (A, B, 1, D, E) -/* avx10_2convertintrin.h */ -#define __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx256_mask_round(A, B, C, D, 8) - /* avx10_2-512convertintrin.h */ #define __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, E) __builtin_ia32_vcvt2ps2phx512_mask_round(A, B, C, D, 8) @@ -1036,22 +873,6 @@ #define __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs512_mask_round(A, B, C, 8) /* avx10_2satcvtintrin.h */ -#define __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvtps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttph2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2ibs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2iubs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttpd2uqqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2dqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2qqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2udqs256_mask_round(A, B, C, 8) -#define __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, D) __builtin_ia32_cvttps2uqqs256_mask_round(A, B, C, 8) #define __builtin_ia32_cvttsd2sis32_round(A, B) __builtin_ia32_cvttsd2sis32_round(A, 8) #define __builtin_ia32_cvttsd2usis32_round(A, B) __builtin_ia32_cvttsd2usis32_round(A, 8) #define __builtin_ia32_cvttss2sis32_round(A, B) __builtin_ia32_cvttss2sis32_round(A, 8) @@ -1076,12 +897,12 @@ #define __builtin_ia32_minmaxbf16128_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16128_mask (A, B, 100, D, E) #define __builtin_ia32_minmaxbf16256_mask(A, B, C, D, E) __builtin_ia32_minmaxbf16256_mask (A, B, 100, D, E) #define __builtin_ia32_minmaxpd128_mask(A, B, C, D, E) __builtin_ia32_minmaxpd128_mask (A, B, 100, D, E) -#define __builtin_ia32_minmaxpd256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxpd256_mask_round (A, B, 100, D, E, 4) +#define __builtin_ia32_minmaxpd256_mask(A, B, C, D, E) __builtin_ia32_minmaxpd256_mask (A, B, 100, D, E) #define __builtin_ia32_minmaxph128_mask(A, B, C, D, E) __builtin_ia32_minmaxph128_mask (A, B, 100, D, E) -#define __builtin_ia32_minmaxph256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxph256_mask_round (A, B, 100, D, E, 4) +#define __builtin_ia32_minmaxph256_mask(A, B, C, D, E) __builtin_ia32_minmaxph256_mask (A, B, 100, D, E) #define __builtin_ia32_minmaxps128_mask(A, B, C, D, E) __builtin_ia32_minmaxps128_mask (A, B, 100, D, E) -#define __builtin_ia32_minmaxps256_mask_round(A, B, C, D, E, F) __builtin_ia32_minmaxps256_mask_round (A, B, 100, D, E, 4) +#define __builtin_ia32_minmaxps256_mask(A, B, C, D, E) __builtin_ia32_minmaxps256_mask (A, B, 100, D, E) -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,xsavec,xsaves,clflushopt,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,vpclmulqdq,pconfig,wbnoinvd,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,cmpccxadd,amx-fp16,prefetchi,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2-512,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,xsavec,xsaves,clflushopt,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,vpclmulqdq,pconfig,wbnoinvd,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,cmpccxadd,amx-fp16,prefetchi,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2,amx-avx512,amx-tf32,amx-transpose,amx-fp8,movrs,amx-movrs") #include <x86intrin.h> diff --git a/gcc/testsuite/gcc.target/i386/sse2-float16-5.c b/gcc/testsuite/gcc.target/i386/sse2-float16-5.c index c3ed23b..8207842 100644 --- a/gcc/testsuite/gcc.target/i386/sse2-float16-5.c +++ b/gcc/testsuite/gcc.target/i386/sse2-float16-5.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target ia32} } */ +/* { dg-do compile { target ia32 } } */ /* { dg-options "-O2 -mno-sse2" } */ _Float16 a; diff --git a/gcc/testsuite/gcc.target/i386/strub-pr118006.c b/gcc/testsuite/gcc.target/i386/strub-pr118006.c index f116790..88f66c1 100644 --- a/gcc/testsuite/gcc.target/i386/strub-pr118006.c +++ b/gcc/testsuite/gcc.target/i386/strub-pr118006.c @@ -1,5 +1,5 @@ -/* { dg-require-effective-target strub } */ /* { dg-do compile } */ +/* { dg-require-effective-target strub } */ /* { dg-options "-fstrub=all -O2 -mno-accumulate-outgoing-args" } */ __attribute__((noipa)) diff --git a/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-3.c b/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-3.c index 18c5397..85dd80e 100644 --- a/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-3.c +++ b/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mavx10.2-256 -O2" } */ +/* { dg-options "-mavx10.2 -O2" } */ /* { dg-final { scan-assembler "vpdpwusd\t" } } */ /* { dg-final { scan-assembler "vpdpwuud\t" } } */ diff --git a/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-4.c b/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-4.c index 1bd1400d..06a85a8 100644 --- a/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-4.c +++ b/gcc/testsuite/gcc.target/i386/vnniint16-auto-vectorize-4.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define N 512 diff --git a/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-3.c b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-3.c index 5a03ff8..bbb49e8 100644 --- a/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-3.c +++ b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mavx10.2-256 -O2" } */ +/* { dg-options "-mavx10.2 -O2" } */ /* { dg-final { scan-assembler "vpdpbssd\t" } } */ /* { dg-final { scan-assembler "vpdpbuud\t" } } */ diff --git a/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-4.c b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-4.c index dafab34..76cca22 100644 --- a/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-4.c +++ b/gcc/testsuite/gcc.target/i386/vnniint8-auto-vectorize-4.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2-512" } */ -/* { dg-require-effective-target avx10_2_512 } */ +/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */ +/* { dg-require-effective-target avx10_2 } */ #define N 512 diff --git a/gcc/testsuite/gcc.target/ia64/mfused-madd-vect.c b/gcc/testsuite/gcc.target/ia64/mfused-madd-vect.c index 5bf6976..d1dc3c1 100644 --- a/gcc/testsuite/gcc.target/ia64/mfused-madd-vect.c +++ b/gcc/testsuite/gcc.target/ia64/mfused-madd-vect.c @@ -1,4 +1,4 @@ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-options "-O2 -ftree-vectorize" } */ /* { dg-final { scan-assembler-not "fpmpy" } } */ diff --git a/gcc/testsuite/gcc.target/ia64/mfused-madd.c b/gcc/testsuite/gcc.target/ia64/mfused-madd.c index 8ecb31f..04fd95a 100644 --- a/gcc/testsuite/gcc.target/ia64/mfused-madd.c +++ b/gcc/testsuite/gcc.target/ia64/mfused-madd.c @@ -1,4 +1,4 @@ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-options "-O2" } */ /* { dg-final { scan-assembler-not "fmpy" } } */ /* { dg-final { scan-assembler-not "fadd" } } */ diff --git a/gcc/testsuite/gcc.target/ia64/mno-fused-madd-vect.c b/gcc/testsuite/gcc.target/ia64/mno-fused-madd-vect.c index 10b047b..a80ce8b 100644 --- a/gcc/testsuite/gcc.target/ia64/mno-fused-madd-vect.c +++ b/gcc/testsuite/gcc.target/ia64/mno-fused-madd-vect.c @@ -1,4 +1,4 @@ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-options "-O2 -ffp-contract=off -ftree-vectorize" } */ /* { dg-final { scan-assembler "fpmpy" } } */ diff --git a/gcc/testsuite/gcc.target/ia64/mno-fused-madd.c b/gcc/testsuite/gcc.target/ia64/mno-fused-madd.c index 487519a..1f29225 100644 --- a/gcc/testsuite/gcc.target/ia64/mno-fused-madd.c +++ b/gcc/testsuite/gcc.target/ia64/mno-fused-madd.c @@ -1,4 +1,4 @@ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-options "-O2 -ffp-contract=off" } */ /* { dg-final { scan-assembler-not "fma" } } */ /* { dg-final { scan-assembler-not "fms" } } */ diff --git a/gcc/testsuite/gcc.target/loongarch/pr119408.c b/gcc/testsuite/gcc.target/loongarch/pr119408.c new file mode 100644 index 0000000..f46399a --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/pr119408.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wno-pedantic" } */ + +__float128 a; +__float128 b; +void +test (void) +{ + a = 1.11111111Q; + b = 1.434345q; +} + diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_30.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_30.c index b69926e..b5e2c19 100644 --- a/gcc/testsuite/gcc.target/nvptx/march-map=sm_30.c +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_30.c @@ -1,14 +1,14 @@ /* { dg-do assemble } */ /* { dg-options {-march-map=sm_30 -mptx=_} } */ /* { dg-additional-options -save-temps } */ -/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.0$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.3$} 1 } } */ /* { dg-final { scan-assembler-times {(?n)^ \.target sm_30$} 1 } } */ #if __PTX_ISA_VERSION_MAJOR__ != 6 #error wrong value for __PTX_ISA_VERSION_MAJOR__ #endif -#if __PTX_ISA_VERSION_MINOR__ != 0 +#if __PTX_ISA_VERSION_MINOR__ != 3 #error wrong value for __PTX_ISA_VERSION_MINOR__ #endif diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_32.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_32.c index dcf9e05..9a066bb 100644 --- a/gcc/testsuite/gcc.target/nvptx/march-map=sm_32.c +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_32.c @@ -1,14 +1,14 @@ /* { dg-do assemble } */ /* { dg-options {-march-map=sm_32 -mptx=_} } */ /* { dg-additional-options -save-temps } */ -/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.0$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.3$} 1 } } */ /* { dg-final { scan-assembler-times {(?n)^ \.target sm_30$} 1 } } */ #if __PTX_ISA_VERSION_MAJOR__ != 6 #error wrong value for __PTX_ISA_VERSION_MAJOR__ #endif -#if __PTX_ISA_VERSION_MINOR__ != 0 +#if __PTX_ISA_VERSION_MINOR__ != 3 #error wrong value for __PTX_ISA_VERSION_MINOR__ #endif diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_35.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_35.c index ce46690..15f5fae 100644 --- a/gcc/testsuite/gcc.target/nvptx/march-map=sm_35.c +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_35.c @@ -1,14 +1,14 @@ /* { dg-do assemble } */ /* { dg-options {-march-map=sm_35 -mptx=_} } */ /* { dg-additional-options -save-temps } */ -/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.0$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.3$} 1 } } */ /* { dg-final { scan-assembler-times {(?n)^ \.target sm_35$} 1 } } */ #if __PTX_ISA_VERSION_MAJOR__ != 6 #error wrong value for __PTX_ISA_VERSION_MAJOR__ #endif -#if __PTX_ISA_VERSION_MINOR__ != 0 +#if __PTX_ISA_VERSION_MINOR__ != 3 #error wrong value for __PTX_ISA_VERSION_MINOR__ #endif diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_37.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_37.c index 5b7f31c3..2a29377 100644 --- a/gcc/testsuite/gcc.target/nvptx/march-map=sm_37.c +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_37.c @@ -1,14 +1,14 @@ /* { dg-do assemble } */ /* { dg-options {-march-map=sm_37 -mptx=_} } */ /* { dg-additional-options -save-temps } */ -/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.0$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.3$} 1 } } */ /* { dg-final { scan-assembler-times {(?n)^ \.target sm_37$} 1 } } */ #if __PTX_ISA_VERSION_MAJOR__ != 6 #error wrong value for __PTX_ISA_VERSION_MAJOR__ #endif -#if __PTX_ISA_VERSION_MINOR__ != 0 +#if __PTX_ISA_VERSION_MINOR__ != 3 #error wrong value for __PTX_ISA_VERSION_MINOR__ #endif diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_50.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_50.c index 934dd53..5bb73bc 100644 --- a/gcc/testsuite/gcc.target/nvptx/march-map=sm_50.c +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_50.c @@ -1,14 +1,14 @@ /* { dg-do assemble } */ /* { dg-options {-march-map=sm_50 -mptx=_} } */ /* { dg-additional-options -save-temps } */ -/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.0$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.3$} 1 } } */ /* { dg-final { scan-assembler-times {(?n)^ \.target sm_37$} 1 } } */ #if __PTX_ISA_VERSION_MAJOR__ != 6 #error wrong value for __PTX_ISA_VERSION_MAJOR__ #endif -#if __PTX_ISA_VERSION_MINOR__ != 0 +#if __PTX_ISA_VERSION_MINOR__ != 3 #error wrong value for __PTX_ISA_VERSION_MINOR__ #endif diff --git a/gcc/testsuite/gcc.target/nvptx/march=sm_30.c b/gcc/testsuite/gcc.target/nvptx/march=sm_30.c index a362935..23e09be 100644 --- a/gcc/testsuite/gcc.target/nvptx/march=sm_30.c +++ b/gcc/testsuite/gcc.target/nvptx/march=sm_30.c @@ -1,14 +1,14 @@ /* { dg-do assemble } */ /* { dg-options {-march=sm_30 -mptx=_} } */ /* { dg-additional-options -save-temps } */ -/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.0$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.3$} 1 } } */ /* { dg-final { scan-assembler-times {(?n)^ \.target sm_30$} 1 } } */ #if __PTX_ISA_VERSION_MAJOR__ != 6 #error wrong value for __PTX_ISA_VERSION_MAJOR__ #endif -#if __PTX_ISA_VERSION_MINOR__ != 0 +#if __PTX_ISA_VERSION_MINOR__ != 3 #error wrong value for __PTX_ISA_VERSION_MINOR__ #endif diff --git a/gcc/testsuite/gcc.target/nvptx/march=sm_35.c b/gcc/testsuite/gcc.target/nvptx/march=sm_35.c index c9e9226..9f9f1df 100644 --- a/gcc/testsuite/gcc.target/nvptx/march=sm_35.c +++ b/gcc/testsuite/gcc.target/nvptx/march=sm_35.c @@ -1,14 +1,14 @@ /* { dg-do assemble } */ /* { dg-options {-march=sm_35 -mptx=_} } */ /* { dg-additional-options -save-temps } */ -/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.0$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.3$} 1 } } */ /* { dg-final { scan-assembler-times {(?n)^ \.target sm_35$} 1 } } */ #if __PTX_ISA_VERSION_MAJOR__ != 6 #error wrong value for __PTX_ISA_VERSION_MAJOR__ #endif -#if __PTX_ISA_VERSION_MINOR__ != 0 +#if __PTX_ISA_VERSION_MINOR__ != 3 #error wrong value for __PTX_ISA_VERSION_MINOR__ #endif diff --git a/gcc/testsuite/gcc.target/nvptx/march=sm_37.c b/gcc/testsuite/gcc.target/nvptx/march=sm_37.c index d1094d0..5644861 100644 --- a/gcc/testsuite/gcc.target/nvptx/march=sm_37.c +++ b/gcc/testsuite/gcc.target/nvptx/march=sm_37.c @@ -1,14 +1,14 @@ /* { dg-do assemble } */ /* { dg-options {-march=sm_37 -mptx=_} } */ /* { dg-additional-options -save-temps } */ -/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.0$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 6\.3$} 1 } } */ /* { dg-final { scan-assembler-times {(?n)^ \.target sm_37$} 1 } } */ #if __PTX_ISA_VERSION_MAJOR__ != 6 #error wrong value for __PTX_ISA_VERSION_MAJOR__ #endif -#if __PTX_ISA_VERSION_MINOR__ != 0 +#if __PTX_ISA_VERSION_MINOR__ != 3 #error wrong value for __PTX_ISA_VERSION_MINOR__ #endif diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c index 06d6c1b..4facb82 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-perm-longlong.c @@ -1,7 +1,7 @@ /* Verify that overloaded built-ins for vec_perm with long long inputs produce the right code. */ -/* { dg-do compile {target lp64} } */ +/* { dg-do compile { target lp64 } } */ // 'long long' in Altivec types is invalid without -mvsx. /* { dg-options "-mvsx -O2" } */ /* { dg-require-effective-target powerpc_vsx } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr70243.c b/gcc/testsuite/gcc.target/powerpc/pr70243.c index 1152518..512c199 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr70243.c +++ b/gcc/testsuite/gcc.target/powerpc/pr70243.c @@ -1,4 +1,4 @@ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-options "-O2 -mvsx" } */ /* { dg-require-effective-target powerpc_vsx } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr91903.c b/gcc/testsuite/gcc.target/powerpc/pr91903.c index d70a0c6..b147d0e 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr91903.c +++ b/gcc/testsuite/gcc.target/powerpc/pr91903.c @@ -1,4 +1,4 @@ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-options "-mdejagnu-cpu=power8 -mvsx" } */ /* { dg-require-effective-target powerpc_vsx } */ diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c index 9718115..e40874f 100644 --- a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile target { { rv64-*-*}}} */ +/* { dg-do compile target { { rv64-*-*}} } */ /* { dg-options "-march=rv64gc_zicbop -mabi=lp64" } */ void foo (char *p) diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c index 4871a97..dd6e1ea 100644 --- a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile target { { rv32-*-*}}} */ +/* { dg-do compile target { { rv32-*-*}} } */ /* { dg-options "-march=rv32gc_zicbop -mabi=ilp32" } */ void foo (char *p) diff --git a/gcc/testsuite/gcc.target/riscv/prefetch-zicbop.c b/gcc/testsuite/gcc.target/riscv/prefetch-zicbop.c index 0faa120..250f9ec 100644 --- a/gcc/testsuite/gcc.target/riscv/prefetch-zicbop.c +++ b/gcc/testsuite/gcc.target/riscv/prefetch-zicbop.c @@ -1,4 +1,4 @@ -/* { dg-do compile target { { rv64-*-*}}} */ +/* { dg-do compile target { { rv64-*-*}} } */ /* { dg-options "-march=rv64gc_zicbop -mabi=lp64" } */ void foo (char *p) diff --git a/gcc/testsuite/gcc.target/riscv/prefetch-zihintntl.c b/gcc/testsuite/gcc.target/riscv/prefetch-zihintntl.c index 78a3afe..54e809f 100644 --- a/gcc/testsuite/gcc.target/riscv/prefetch-zihintntl.c +++ b/gcc/testsuite/gcc.target/riscv/prefetch-zihintntl.c @@ -1,4 +1,4 @@ -/* { dg-do compile target { { rv64-*-*}}} */ +/* { dg-do compile target { { rv64-*-*}} } */ /* { dg-options "-march=rv64gc_zicbop_zihintntl -mabi=lp64" } */ void foo (char *p) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr117722.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr117722.c index f255ceb..493dab0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr117722.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr117722.c @@ -18,6 +18,6 @@ int pixel_sad_n(unsigned char *pix1, unsigned char *pix2, int n) return sum; } -/* { dg-final { scan-assembler {vminu\.v} } } */ -/* { dg-final { scan-assembler {vmaxu\.v} } } */ -/* { dg-final { scan-assembler {vsub\.v} } } */ +/* { dg-final { scan-assembler {vrsub\.v} } } */ +/* { dg-final { scan-assembler {vmax\.v} } } */ +/* { dg-final { scan-assembler {vwsubu\.v} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr119224.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr119224.c new file mode 100644 index 0000000..fa3386c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr119224.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -ffast-math -march=rv64gcv_zvl256b -mabi=lp64d -mtune=generic-ooo -mrvv-vector-bits=zvl" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-O2" "-Og" "-Os" "-Oz" } } */ + +/* A core routine of x264 which should not spill for OoO VLS build. */ + +inline int abs(int i) +{ + return (i < 0 ? -i : i); +} + +int x264_sad_16x16(unsigned char *p1, int st1, unsigned char *p2, int st2) +{ + int sum = 0; + + for(int y = 0; y < 16; y++) + { + for(int x = 0; x < 16; x++) + sum += abs (p1[x] - p2[x]); + p1 += st1; p2 += st2; + } + + return sum; +} + +/* { dg-final { scan-assembler-not {addi\t[a-x0-9]+,sp} } } */ +/* { dg-final { scan-assembler-not {addi\tsp,sp} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c index 3095a6d..a043b33 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c @@ -119,4 +119,4 @@ merge10 (vnx16df x, vnx16df y, vnx16df *out) *(vnx16df*)out = v; } -/* dg-final scan-assembler-times {\tvmerge.vvm} 11 */ +/* { dg-final { scan-assembler-times {\tvmerge.vvm} 11 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c index 1dfd828..4ae341a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c @@ -3,6 +3,6 @@ #include "../vls-vlmax/merge-4.c" -/* dg-final scan-assembler-times {\tvmerge.vvm} 11 */ +/* { dg-final { scan-assembler-times {\tvmerge.vvm} 11 } } */ /* { dg-final { scan-assembler-not {\tvms} } } */ /* { dg-final { scan-assembler-times {\tvlm.v} 11 } } */ diff --git a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-1.c b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-1.c index ff57344..7344af3 100644 --- a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-1.c +++ b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-1.c @@ -1,6 +1,6 @@ /* Functional tests for the "target" attribute and pragma. */ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-require-effective-target target_attribute } */ /* { dg-options "-O3 -march=zEC12 -mzarch" } */ diff --git a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-2.c b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-2.c index 739c2ea..3a6e4bb 100644 --- a/gcc/testsuite/gcc.target/s390/target-attribute/tattr-2.c +++ b/gcc/testsuite/gcc.target/s390/target-attribute/tattr-2.c @@ -1,6 +1,6 @@ /* Functional tests for the "target" attribute and pragma. */ -/* { dg-do compile */ +/* { dg-do compile } */ /* { dg-require-effective-target target_attribute } */ /* { dg-options "-O3 -march=zEC12 -mno-htm -fno-ipa-icf" } */ diff --git a/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch2.d b/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch2.d index 0d12bcb..8dcba79 100644 --- a/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch2.d +++ b/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch2.d @@ -28,183 +28,7 @@ void test_load_store() storeUnaligned!fake4(null, f); // { dg-warning "mismatch in return type" } } -void test_shuffle() -{ - shuffle!(int, int, int)(0, 0, 0); // { dg-warning "mismatch in return type" } - shuffle!(double, int, int)(0, 0, 0); // { dg-warning "mismatch in return type" } - shuffle!(fake4, int, int)(f, 0, 0); // { dg-warning "mismatch in return type" } - - shuffle!(int4, int, int)(0, 0, 0); // { dg-warning "mismatch in argument 2" } - shuffle!(int4, double, int)(0, 0, 0); // { dg-warning "mismatch in argument 2" } - shuffle!(int4, fake4, int)(0, f, 0); // { dg-warning "mismatch in argument 2" } - - shuffle!(int4, int4, int)(0, 0, 0); // { dg-warning "mismatch in argument 3" } - shuffle!(int4, int4, double)(0, 0, 0); // { dg-warning "mismatch in argument 3" } - shuffle!(int4, int4, fake4)(0, 0, f); // { dg-warning "mismatch in argument 3" } - - shuffle!(int4, int4, int4)(0, 0, 0); - shuffle!(int4, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(int4, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(int4, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(int4, int4, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } - shuffle!(int4, int4, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - shuffle!(int4, int4, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } - - shuffle!(float4, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(float4, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(float4, float4, int4)(0, 0, 0); - shuffle!(float4, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(float4, float4, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } - shuffle!(float4, float4, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - shuffle!(float4, float4, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } - - shuffle!(short8, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(short8, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - shuffle!(short8, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(short8, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(short8, short8, short8)(0, 0, 0); - shuffle!(short8, short8, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - shuffle!(short8, short8, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } - - shuffle!(byte16, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(byte16, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(byte16, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - shuffle!(byte16, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - shuffle!(byte16, byte16, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } - shuffle!(byte16, byte16, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - shuffle!(byte16, byte16, byte16)(0, 0, 0); -} - -void test_shufflevector() -{ - shufflevector!(int, int4, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 1" } - shufflevector!(double, int4, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 1" } - shufflevector!(fake4, int4, int, int, int, int)(f, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 1" } - - shufflevector!(int4, int, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 2" } - shufflevector!(int4, double, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 2" } - shufflevector!(int4, int4, int, int, int, int)(0, 0, 0, 0, 0, 0); - shufflevector!(int4, short8, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-error "mismatch in argument 2" } - shufflevector!(int4, float4, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-error "mismatch in argument 2" } - shufflevector!(int4, byte16, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-error "mismatch in argument 2" } - shufflevector!(int4, fake4, int, int, int, int)(0, f, 0, 0, 0, 0); // { dg-warning "mismatch in argument 2" } - - shufflevector!(int4, int4, double, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 3" } - shufflevector!(int4, int4, int4, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 3" } - shufflevector!(int4, int4, short8, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 3" } - shufflevector!(int4, int4, float4, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 3" } - shufflevector!(int4, int4, byte16, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 3" } - - shufflevector!(int4, int4, int, double, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 4" } - shufflevector!(int4, int4, int, int, double, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 5" } - shufflevector!(int4, int4, int, int, int, double)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 6" } - - int i; - shufflevector!(int4, int4, int, int, int, int)(0, 0, i, 0, 0, 0); // { dg-error "argument .i. cannot be read at compile time" } - shufflevector!(int4, int4, int, int, int, int)(0, 0, -1u, 0, 0, 0); // { dg-error "element index .-1. is out of bounds" } - shufflevector!(int4, int4, int, int, int, int)(0, 0, 8, 0, 0, 0); // { dg-error "element index .8. is out of bounds" } -} - -void test_convertvector() -{ - convertvector!(int, int)(0); // { dg-warning "mismatch in return type" } - convertvector!(double, int)(0); // { dg-warning "mismatch in return type" } - convertvector!(fake4, int)(0); // { dg-warning "mismatch in return type" } - - convertvector!(int4, int)(0); // { dg-warning "mismatch in argument 1" } - convertvector!(int4, double)(0); // { dg-warning "mismatch in argument 1" } - convertvector!(int4, int4)(0); - convertvector!(int4, short8)(0); // { dg-error "mismatch in argument 1" } - convertvector!(int4, float4)(0); - convertvector!(int4, byte16)(0); // { dg-error "mismatch in argument 1" } - convertvector!(int4, fake4)(f); // { dg-warning "mismatch in argument 1" } - - convertvector!(short8, int)(0); // { dg-warning "mismatch in argument 1" } - convertvector!(short8, double)(0); // { dg-warning "mismatch in argument 1" } - convertvector!(short8, int4)(0); // { dg-error "mismatch in argument 1" } - convertvector!(short8, short8)(0); - convertvector!(short8, float4)(0); // { dg-error "mismatch in argument 1" } - convertvector!(short8, byte16)(0); // { dg-error "mismatch in argument 1" } - convertvector!(short8, fake4)(f); // { dg-warning "mismatch in argument 1" } - - convertvector!(float4, int)(0); // { dg-warning "mismatch in argument 1" } - convertvector!(float4, double)(0); // { dg-warning "mismatch in argument 1" } - convertvector!(float4, int4)(0); - convertvector!(float4, short8)(0); // { dg-error "mismatch in argument 1" } - convertvector!(float4, float4)(0); - convertvector!(float4, byte16)(0); // { dg-error "mismatch in argument 1" } - convertvector!(float4, fake4)(f); // { dg-warning "mismatch in argument 1" } - - convertvector!(byte16, int)(0); // { dg-warning "mismatch in argument 1" } - convertvector!(byte16, double)(0); // { dg-warning "mismatch in argument 1" } - convertvector!(byte16, int4)(0); // { dg-error "mismatch in argument 1" } - convertvector!(byte16, short8)(0); // { dg-error "mismatch in argument 1" } - convertvector!(byte16, float4)(0); // { dg-error "mismatch in argument 1" } - convertvector!(byte16, byte16)(0); - convertvector!(byte16, fake4)(f); // { dg-warning "mismatch in argument 1" } -} - -void test_blendvector() -{ - blendvector!(int, int, int)(0, 0, 0); // { dg-warning "mismatch in return type" } - blendvector!(double, int, int)(0, 0, 0); // { dg-warning "mismatch in return type" } - blendvector!(fake4, int, int)(f, 0, 0); // { dg-warning "mismatch in return type" } - - blendvector!(int4, int, int)(0, 0, 0); // { dg-warning "mismatch in argument 2" } - blendvector!(int4, double, int)(0, 0, 0); // { dg-warning "mismatch in argument 2" } - blendvector!(int4, fake4, int)(0, f, 0); // { dg-warning "mismatch in argument 2" } - - blendvector!(int4, int4, int)(0, 0, 0); // { dg-warning "mismatch in argument 3" } - blendvector!(int4, int4, double)(0, 0, 0); // { dg-warning "mismatch in argument 3" } - blendvector!(int4, int4, fake4)(0, 0, f); // { dg-warning "mismatch in argument 3" } - - blendvector!(int4, int4, int4)(0, 0, 0); - blendvector!(int4, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(int4, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(int4, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(int4, int4, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } - blendvector!(int4, int4, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - blendvector!(int4, int4, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } - - blendvector!(float4, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(float4, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(float4, float4, int4)(0, 0, 0); - blendvector!(float4, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(float4, float4, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } - blendvector!(float4, float4, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - blendvector!(float4, float4, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } - - blendvector!(short8, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(short8, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - blendvector!(short8, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(short8, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(short8, short8, short8)(0, 0, 0); - blendvector!(short8, short8, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - blendvector!(short8, short8, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } - - blendvector!(byte16, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(byte16, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(byte16, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } - blendvector!(byte16, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - blendvector!(byte16, byte16, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } - blendvector!(byte16, byte16, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } - blendvector!(byte16, byte16, byte16)(0, 0, 0); -} - // The following declarations of the simd intrinsics are without any guards // to verify `d/intrinsics.cc` is doing checks to prevent invalid lowerings. V loadUnaligned(V)(const V*); V storeUnaligned(V)(V*, V); - -V0 shuffle(V0, V1, M)(V0, V1, M); - -// Use overloads to test different argument positions. -template E(V) { alias typeof(V.array[0]) E; } -enum isV(T) = is(T : __vector(V[N]), V, size_t N); - -__vector(E!V1[M.length]) shufflevector(V1, V2, M...)(V1, V2, M) if (isV!V1 && !isV!V2); -__vector(E!V2[M.length]) shufflevector(V1, V2, M...)(V1, V2, M) if (isV!V2 && !isV!V1); -__vector(E!V1[M.length]) shufflevector(V1, V2, M...)(V1, V2, M) if (isV!V1 && isV!V2); - -V convertvector(V, T)(T); -V0 blendvector(V0, V1, M)(V0, V1, M); diff --git a/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch3.d b/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch3.d new file mode 100644 index 0000000..5529de3 --- /dev/null +++ b/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch3.d @@ -0,0 +1,61 @@ +// { dg-additional-options "-mavx" { target avx_runtime } } +// { dg-do compile { target { avx_runtime || vect_sizes_16B_8B } } } +module gcc.simd; + +alias int4 = __vector(int[4]); +alias short8 = __vector(short[8]); +alias float4 = __vector(float[4]); +alias byte16 = __vector(byte[16]); +struct fake4 { int[4] v; } +enum f = fake4(); + +void test_shuffle() +{ + shuffle!(int, int, int)(0, 0, 0); // { dg-warning "mismatch in return type" } + shuffle!(double, int, int)(0, 0, 0); // { dg-warning "mismatch in return type" } + shuffle!(fake4, int, int)(f, 0, 0); // { dg-warning "mismatch in return type" } + + shuffle!(int4, int, int)(0, 0, 0); // { dg-warning "mismatch in argument 2" } + shuffle!(int4, double, int)(0, 0, 0); // { dg-warning "mismatch in argument 2" } + shuffle!(int4, fake4, int)(0, f, 0); // { dg-warning "mismatch in argument 2" } + + shuffle!(int4, int4, int)(0, 0, 0); // { dg-warning "mismatch in argument 3" } + shuffle!(int4, int4, double)(0, 0, 0); // { dg-warning "mismatch in argument 3" } + shuffle!(int4, int4, fake4)(0, 0, f); // { dg-warning "mismatch in argument 3" } + + shuffle!(int4, int4, int4)(0, 0, 0); + shuffle!(int4, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(int4, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(int4, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(int4, int4, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } + shuffle!(int4, int4, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + shuffle!(int4, int4, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } + + shuffle!(float4, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(float4, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(float4, float4, int4)(0, 0, 0); + shuffle!(float4, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(float4, float4, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } + shuffle!(float4, float4, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + shuffle!(float4, float4, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } + + shuffle!(short8, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(short8, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + shuffle!(short8, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(short8, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(short8, short8, short8)(0, 0, 0); + shuffle!(short8, short8, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + shuffle!(short8, short8, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } + + shuffle!(byte16, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(byte16, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(byte16, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + shuffle!(byte16, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + shuffle!(byte16, byte16, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } + shuffle!(byte16, byte16, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + shuffle!(byte16, byte16, byte16)(0, 0, 0); +} + +// The following declarations of the simd intrinsics are without any guards +// to verify `d/intrinsics.cc` is doing checks to prevent invalid lowerings. +V0 shuffle(V0, V1, M)(V0, V1, M); diff --git a/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch4.d b/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch4.d new file mode 100644 index 0000000..06ce83e --- /dev/null +++ b/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch4.d @@ -0,0 +1,51 @@ +// { dg-additional-options "-mavx" { target avx_runtime } } +// { dg-do compile { target { avx_runtime || vect_sizes_16B_8B } } } +module gcc.simd; + +alias int4 = __vector(int[4]); +alias short8 = __vector(short[8]); +alias float4 = __vector(float[4]); +alias byte16 = __vector(byte[16]); +struct fake4 { int[4] v; } +enum f = fake4(); + +void test_shufflevector() +{ + shufflevector!(int, int4, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 1" } + shufflevector!(double, int4, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 1" } + shufflevector!(fake4, int4, int, int, int, int)(f, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 1" } + + shufflevector!(int4, int, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 2" } + shufflevector!(int4, double, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 2" } + shufflevector!(int4, int4, int, int, int, int)(0, 0, 0, 0, 0, 0); + shufflevector!(int4, short8, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-error "mismatch in argument 2" } + shufflevector!(int4, float4, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-error "mismatch in argument 2" } + shufflevector!(int4, byte16, int, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-error "mismatch in argument 2" } + shufflevector!(int4, fake4, int, int, int, int)(0, f, 0, 0, 0, 0); // { dg-warning "mismatch in argument 2" } + + shufflevector!(int4, int4, double, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 3" } + shufflevector!(int4, int4, int4, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 3" } + shufflevector!(int4, int4, short8, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 3" } + shufflevector!(int4, int4, float4, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 3" } + shufflevector!(int4, int4, byte16, int, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 3" } + + shufflevector!(int4, int4, int, double, int, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 4" } + shufflevector!(int4, int4, int, int, double, int)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 5" } + shufflevector!(int4, int4, int, int, int, double)(0, 0, 0, 0, 0, 0); // { dg-warning "mismatch in argument 6" } + + int i; + shufflevector!(int4, int4, int, int, int, int)(0, 0, i, 0, 0, 0); // { dg-error "argument .i. cannot be read at compile time" } + shufflevector!(int4, int4, int, int, int, int)(0, 0, -1u, 0, 0, 0); // { dg-error "element index .-1. is out of bounds" } + shufflevector!(int4, int4, int, int, int, int)(0, 0, 8, 0, 0, 0); // { dg-error "element index .8. is out of bounds" } +} + +// The following declarations of the simd intrinsics are without any guards +// to verify `d/intrinsics.cc` is doing checks to prevent invalid lowerings. + +// Use overloads to test different argument positions. +template E(V) { alias typeof(V.array[0]) E; } +enum isV(T) = is(T : __vector(V[N]), V, size_t N); + +__vector(E!V1[M.length]) shufflevector(V1, V2, M...)(V1, V2, M) if (isV!V1 && !isV!V2); +__vector(E!V2[M.length]) shufflevector(V1, V2, M...)(V1, V2, M) if (isV!V2 && !isV!V1); +__vector(E!V1[M.length]) shufflevector(V1, V2, M...)(V1, V2, M) if (isV!V1 && isV!V2); diff --git a/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch5.d b/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch5.d new file mode 100644 index 0000000..28a0f02 --- /dev/null +++ b/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch5.d @@ -0,0 +1,53 @@ +// { dg-additional-options "-mavx" { target avx_runtime } } +// { dg-do compile { target { avx_runtime || vect_sizes_16B_8B } } } +module gcc.simd; + +alias int4 = __vector(int[4]); +alias short8 = __vector(short[8]); +alias float4 = __vector(float[4]); +alias byte16 = __vector(byte[16]); +struct fake4 { int[4] v; } +enum f = fake4(); + +void test_convertvector() +{ + convertvector!(int, int)(0); // { dg-warning "mismatch in return type" } + convertvector!(double, int)(0); // { dg-warning "mismatch in return type" } + convertvector!(fake4, int)(0); // { dg-warning "mismatch in return type" } + + convertvector!(int4, int)(0); // { dg-warning "mismatch in argument 1" } + convertvector!(int4, double)(0); // { dg-warning "mismatch in argument 1" } + convertvector!(int4, int4)(0); + convertvector!(int4, short8)(0); // { dg-error "mismatch in argument 1" } + convertvector!(int4, float4)(0); + convertvector!(int4, byte16)(0); // { dg-error "mismatch in argument 1" } + convertvector!(int4, fake4)(f); // { dg-warning "mismatch in argument 1" } + + convertvector!(short8, int)(0); // { dg-warning "mismatch in argument 1" } + convertvector!(short8, double)(0); // { dg-warning "mismatch in argument 1" } + convertvector!(short8, int4)(0); // { dg-error "mismatch in argument 1" } + convertvector!(short8, short8)(0); + convertvector!(short8, float4)(0); // { dg-error "mismatch in argument 1" } + convertvector!(short8, byte16)(0); // { dg-error "mismatch in argument 1" } + convertvector!(short8, fake4)(f); // { dg-warning "mismatch in argument 1" } + + convertvector!(float4, int)(0); // { dg-warning "mismatch in argument 1" } + convertvector!(float4, double)(0); // { dg-warning "mismatch in argument 1" } + convertvector!(float4, int4)(0); + convertvector!(float4, short8)(0); // { dg-error "mismatch in argument 1" } + convertvector!(float4, float4)(0); + convertvector!(float4, byte16)(0); // { dg-error "mismatch in argument 1" } + convertvector!(float4, fake4)(f); // { dg-warning "mismatch in argument 1" } + + convertvector!(byte16, int)(0); // { dg-warning "mismatch in argument 1" } + convertvector!(byte16, double)(0); // { dg-warning "mismatch in argument 1" } + convertvector!(byte16, int4)(0); // { dg-error "mismatch in argument 1" } + convertvector!(byte16, short8)(0); // { dg-error "mismatch in argument 1" } + convertvector!(byte16, float4)(0); // { dg-error "mismatch in argument 1" } + convertvector!(byte16, byte16)(0); + convertvector!(byte16, fake4)(f); // { dg-warning "mismatch in argument 1" } +} + +// The following declarations of the simd intrinsics are without any guards +// to verify `d/intrinsics.cc` is doing checks to prevent invalid lowerings. +V convertvector(V, T)(T); diff --git a/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch6.d b/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch6.d new file mode 100644 index 0000000..7fe17eb --- /dev/null +++ b/gcc/testsuite/gdc.dg/Wbuiltin_declaration_mismatch6.d @@ -0,0 +1,61 @@ +// { dg-additional-options "-mavx" { target avx_runtime } } +// { dg-do compile { target { avx_runtime || vect_sizes_16B_8B } } } +module gcc.simd; + +alias int4 = __vector(int[4]); +alias short8 = __vector(short[8]); +alias float4 = __vector(float[4]); +alias byte16 = __vector(byte[16]); +struct fake4 { int[4] v; } +enum f = fake4(); + +void test_blendvector() +{ + blendvector!(int, int, int)(0, 0, 0); // { dg-warning "mismatch in return type" } + blendvector!(double, int, int)(0, 0, 0); // { dg-warning "mismatch in return type" } + blendvector!(fake4, int, int)(f, 0, 0); // { dg-warning "mismatch in return type" } + + blendvector!(int4, int, int)(0, 0, 0); // { dg-warning "mismatch in argument 2" } + blendvector!(int4, double, int)(0, 0, 0); // { dg-warning "mismatch in argument 2" } + blendvector!(int4, fake4, int)(0, f, 0); // { dg-warning "mismatch in argument 2" } + + blendvector!(int4, int4, int)(0, 0, 0); // { dg-warning "mismatch in argument 3" } + blendvector!(int4, int4, double)(0, 0, 0); // { dg-warning "mismatch in argument 3" } + blendvector!(int4, int4, fake4)(0, 0, f); // { dg-warning "mismatch in argument 3" } + + blendvector!(int4, int4, int4)(0, 0, 0); + blendvector!(int4, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(int4, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(int4, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(int4, int4, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } + blendvector!(int4, int4, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + blendvector!(int4, int4, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } + + blendvector!(float4, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(float4, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(float4, float4, int4)(0, 0, 0); + blendvector!(float4, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(float4, float4, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } + blendvector!(float4, float4, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + blendvector!(float4, float4, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } + + blendvector!(short8, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(short8, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + blendvector!(short8, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(short8, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(short8, short8, short8)(0, 0, 0); + blendvector!(short8, short8, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + blendvector!(short8, short8, byte16)(0, 0, 0); // { dg-error "mismatch in argument 3" } + + blendvector!(byte16, int4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(byte16, short8, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(byte16, float4, int4)(0, 0, 0); // { dg-error "mismatch in argument 2" } + blendvector!(byte16, byte16, int4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + blendvector!(byte16, byte16, short8)(0, 0, 0); // { dg-error "mismatch in argument 3" } + blendvector!(byte16, byte16, float4)(0, 0, 0); // { dg-error "mismatch in argument 3" } + blendvector!(byte16, byte16, byte16)(0, 0, 0); +} + +// The following declarations of the simd intrinsics are without any guards +// to verify `d/intrinsics.cc` is doing checks to prevent invalid lowerings. +V0 blendvector(V0, V1, M)(V0, V1, M); diff --git a/gcc/testsuite/gdc.dg/pr117621.d b/gcc/testsuite/gdc.dg/pr117621.d new file mode 100644 index 0000000..f0b96cb --- /dev/null +++ b/gcc/testsuite/gdc.dg/pr117621.d @@ -0,0 +1,11 @@ +// { dg-do "compile" } +// { dg-options "-g" } +void pr117621() +{ + auto fun()(inout int) + { + struct S {} + return inout(S)(); + } + auto s = fun(0); +} diff --git a/gcc/testsuite/gdc.test/fail_compilation/fail21045.d b/gcc/testsuite/gdc.test/fail_compilation/fail21045.d new file mode 100644 index 0000000..c43eda3 --- /dev/null +++ b/gcc/testsuite/gdc.test/fail_compilation/fail21045.d @@ -0,0 +1,12 @@ +/* +TEST_OUTPUT: +--- +fail_compilation/fail21045.d(12): Error: unable to read module `__stdin` +fail_compilation/fail21045.d(12): Expected '__stdin.d' or '__stdin/package.d' in one of the following import paths: +import path[0] = fail_compilation +import path[1] = $p:druntime/import$ +import path[2] = $p:phobos$ +--- +*/ + +import __stdin; diff --git a/gcc/testsuite/gfortran.dg/associate_70.f90 b/gcc/testsuite/gfortran.dg/associate_70.f90 index ddb38b8..6f8f5d6a 100644 --- a/gcc/testsuite/gfortran.dg/associate_70.f90 +++ b/gcc/testsuite/gfortran.dg/associate_70.f90 @@ -1,5 +1,5 @@ ! { dg-do run } -! ( dg-options "-Wuninitialized" ) +! { dg-options "-Wuninitialized" } ! ! Test fix for PR115700 comment 5, in which ‘.tmp1’ is used uninitialized and ! both normal and scalarized array references did not work correctly. diff --git a/gcc/testsuite/gfortran.dg/assumed_charlen_in_main.f90 b/gcc/testsuite/gfortran.dg/assumed_charlen_in_main.f90 index f4bb701..695a580 100644 --- a/gcc/testsuite/gfortran.dg/assumed_charlen_in_main.f90 +++ b/gcc/testsuite/gfortran.dg/assumed_charlen_in_main.f90 @@ -20,7 +20,7 @@ end subroutine poobar program test character(len=*), parameter :: foo = 'test' ! Parameters must work. character(len=4) :: bar = foo - character(len=*) :: foobar = 'This should fail' ! { dg-error "must be a dummy" } + character(len=*) :: foobar = 'This should fail' ! { dg-error "must be a dummy" } print *, bar call poobar () end diff --git a/gcc/testsuite/gfortran.dg/bessel_3.f90 b/gcc/testsuite/gfortran.dg/bessel_3.f90 index 51e11e9..4191d24 100644 --- a/gcc/testsuite/gfortran.dg/bessel_3.f90 +++ b/gcc/testsuite/gfortran.dg/bessel_3.f90 @@ -6,7 +6,7 @@ ! IMPLICIT NONE print *, SIN (1.0) -print *, BESSEL_J0(1.0) ! { dg-error "has no IMPLICIT type" }) +print *, BESSEL_J0(1.0) ! { dg-error "has no IMPLICIT type" } print *, BESSEL_J1(1.0) ! { dg-error "has no IMPLICIT type" } print *, BESSEL_JN(1,1.0) ! { dg-error "has no IMPLICIT type|Type mismatch" } print *, BESSEL_JN(1,2,1.0) ! { dg-error "has no IMPLICIT type|Type mismatch|More actual than formal" } diff --git a/gcc/testsuite/gfortran.dg/c_funloc_tests_6.f90 b/gcc/testsuite/gfortran.dg/c_funloc_tests_6.f90 index 45d0955..d8c8039 100644 --- a/gcc/testsuite/gfortran.dg/c_funloc_tests_6.f90 +++ b/gcc/testsuite/gfortran.dg/c_funloc_tests_6.f90 @@ -20,7 +20,7 @@ procedure(sub), pointer :: fsub integer, external :: noCsub procedure(integer), pointer :: fint -cp = c_funloc (sub) ! { dg-error "Cannot convert TYPE.c_funptr. to TYPE.c_ptr." }) +cp = c_funloc (sub) ! { dg-error "Cannot convert TYPE.c_funptr. to TYPE.c_ptr." } cfp = c_loc (int) ! { dg-error "Cannot convert TYPE.c_ptr. to TYPE.c_funptr." } call c_f_pointer (cfp, int) ! { dg-error "Argument CPTR at .1. to C_F_POINTER shall have the type TYPE.C_PTR." } diff --git a/gcc/testsuite/gfortran.dg/cray_pointers_2.f90 b/gcc/testsuite/gfortran.dg/cray_pointers_2.f90 index 4351874..e646fc8 100644 --- a/gcc/testsuite/gfortran.dg/cray_pointers_2.f90 +++ b/gcc/testsuite/gfortran.dg/cray_pointers_2.f90 @@ -1,6 +1,4 @@ -! Using two spaces between dg-do and run is a hack to keep gfortran-dg-runtest -! from cycling through optimization options for this expensive test. -! { dg-do run } +! { dg-do run } ! { dg-options "-O3 -fcray-pointer -fbounds-check -fno-inline" } ! { dg-timeout-factor 4 } ! diff --git a/gcc/testsuite/gfortran.dg/derived_result_4.f90 b/gcc/testsuite/gfortran.dg/derived_result_4.f90 new file mode 100644 index 0000000..12ab190 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/derived_result_4.f90 @@ -0,0 +1,38 @@ +! { dg-do compile } +! { dg-additional-options "-Wall -Wno-return-type -Wno-unused-variable" } +! +! PR fortran/118796 - bogus recursion with DT default initialization + +module m1 + implicit none + + type :: t1 + type(integer) :: f1 = 0 + end type t1 + + TYPE :: c1 + contains + procedure, public :: z + END TYPE c1 + +contains + ! type-bound procedure z has a default initialization + function z( this ) + type(t1) :: z + class(c1), intent(in) :: this + end function z +end module m1 + +module m2 + use m1, only : c1 +contains + function z() result(field) + end function z +end module m2 + +module m3 + use m1, only : c1 +contains + function z() + end function z +end module m3 diff --git a/gcc/testsuite/gfortran.dg/gomp/append-args-interop.f90 b/gcc/testsuite/gfortran.dg/gomp/append-args-interop.f90 new file mode 100644 index 0000000..f2c4d97 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/gomp/append-args-interop.f90 @@ -0,0 +1,28 @@ +! { dg-do compile } +! { dg-additional-options "-fdump-tree-gimple" } + +! Test that interop objects are implicitly created/destroyed when a dispatch +! construct doesn't provide enough of them to satisfy the declare variant +! append_args clause. + +module m + use iso_c_binding, only: c_intptr_t + integer, parameter :: omp_interop_kind = c_intptr_t +contains +subroutine g(x,y,z) + integer(omp_interop_kind) :: x, y, z + value :: y +end +subroutine f() + !$omp declare variant(f: g) append_args(interop(target), interop(prefer_type("cuda","hip"), targetsync), interop(target,targetsync,prefer_type({attr("ompx_foo")}))) match(construct={dispatch}) +end +end + +use m +!$omp dispatch device(99) + call f() +end + +! { dg-final { scan-tree-dump "__builtin_GOMP_interop \\(99, 3, interopobjs\.\[0-9\]+, tgt_tgtsync\.\[0-9\]+, pref_type\.\[0-9\]+, " "gimple" } } +! { dg-final { scan-tree-dump "__builtin_GOMP_interop \\(99, 0, 0B, 0B, 0B, 0, 0B, 3, interopobjs\.\[0-9\]+," "gimple" } } +! { dg-final { scan-tree-dump "g \\(&interop\.\[0-9\]+, interop\.\[0-9\]+, &interop\.\[0-9\]+\\)" "gimple" } } diff --git a/gcc/testsuite/gfortran.dg/gomp/declare-variant-mod-2.f90 b/gcc/testsuite/gfortran.dg/gomp/declare-variant-mod-2.f90 index f75b49c..ab44050 100644 --- a/gcc/testsuite/gfortran.dg/gomp/declare-variant-mod-2.f90 +++ b/gcc/testsuite/gfortran.dg/gomp/declare-variant-mod-2.f90 @@ -9,12 +9,6 @@ ! { dg-error "'x' at .1. is specified more than once" "" { target *-*-* } 17 } -! { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'm2_f1', except when specifying all 1 objects in the 'interop' clause of the 'dispatch' directive" "" { target *-*-* } 27 } -! { dg-note "required by 'dispatch' construct" "" { target *-*-* } 33 } -! { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'm2_f2', except when specifying all 2 objects in the 'interop' clause of the 'dispatch' directive" "" { target *-*-* } 27 } -! { dg-note "required by 'dispatch' construct" "" { target *-*-* } 37 } -! { dg-message "sorry, unimplemented: 'append_args' clause not yet supported for 'm2_f3', except when specifying all 3 objects in the 'interop' clause of the 'dispatch' directive" "" { target *-*-* } 27 } -! { dg-note "required by 'dispatch' construct" "" { target *-*-* } 43 } ! Check that module-file handling works for declare_variant ! and its match/adjust_args/append_args clauses diff --git a/gcc/testsuite/gfortran.dg/gomp/interop-5.f90 b/gcc/testsuite/gfortran.dg/gomp/interop-5.f90 index a6a2d71..a08eeb8 100644 --- a/gcc/testsuite/gfortran.dg/gomp/interop-5.f90 +++ b/gcc/testsuite/gfortran.dg/gomp/interop-5.f90 @@ -1,7 +1,13 @@ ! { dg-additional-options "-fdump-tree-omplower" } subroutine sub1 (a1, a2, a3, a4) - use omp_lib, only: omp_interop_kind + use iso_c_binding + implicit none + + ! The following definitions are in omp_lib, which cannot be included + ! in gcc/testsuite/ + integer, parameter :: omp_interop_kind = c_intptr_t + integer(omp_interop_kind) :: a1 ! by ref integer(omp_interop_kind), optional :: a2 ! as pointer integer(omp_interop_kind), allocatable :: a3 ! ref to pointer @@ -9,13 +15,13 @@ subroutine sub1 (a1, a2, a3, a4) integer(omp_interop_kind) :: b !$omp interop init(target : a1, a2, a3, a4, b) - ! { dg-final { scan-tree-dump-times "void \\* interopobjs\.\[0-9\]+\\\[5\\\];\[\r\n ]*integer\\(kind=4\\) tgt_tgtsync\.\[0-9\]+\\\[5\\\];\[\r\n ]*integer\\(kind=8\\) \\* & a3\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) \\* D\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) \\* a2\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) & a1\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[0\\\] = &b;\[\r\n ]*tgt_tgtsync\.\[0-9\]+\\\[0\\\] = 1;\[\r\n ]*interopobjs\.\[0-9\]+\\\[1\\\] = &a4;\[\r\n ]*tgt_tgtsync\.\[0-9\]+\\\[1\\\] = 1;\[\r\n ]*a3\.\[0-9\]+ = a3;\[\r\n ]*D\.\[0-9\]+ = \\*a3\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[2\\\] = D\.\[0-9\]+;\[\r\n ]*tgt_tgtsync\.\[0-9\]+\\\[2\\\] = 1;\[\r\n ]*a2\.\[0-9\]+ = a2;\[\r\n ]*interopobjs\.\[0-9\]+\\\[3\\\] = a2\.\[0-9\]+;\[\r\n ]*tgt_tgtsync\.\[0-9\]+\\\[3\\\] = 1;\[\r\n ]*a1\.\[0-9\]+ = a1;\[\r\n ]*interopobjs\.\[0-9\]+\\\[4\\\] = a1\.\[0-9\]+;\[\r\n ]*tgt_tgtsync\.\[0-9\]+\\\[4\\\] = 1;\[\r\n ]*__builtin_GOMP_interop \\(-5, 5, &interopobjs\.\[0-9\]+, &tgt_tgtsync\.\[0-9\]+, 0B, 0, 0B, 0, 0B, 0, 0B\\);" 1 "omplower" } } + ! { dg-final { scan-tree-dump-times "void \\* interopobjs\.\[0-9\]+\\\[5\\\];\[\r\n ]*integer\\(kind=4\\) tgt_tgtsync\.\[0-9\]+\\\[5\\\];\[\r\n ]*integer\\(kind=\[48\]\\) \\* & a3\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) \\* D\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) \\* a2\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) & a1\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[0\\\] = &b;\[\r\n ]*tgt_tgtsync\.\[0-9\]+\\\[0\\\] = 1;\[\r\n ]*interopobjs\.\[0-9\]+\\\[1\\\] = &a4;\[\r\n ]*tgt_tgtsync\.\[0-9\]+\\\[1\\\] = 1;\[\r\n ]*a3\.\[0-9\]+ = a3;\[\r\n ]*D\.\[0-9\]+ = \\*a3\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[2\\\] = D\.\[0-9\]+;\[\r\n ]*tgt_tgtsync\.\[0-9\]+\\\[2\\\] = 1;\[\r\n ]*a2\.\[0-9\]+ = a2;\[\r\n ]*interopobjs\.\[0-9\]+\\\[3\\\] = a2\.\[0-9\]+;\[\r\n ]*tgt_tgtsync\.\[0-9\]+\\\[3\\\] = 1;\[\r\n ]*a1\.\[0-9\]+ = a1;\[\r\n ]*interopobjs\.\[0-9\]+\\\[4\\\] = a1\.\[0-9\]+;\[\r\n ]*tgt_tgtsync\.\[0-9\]+\\\[4\\\] = 1;\[\r\n ]*__builtin_GOMP_interop \\(-5, 5, &interopobjs\.\[0-9\]+, &tgt_tgtsync\.\[0-9\]+, 0B, 0, 0B, 0, 0B, 0, 0B\\);" 1 "omplower" } } !$omp interop use(a1, a2, a3, a4, b) - ! { dg-final { scan-tree-dump-times "void \\* interopobjs\.\[0-9\]+\\\[5\\\];\[\r\n ]*integer\\(kind=8\\) b\.\[0-9\]+;\[\r\n ]*void \\* b\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) a4\.\[0-9\]+;\[\r\n ]*void \\* a4\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) \\* & a3\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) \\* D\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) D\.\[0-9\]+;\[\r\n ]*void \\* D\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) \\* a2\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) D\.\[0-9\]+;\[\r\n ]*void \\* D\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) & a1\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) D\.\[0-9\]+;\[\r\n ]*void \\* D\.\[0-9\]+;\[\r\n ]*b\.\[0-9\]+ = b;\[\r\n ]*b\.\[0-9\]+ = \\(void \\*\\) b\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[0\\\] = b\.\[0-9\]+;\[\r\n ]*a4\.\[0-9\]+ = a4;\[\r\n ]*a4\.\[0-9\]+ = \\(void \\*\\) a4\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[1\\\] = a4\.\[0-9\]+;\[\r\n ]*a3\.\[0-9\]+ = a3;\[\r\n ]*D\.\[0-9\]+ = \\*a3\.\[0-9\]+;\[\r\n ]*D\.\[0-9\]+ = \\*D\.\[0-9\]+;\[\r\n ]*D\.\[0-9\]+ = \\(void \\*\\) D\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[2\\\] = D\.\[0-9\]+;\[\r\n ]*a2\.\[0-9\]+ = a2;\[\r\n ]*D\.\[0-9\]+ = \\*a2\.\[0-9\]+;\[\r\n ]*D\.\[0-9\]+ = \\(void \\*\\) D\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[3\\\] = D\.\[0-9\]+;\[\r\n ]*a1\.\[0-9\]+ = a1;\[\r\n ]*D\.\[0-9\]+ = \\*a1\.\[0-9\]+;\[\r\n ]*D\.\[0-9\]+ = \\(void \\*\\) D\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[4\\\] = D\.\[0-9\]+;\[\r\n ]*__builtin_GOMP_interop \\(-5, 0, 0B, 0B, 0B, 5, &interopobjs\.\[0-9\]+, 0, 0B, 0, 0B\\);" 1 "omplower" } } + ! { dg-final { scan-tree-dump-times "void \\* interopobjs\.\[0-9\]+\\\[5\\\];\[\r\n ]*integer\\(kind=\[48\]\\) b\.\[0-9\]+;\[\r\n ]*void \\* b\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) a4\.\[0-9\]+;\[\r\n ]*void \\* a4\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) \\* & a3\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) \\* D\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) D\.\[0-9\]+;\[\r\n ]*void \\* D\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) \\* a2\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) D\.\[0-9\]+;\[\r\n ]*void \\* D\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) & a1\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) D\.\[0-9\]+;\[\r\n ]*void \\* D\.\[0-9\]+;\[\r\n ]*b\.\[0-9\]+ = b;\[\r\n ]*b\.\[0-9\]+ = \\(void \\*\\) b\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[0\\\] = b\.\[0-9\]+;\[\r\n ]*a4\.\[0-9\]+ = a4;\[\r\n ]*a4\.\[0-9\]+ = \\(void \\*\\) a4\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[1\\\] = a4\.\[0-9\]+;\[\r\n ]*a3\.\[0-9\]+ = a3;\[\r\n ]*D\.\[0-9\]+ = \\*a3\.\[0-9\]+;\[\r\n ]*D\.\[0-9\]+ = \\*D\.\[0-9\]+;\[\r\n ]*D\.\[0-9\]+ = \\(void \\*\\) D\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[2\\\] = D\.\[0-9\]+;\[\r\n ]*a2\.\[0-9\]+ = a2;\[\r\n ]*D\.\[0-9\]+ = \\*a2\.\[0-9\]+;\[\r\n ]*D\.\[0-9\]+ = \\(void \\*\\) D\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[3\\\] = D\.\[0-9\]+;\[\r\n ]*a1\.\[0-9\]+ = a1;\[\r\n ]*D\.\[0-9\]+ = \\*a1\.\[0-9\]+;\[\r\n ]*D\.\[0-9\]+ = \\(void \\*\\) D\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[4\\\] = D\.\[0-9\]+;\[\r\n ]*__builtin_GOMP_interop \\(-5, 0, 0B, 0B, 0B, 5, &interopobjs\.\[0-9\]+, 0, 0B, 0, 0B\\);" 1 "omplower" } } !$omp interop destroy(a1, a2, a3, a4, b) - ! { dg-final { scan-tree-dump-times "void \\* interopobjs\.\[0-9\]+\\\[5\\\];\[\r\n ]*integer\\(kind=8\\) \\* & a3\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) \\* D\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) \\* a2\.\[0-9\]+;\[\r\n ]*integer\\(kind=8\\) & a1\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[0\\\] = &b;\[\r\n ]*interopobjs\.\[0-9\]+\\\[1\\\] = &a4;\[\r\n ]*a3\.\[0-9\]+ = a3;\[\r\n ]*D\.\[0-9\]+ = \\*a3\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[2\\\] = D\.\[0-9\]+;\[\r\n ]*a2\.\[0-9\]+ = a2;\[\r\n ]*interopobjs\.\[0-9\]+\\\[3\\\] = a2\.\[0-9\]+;\[\r\n ]*a1\.\[0-9\]+ = a1;\[\r\n ]*interopobjs\.\[0-9\]+\\\[4\\\] = a1\.\[0-9\]+;\[\r\n ]*__builtin_GOMP_interop \\(-5, 0, 0B, 0B, 0B, 0, 0B, 5, &interopobjs\.\[0-9\]+, 0, 0B\\);" 1 "omplower" } } + ! { dg-final { scan-tree-dump-times "void \\* interopobjs\.\[0-9\]+\\\[5\\\];\[\r\n ]*integer\\(kind=\[48\]\\) \\* & a3\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) \\* D\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) \\* a2\.\[0-9\]+;\[\r\n ]*integer\\(kind=\[48\]\\) & a1\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[0\\\] = &b;\[\r\n ]*interopobjs\.\[0-9\]+\\\[1\\\] = &a4;\[\r\n ]*a3\.\[0-9\]+ = a3;\[\r\n ]*D\.\[0-9\]+ = \\*a3\.\[0-9\]+;\[\r\n ]*interopobjs\.\[0-9\]+\\\[2\\\] = D\.\[0-9\]+;\[\r\n ]*a2\.\[0-9\]+ = a2;\[\r\n ]*interopobjs\.\[0-9\]+\\\[3\\\] = a2\.\[0-9\]+;\[\r\n ]*a1\.\[0-9\]+ = a1;\[\r\n ]*interopobjs\.\[0-9\]+\\\[4\\\] = a1\.\[0-9\]+;\[\r\n ]*__builtin_GOMP_interop \\(-5, 0, 0B, 0B, 0B, 0, 0B, 5, &interopobjs\.\[0-9\]+, 0, 0B\\);" 1 "omplower" } } end subroutine diff --git a/gcc/testsuite/gfortran.dg/parity_2.f90 b/gcc/testsuite/gfortran.dg/parity_2.f90 index 5ff11da..9a8e035 100644 --- a/gcc/testsuite/gfortran.dg/parity_2.f90 +++ b/gcc/testsuite/gfortran.dg/parity_2.f90 @@ -6,7 +6,7 @@ ! Check implementation of PARITY ! implicit none -print *, parity([real ::]) ! { dg-error "must be LOGICAL" }) +print *, parity([real ::]) ! { dg-error "must be LOGICAL" } print *, parity([integer ::]) ! { dg-error "must be LOGICAL" } print *, parity([logical ::]) print *, parity(.true.) ! { dg-error "must be an array" } diff --git a/gcc/testsuite/gm2/iso/fail/conststrarray2.mod b/gcc/testsuite/gm2/iso/fail/conststrarray2.mod new file mode 100644 index 0000000..ab101d4 --- /dev/null +++ b/gcc/testsuite/gm2/iso/fail/conststrarray2.mod @@ -0,0 +1,30 @@ +MODULE conststrarray2 ; + +FROM libc IMPORT printf, exit ; + +CONST + HelloWorld = Hello + " " + World ; + Hello = "Hello" ; + World = "World" ; + + +(* + Assert - +*) + +PROCEDURE Assert (result: BOOLEAN) ; +BEGIN + IF NOT result + THEN + printf ("assertion failed\n") ; + exit (1) + END +END Assert ; + + +VAR + ch: CHAR ; +BEGIN + ch := HelloWorld[4] ; + Assert (ch = 'o') +END conststrarray2. diff --git a/gcc/testsuite/gm2/iso/run/pass/constarray2.mod b/gcc/testsuite/gm2/iso/run/pass/constarray2.mod new file mode 100644 index 0000000..19beb6f --- /dev/null +++ b/gcc/testsuite/gm2/iso/run/pass/constarray2.mod @@ -0,0 +1,33 @@ +MODULE constarray2 ; + +FROM libc IMPORT printf, exit ; + +TYPE + arraytype = ARRAY [0..11] OF CHAR ; + +CONST + Hello = "Hello" ; + World = "World" ; + HelloWorld = arraytype {Hello + " " + World} ; + + +(* + Assert - +*) + +PROCEDURE Assert (result: BOOLEAN) ; +BEGIN + IF NOT result + THEN + printf ("assertion failed\n") ; + exit (1) + END +END Assert ; + + +VAR + ch: CHAR ; +BEGIN + ch := HelloWorld[4] ; + Assert (ch = 'o') +END constarray2. diff --git a/gcc/testsuite/gm2/pim/pass/hexstring.mod b/gcc/testsuite/gm2/pim/pass/hexstring.mod new file mode 100644 index 0000000..9299282 --- /dev/null +++ b/gcc/testsuite/gm2/pim/pass/hexstring.mod @@ -0,0 +1,16 @@ +MODULE hexstring ; + +CONST + HexDigits = "0123456789ABCDEF" ; + +TYPE + ArrayType = ARRAY [0..HIGH (HexDigits)] OF CHAR ; + +CONST + HexArray = ArrayType { HexDigits } ; + +VAR + four: CHAR ; +BEGIN + four := HexArray[4] +END hexstring. diff --git a/gcc/testsuite/gm2/pim/pass/minmaxreal.mod b/gcc/testsuite/gm2/pim/pass/minmaxreal.mod new file mode 100644 index 0000000..2871f46 --- /dev/null +++ b/gcc/testsuite/gm2/pim/pass/minmaxreal.mod @@ -0,0 +1,7 @@ +MODULE minmaxreal ; + +CONST + min = MIN (REAL) ; + max = MAX (REAL) ; + +END minmaxreal. diff --git a/gcc/testsuite/gm2/pim/pass/minmaxreal2.mod b/gcc/testsuite/gm2/pim/pass/minmaxreal2.mod new file mode 100644 index 0000000..120c1b7 --- /dev/null +++ b/gcc/testsuite/gm2/pim/pass/minmaxreal2.mod @@ -0,0 +1,8 @@ +MODULE minmaxreal2 ; + +VAR + min, max: REAL ; +BEGIN + min := MIN (REAL) ; + max := MAX (REAL) +END minmaxreal2. diff --git a/gcc/testsuite/gm2/pim/pass/minmaxreal3.mod b/gcc/testsuite/gm2/pim/pass/minmaxreal3.mod new file mode 100644 index 0000000..30b5d1b --- /dev/null +++ b/gcc/testsuite/gm2/pim/pass/minmaxreal3.mod @@ -0,0 +1,10 @@ +MODULE minmaxreal3 ; + +FROM SYSTEM IMPORT REAL64 ; + +VAR + min, max: REAL64 ; +BEGIN + min := MIN (REAL64) ; + max := MAX (REAL64) +END minmaxreal3. diff --git a/gcc/testsuite/gnat.dg/sso/q11.adb b/gcc/testsuite/gnat.dg/sso/q11.adb index 22ac557..39853ef 100644 --- a/gcc/testsuite/gnat.dg/sso/q11.adb +++ b/gcc/testsuite/gnat.dg/sso/q11.adb @@ -31,7 +31,7 @@ begin Put ("B2 :"); Dump (B2'Address, R2'Max_Size_In_Storage_Elements); New_Line; - -- { dg-output "B2 : 12 34 56 78 00 ab 00 12 00 cd 00 34 00 ef 00 56.*\n"} + -- { dg-output "B2 : 12 34 56 78 00 ab 00 12 00 cd 00 34 00 ef 00 56.*\n" } if A1.I /= B1.I or A1.A(1) /= B1.A(1) then raise Program_Error; diff --git a/gcc/testsuite/lib/gcov.exp b/gcc/testsuite/lib/gcov.exp index c1aceec..ae42c39 100644 --- a/gcc/testsuite/lib/gcov.exp +++ b/gcc/testsuite/lib/gcov.exp @@ -537,6 +537,112 @@ proc verify-filters { testname testcase file expected unexpected } { return [expr [llength $ex] + [llength $unex]] } +proc verify-prime-paths { testname testcase file } { + set failed 0 + set fd [open $file r] + + set expected_n -1 + set expected_m -1 + set recording 0 + set expected "" + + while { [gets $fd line] >= 0 } { + regexp "^\[^:\]+: *(\[0-9\]+):" "$line" all lineno + set prefix "$testname line $lineno" + + if {[regexp "BEGIN *paths" $line]} { + set recording 1 + set expected "" + set expected_covered "" + set expected_n -1 + set expected_m -1 + set seen "" + continue + } + + if { $recording != 1 } { + continue + } + + if [regexp {summary: *(\d+)/(\d+)} $line _ n m] { + set expected_n $n + set expected_m $m + } + + if [regexp "expect: *(.*)" $line all ln] { + set cases "" + set ln [regsub -all {\s+} $ln " "] + foreach case [split $ln " "] { + lappend cases $case + } + lappend expected $cases + } + + if [regexp "expect covered: *(.*)" $line all ln] { + set cases "" + set ln [regsub -all {\s+} $ln " "] + foreach case [split $ln " "] { + lappend cases $case + } + lappend expected_covered $cases + } + + if [regexp "END" $line] { + if {$recording != 1} { + incr failed + fail "unexpected END at line $lineno, missing BEGIN" + + # Abort the test if there is a mismatch, to avoid creating + # unecessary errors. At this point the test itself is broken. + break + } + set recording 0 + + if {[llength $expected] > 0} { + incr failed + fail "expected: '$expected'" + } + + if {[llength $expected_covered] > 0} { + incr failed + fail "expected covered: '$expected_covered'" + } + } + + if [regexp {paths covered (\d+) of (\d+)} $line _ n m] { + if { $n ne $expected_n || $m ne $expected_m } { + incr failed + fail "$prefix: expected $expected_n/$expected_m covered paths, was $n/$m" + } + } + + if [regexp {path *\d+ not covered: lines (.*)} $line _ path] { + set pathl "" + foreach ln [split $path " "] { + if [regexp {\s*(.*)\s*} $ln _ key] { + lappend pathl $key + } + } + set i [lsearch $expected $pathl] + set expected [lreplace $expected $i $i] + } + + if [regexp {path *\d+ covered: lines (.*)} $line _ path] { + set pathl "" + foreach ln [split $path " "] { + if [regexp {\s*(.*)\s*} $ln _ key] { + lappend pathl $key + } + } + set i [lsearch $expected_covered $pathl] + set expected_covered [lreplace $expected_covered $i $i] + } + } + + close $fd + return $failed +} + proc gcov-pytest-format-line { args } { global subdir @@ -610,6 +716,7 @@ proc run-gcov { args } { set gcov_verify_calls 0 set gcov_verify_branches 0 set gcov_verify_conditions 0 + set gcov_verify_prime_paths 0 set gcov_verify_lines 1 set gcov_verify_intermediate 0 set gcov_verify_filters 0 @@ -627,6 +734,8 @@ proc run-gcov { args } { set gcov_verify_filters 1 set verify_filters_expected [lindex $a 1] set verify_filters_unexpected [lindex $a 2] + } elseif { $a == "prime-paths" } { + set gcov_verify_prime_paths 1 } elseif { $a == "intermediate" } { set gcov_verify_intermediate 1 set gcov_verify_calls 0 @@ -707,6 +816,11 @@ proc run-gcov { args } { } else { set cdfailed 0 } + if { $gcov_verify_prime_paths } { + set ppfailed [verify-prime-paths $testname $testcase $testcase.gcov] + } else { + set ppfailed 0 + } if { $gcov_verify_calls } { set cfailed [verify-calls $testname $testcase $testcase.gcov] } else { @@ -726,12 +840,12 @@ proc run-gcov { args } { # Report whether the gcov test passed or failed. If there were # multiple failures then the message is a summary. - set tfailed [expr $lfailed + $bfailed + $cdfailed + $cfailed + $ifailed + $ffailed] + set tfailed [expr $lfailed + $bfailed + $cdfailed + $ppfailed + $cfailed + $ifailed + $ffailed] if { $xfailed } { setup_xfail "*-*-*" } if { $tfailed > 0 } { - fail "$testname gcov: $lfailed failures in line counts, $bfailed in branch percentages, $cdfailed in condition/decision, $cfailed in return percentages, $ifailed in intermediate format, $ffailed failed in filters" + fail "$testname gcov: $lfailed failures in line counts, $bfailed in branch percentages, $cdfailed in condition/decision, $ppfailed in prime-paths, $cfailed in return percentages, $ifailed in intermediate format, $ffailed failed in filters" if { $xfailed } { clean-gcov $testcase } diff --git a/gcc/testsuite/lib/gfortran-dg.exp b/gcc/testsuite/lib/gfortran-dg.exp index a516bab..4abf2fe 100644 --- a/gcc/testsuite/lib/gfortran-dg.exp +++ b/gcc/testsuite/lib/gfortran-dg.exp @@ -149,7 +149,13 @@ proc gfortran-dg-runtest { testcases flags default-extra-flags } { # look if this is dg-do run test, in which case # we cycle through the option list, otherwise we don't if [expr [search_for $test "dg-do run"]] { - set option_list $torture_with_loops + if { [ expr [search_for $test "dg-options*\[ \t\"\{]-O"] ] \ + || [ expr [search_for $test \ + "dg-additional-options*\[ \t\"\{]-O"] ] } { + set option_list [list { -O } ] + } else { + set option_list $torture_with_loops + } } else { set option_list [list { -O } ] } diff --git a/gcc/testsuite/lib/multiline.exp b/gcc/testsuite/lib/multiline.exp index 22b5e0e..08fd969 100644 --- a/gcc/testsuite/lib/multiline.exp +++ b/gcc/testsuite/lib/multiline.exp @@ -17,7 +17,7 @@ # Testing of multiline output # We have pre-existing testcases like this: -# |typedef struct _GMutex GMutex; // { dg-message "previously declared here"} +# |typedef struct _GMutex GMutex; // { dg-message "previously declared here" } # (using "|" here to indicate the start of a line), # generating output like this: # |gcc/testsuite/g++.dg/diagnostic/wrong-tag-1.C:4:16: note: 'struct _GMutex' was previously declared here @@ -27,7 +27,7 @@ # To handle rich error-reporting, we want to be able to verify that we # get output like this: # |gcc/testsuite/g++.dg/diagnostic/wrong-tag-1.C:4:16: note: 'struct _GMutex' was previously declared here -# | typedef struct _GMutex GMutex; // { dg-message "previously declared here"} +# | typedef struct _GMutex GMutex; // { dg-message "previously declared here" } # | ^~~~~~~ # where the compiler's first line of output is as before, but in # which it then echoes the source lines, adding annotations. diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 2a3bdd2..ee4138a 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2078,7 +2078,7 @@ proc check_effective_target_riscv_zvfh { } { # Return 1 if the target arch supports half float, 0 otherwise. # Note, this differs from the test performed by -# /* dg-skip-if "" { *-*-* } { "*" } { "-march=rv*zfh*" } */ +# /* { dg-skip-if "" { *-*-* } { "*" } { "-march=rv*zfh*" } } */ # in that it takes default behaviour into account. # Cache the result. @@ -11018,9 +11018,9 @@ proc check_effective_target_apxf { } { } "-mapxf" ] } -# Return 1 if avx10.2-256 instructions can be compiled. -proc check_effective_target_avx10_2_256 { } { - return [check_no_compiler_messages avx10.2-256 object { +# Return 1 if avx10.2 instructions can be compiled. +proc check_effective_target_avx10_2 { } { + return [check_no_compiler_messages avx10.2 object { void foo () { @@ -11029,16 +11029,6 @@ proc check_effective_target_avx10_2_256 { } { __asm__ volatile ("vaddbf16\t%ymm4, %ymm5, %ymm6"); __asm__ volatile ("vcvtph2ibs\t%ymm5, %ymm6"); __asm__ volatile ("vminmaxpd\t$123, %ymm4, %ymm5, %ymm6"); - } - } "" ] -} - -# Return 1 if avx10.2-512 instructions can be compiled. -proc check_effective_target_avx10_2_512 { } { - return [check_no_compiler_messages avx10.2-512 object { - void - foo () - { __asm__ volatile ("vdpphps\t%zmm4, %zmm5, %zmm6"); __asm__ volatile ("vcvthf82ph\t%ymm5, %zmm6"); __asm__ volatile ("vaddbf16\t%zmm4, %zmm5, %zmm6"); @@ -13514,7 +13504,7 @@ proc check_effective_target_arm_v8_1_lob_ok { } { asm goto ("le lr, %l0" : : : "lr" : loop); return i != 10; } - } "-mcpu=unset -mcpu=unset -march=armv8.1-m.main -mthumb" ] + } "-mcpu=unset -march=armv8.1-m.main -mthumb" ] } } diff --git a/gcc/testsuite/rust/compile/additional-trait-bounds2.rs b/gcc/testsuite/rust/compile/additional-trait-bounds2.rs index 843228a..1c49b75 100644 --- a/gcc/testsuite/rust/compile/additional-trait-bounds2.rs +++ b/gcc/testsuite/rust/compile/additional-trait-bounds2.rs @@ -6,4 +6,4 @@ pub unsafe auto trait Sync {} trait A {} -impl dyn A + Send + Sync + NonExist {} // { dg-error "failed to resolve TypePath: NonExist in this scope" } +impl dyn A + Send + Sync + NonExist {} // { dg-error "could not resolve type path .NonExist." } diff --git a/gcc/testsuite/rust/compile/auto_traits2.rs b/gcc/testsuite/rust/compile/auto_traits2.rs index 7d0dcc1..382d446 100644 --- a/gcc/testsuite/rust/compile/auto_traits2.rs +++ b/gcc/testsuite/rust/compile/auto_traits2.rs @@ -15,12 +15,11 @@ fn foo(a: &(dyn A + Send + Sync)) { struct S; impl A for S { - fn a_method(&self) {} + fn a_method(&self) {} // { dg-warning "unused name" } } fn main() { let s = S; - foo(&s); // { dg-error "bounds not satisfied" } - // { dg-error "mismatched type" "" { target *-*-* } .-1 } + foo(&s); } diff --git a/gcc/testsuite/rust/compile/auto_traits3.rs b/gcc/testsuite/rust/compile/auto_traits3.rs deleted file mode 100644 index 81c39ec..0000000 --- a/gcc/testsuite/rust/compile/auto_traits3.rs +++ /dev/null @@ -1,34 +0,0 @@ -#![feature(optin_builtin_traits)] - -pub unsafe auto trait Send {} -#[lang = "sync"] -pub unsafe auto trait Sync {} - -trait A { - fn a_method(&self) {} -} - -fn foo(a: &(dyn A + Send + Sync)) { - a.a_method(); -} - -struct S; - -impl A for S { - fn a_method(&self) {} // { dg-warning "unused" } -} - -// These should not be necessary because they are both auto traits -// They need to be removed once we figure out the proper implementation for each of them -// However, it'd be silly to implement other traits in order to ensure the test is okay, -// as these extra trait bounds are only allowed to use auto traits -// FIXME: #3327 -// FIXME: #3326 -unsafe impl Send for S {} -unsafe impl Sync for S {} - -fn main() { - let s = S; - - foo(&s); -} diff --git a/gcc/testsuite/rust/compile/auto_traits4.rs b/gcc/testsuite/rust/compile/auto_traits4.rs new file mode 100644 index 0000000..f1cd1e4 --- /dev/null +++ b/gcc/testsuite/rust/compile/auto_traits4.rs @@ -0,0 +1,14 @@ +#![feature(optin_builtin_traits)] + +unsafe auto trait Send {} +unsafe auto trait Sync {} + +fn take_send(_: &dyn Send) {} +fn take_sync(_: &dyn Sync) {} + +fn main() { + let a = i32; + + take_send(&a); + take_sync(&a); +} diff --git a/gcc/testsuite/rust/compile/const_generics_4.rs b/gcc/testsuite/rust/compile/const_generics_4.rs index b364d3b..2766e4c 100644 --- a/gcc/testsuite/rust/compile/const_generics_4.rs +++ b/gcc/testsuite/rust/compile/const_generics_4.rs @@ -4,4 +4,4 @@ const P: usize = 14; struct Foo<const N: usize = { M }>; // { dg-error "cannot find value .M. in this scope" } struct Bar<const N: usize = { P }>; -struct Baz<const N: NotAType = { P }>; // { dg-error "failed to resolve TypePath: NotAType in this scope" } +struct Baz<const N: NotAType = { P }>; // { dg-error "could not resolve type path .NotAType." } diff --git a/gcc/testsuite/rust/compile/const_generics_7.rs b/gcc/testsuite/rust/compile/const_generics_7.rs index 2c128db..dad4c21 100644 --- a/gcc/testsuite/rust/compile/const_generics_7.rs +++ b/gcc/testsuite/rust/compile/const_generics_7.rs @@ -1,17 +1,17 @@ struct S<const N: usize>; -pub fn foo<const N: FooBar>() {} // { dg-error "failed to resolve" } -type Foo<const N: FooBar> = S<N>; // { dg-error "failed to resolve" } -struct Foo2<const N: FooBar>; // { dg-error "failed to resolve" } -enum Foo3<const N: FooBar> { // { dg-error "failed to resolve" } +pub fn foo<const N: FooBar>() {} // { dg-error "could not resolve" } +type Foo<const N: FooBar> = S<N>; // { dg-error "could not resolve" } +struct Foo2<const N: FooBar>; // { dg-error "could not resolve" } +enum Foo3<const N: FooBar> { // { dg-error "could not resolve" } Foo, Bar, } -union Foo4<const N: FooBar> { // { dg-error "failed to resolve" } +union Foo4<const N: FooBar> { // { dg-error "could not resolve" } a: usize, b: i32, } -trait Fooable<const N: FooBar> {} // { dg-error "failed to resolve" } +trait Fooable<const N: FooBar> {} // { dg-error "could not resolve" } trait Traitable {} -impl<const N: FooBar> Traitable for Foo2<N> {} // { dg-error "failed to resolve" } +impl<const N: FooBar> Traitable for Foo2<N> {} // { dg-error "could not resolve" } diff --git a/gcc/testsuite/rust/compile/crate-metavar1.rs b/gcc/testsuite/rust/compile/crate-metavar1.rs new file mode 100644 index 0000000..45384e1 --- /dev/null +++ b/gcc/testsuite/rust/compile/crate-metavar1.rs @@ -0,0 +1,14 @@ +macro_rules! foo { + () => { + $crate::inner::bar() + } +} + +pub mod inner { + pub fn bar() { } +} + +fn main() { + foo!(); + crate::inner::bar(); +} diff --git a/gcc/testsuite/rust/compile/derive-debug1.rs b/gcc/testsuite/rust/compile/derive-debug1.rs new file mode 100644 index 0000000..2596a37 --- /dev/null +++ b/gcc/testsuite/rust/compile/derive-debug1.rs @@ -0,0 +1,41 @@ +#[lang = "sized"] +trait Sized {} + +mod core { + pub mod result { + pub enum Result<T, E> { + #[lang = "Ok"] + Ok(T), + #[lang = "Err"] + Err(E), + } + } + + mod fmt { + struct Formatter; // { dg-warning "is never constructed" } + struct Error; // { dg-warning "is never constructed" } + + type Result = core::result::Result<(), Error>; + + trait Debug { + fn fmt(&self, fmt: &mut Formatter) -> Result; + } + } +} + +#[derive(Debug)] // { dg-warning "unused name" } +// { dg-warning "stub implementation" "" { target *-*-* } .-1 } +struct Foo { a: i32, b: i64 } // { dg-warning "is never constructed" } + +#[derive(Debug)] // { dg-warning "unused name" } +// { dg-warning "stub implementation" "" { target *-*-* } .-1 } +struct Bar(i32, i32); // { dg-warning "is never constructed" } + +#[derive(Debug)] // { dg-warning "unused name" } +// { dg-warning "stub implementation" "" { target *-*-* } .-1 } +enum Baz { + A, + B(i32), + C { a: i32 } +} + diff --git a/gcc/testsuite/rust/compile/derive-default1.rs b/gcc/testsuite/rust/compile/derive-default1.rs new file mode 100644 index 0000000..902c65e --- /dev/null +++ b/gcc/testsuite/rust/compile/derive-default1.rs @@ -0,0 +1,29 @@ +#[derive(Default)] +struct Foo { _a: i32, _b: i64, _c: u8 } + +#[lang = "sized"] +trait Sized {} + +mod core { + mod default { + trait Default: Sized { + fn default() -> Self; + } + + impl Default for i32 { + fn default() -> Self { 0 } + } + + impl Default for i64 { + fn default() -> Self { 27 } + } + + impl Default for u8 { + fn default() -> Self { 18 } + } + } +} + +fn main() { + let _ = Foo::default(); +} diff --git a/gcc/testsuite/rust/compile/derive-eq-invalid.rs b/gcc/testsuite/rust/compile/derive-eq-invalid.rs new file mode 100644 index 0000000..b0bf856 --- /dev/null +++ b/gcc/testsuite/rust/compile/derive-eq-invalid.rs @@ -0,0 +1,52 @@ +mod core { + mod cmp { + #[lang = "eq"] + pub trait PartialEq<Rhs: ?Sized = Self> { + fn eq(&self, other: &Rhs) -> bool; + + fn ne(&self, other: &Rhs) -> bool { + !self.eq(other) + } + } + + pub trait Eq: PartialEq<Self> { + fn assert_receiver_is_total_eq(&self) {} + } + } +} + +#[lang = "phantom_data"] +struct PhantomData<T>; + +#[lang = "sized"] +trait Sized {} + +#[lang = "structural_peq"] +trait StructuralPartialEq {} + +#[lang = "structural_teq"] +trait StructuralEq {} + +#[derive(PartialEq)] +struct NotEq; + +#[derive(Eq, PartialEq)] // { dg-error "bounds not satisfied for NotEq .Eq." } +struct Container(NotEq); + +// #[derive(Eq)] +// struct Foo { a: i32 } +// #[derive(Eq)] +// struct Bar(i32); + +// #[derive(Eq)] +// enum Baz { +// A, +// B(i32), +// C { a: i32 } +// } + +// #[derive(Eq)] +// union Qux { +// a: i32, +// b: i64, +// } diff --git a/gcc/testsuite/rust/compile/derive-hash1.rs b/gcc/testsuite/rust/compile/derive-hash1.rs new file mode 100644 index 0000000..80e1e2d --- /dev/null +++ b/gcc/testsuite/rust/compile/derive-hash1.rs @@ -0,0 +1,91 @@ +#![feature(intrinsics)] + +#[lang = "sized"] +trait Sized {} + +pub mod core { + pub mod intrinsics { + #[lang = "discriminant_kind"] + pub trait DiscriminantKind { + #[lang = "discriminant_type"] + type Discriminant; + } + + extern "rust-intrinsic" { + pub fn discriminant_value<T>(v: &T) -> <T as DiscriminantKind>::Discriminant; + } + } + + pub mod hash { + pub trait Hasher {} + + pub trait Hash { + /// Feeds this value into the given [`Hasher`]. + /// + /// # Examples + /// + /// ``` + /// use std::collections::hash_map::DefaultHasher; + /// use std::hash::{Hash, Hasher}; + /// + /// let mut hasher = DefaultHasher::new(); + /// 7920.hash(&mut hasher); + /// println!("Hash is {:x}!", hasher.finish()); + /// ``` + #[stable(feature = "rust1", since = "1.0.0")] + fn hash<H: Hasher>(&self, state: &mut H); + + /// Feeds a slice of this type into the given [`Hasher`]. + /// + /// # Examples + /// + /// ``` + /// use std::collections::hash_map::DefaultHasher; + /// use std::hash::{Hash, Hasher}; + /// + /// let mut hasher = DefaultHasher::new(); + /// let numbers = [6, 28, 496, 8128]; + /// Hash::hash_slice(&numbers, &mut hasher); + /// println!("Hash is {:x}!", hasher.finish()); + /// ``` + #[stable(feature = "hash_slice", since = "1.3.0")] + fn hash_slice<H: Hasher>(data: &[Self], state: &mut H) + where + Self: Sized, + { + // for piece in data { + // piece.hash(state); + // } + } + } + } +} + +impl core::hash::Hash for i32 { + fn hash<H: core::hash::Hasher>(&self, state: &mut H) {} +} + +impl core::hash::Hash for i64 { + fn hash<H: core::hash::Hasher>(&self, state: &mut H) {} +} + +// for the discriminant value +impl core::hash::Hash for isize { + fn hash<H: core::hash::Hasher>(&self, state: &mut H) {} +} + +#[derive(Hash)] +struct Foo { // { dg-warning "never constructed" } + a: i32, + b: i32, +} + +#[derive(Hash)] +struct Bar(i32, i64); // { dg-warning "never constructed" } + +#[derive(Hash)] +enum Baz { + A, + B(i32), + C { a: i64 } +} diff --git a/gcc/testsuite/rust/compile/derive-partialeq1.rs b/gcc/testsuite/rust/compile/derive-partialeq1.rs new file mode 100644 index 0000000..35e33fb --- /dev/null +++ b/gcc/testsuite/rust/compile/derive-partialeq1.rs @@ -0,0 +1,62 @@ +#![feature(intrinsics)] + +#[lang = "sized"] +trait Sized {} + +#[lang = "copy"] +trait Copy {} + +#[lang = "structural_peq"] +trait StructuralPartialEq {} + +#[lang = "eq"] +pub trait PartialEq<Rhs: ?Sized = Self> { + /// This method tests for `self` and `other` values to be equal, and is used + /// by `==`. + #[must_use] + #[stable(feature = "rust1", since = "1.0.0")] + fn eq(&self, other: &Rhs) -> bool; + + /// This method tests for `!=`. + #[inline] + #[must_use] + #[stable(feature = "rust1", since = "1.0.0")] + fn ne(&self, other: &Rhs) -> bool { + !self.eq(other) + } +} + +#[derive(PartialEq, Copy)] // { dg-warning "unused name" } +struct Foo; + +#[derive(PartialEq)] +struct Bar(Foo); + +#[derive(PartialEq)] +struct Baz { _inner: Foo } + +extern "C" { + fn puts(s: *const i8); +} + +fn print(b: bool) { + if b { + unsafe { puts("true" as *const str as *const i8) } + } else { + unsafe { puts("false" as *const str as *const i8) } + } +} + +fn main() -> i32 { + let x = Foo; + + let b1 = x == Foo; + let b2 = Bar(x) != Bar(Foo); + let b3 = Baz { _inner: Foo } != Baz { _inner: x }; + + print(b1); + print(b2); + print(b3); + + 0 +} diff --git a/gcc/testsuite/rust/compile/derive_macro6.rs b/gcc/testsuite/rust/compile/derive_macro6.rs index 35327c0..412144d 100644 --- a/gcc/testsuite/rust/compile/derive_macro6.rs +++ b/gcc/testsuite/rust/compile/derive_macro6.rs @@ -1,9 +1,9 @@ #[lang = "sized"] pub trait Sized {} +#[lang = "copy"] pub trait Copy {} - #[lang = "clone"] pub trait Clone { fn clone(&self) -> Self; diff --git a/gcc/testsuite/rust/compile/enum_variant_name.rs b/gcc/testsuite/rust/compile/enum_variant_name.rs new file mode 100644 index 0000000..671fced --- /dev/null +++ b/gcc/testsuite/rust/compile/enum_variant_name.rs @@ -0,0 +1,12 @@ +// { dg-additional-options "-w -frust-name-resolution-2.0" } +struct E1; + +enum Test { + E1 = { + let x = E1; + { + let x = E1; + } + 0 + }, +} diff --git a/gcc/testsuite/rust/compile/extern_generics.rs b/gcc/testsuite/rust/compile/extern_generics.rs new file mode 100644 index 0000000..26f97a6 --- /dev/null +++ b/gcc/testsuite/rust/compile/extern_generics.rs @@ -0,0 +1,8 @@ +#[lang="sized"] +trait Sized {} + + +// E0044 +fn main() { +extern "C" { fn some_func<T>(x: T); } // { dg-error "foreign items may not have type parameters .E0044." } +}
\ No newline at end of file diff --git a/gcc/testsuite/rust/compile/for-loop1.rs b/gcc/testsuite/rust/compile/for-loop1.rs new file mode 100644 index 0000000..1023ecd --- /dev/null +++ b/gcc/testsuite/rust/compile/for-loop1.rs @@ -0,0 +1,543 @@ +// { dg-output "loop\r*\nloop\r*\n" } +#![feature(intrinsics)] + +pub use option::Option::{self, None, Some}; +pub use result::Result::{self, Err, Ok}; + +extern "C" { + fn printf(s: *const i8, ...); + fn puts(s: *const i8); +} + +mod option { + pub enum Option<T> { + #[lang = "None"] + None, + #[lang = "Some"] + Some(T), + } +} + +mod result { + enum Result<T, E> { + Ok(T), + Err(E), + } +} + +#[lang = "sized"] +pub trait Sized {} + +#[lang = "clone"] +pub trait Clone: Sized { + fn clone(&self) -> Self; + + fn clone_from(&mut self, source: &Self) { + *self = source.clone() + } +} + +mod impls { + use super::Clone; + + macro_rules! impl_clone { + ($($t:ty)*) => { + $( + impl Clone for $t { + fn clone(&self) -> Self { + *self + } + } + )* + } + } + + impl_clone! { + usize u8 u16 u32 u64 // u128 + isize i8 i16 i32 i64 // i128 + f32 f64 + bool char + } +} + +#[lang = "copy"] +pub trait Copy: Clone { + // Empty. +} + +mod copy_impls { + use super::Copy; + + macro_rules! impl_copy { + ($($t:ty)*) => { + $( + impl Copy for $t {} + )* + } + } + + impl_copy! { + usize u8 u16 u32 u64 // u128 + isize i8 i16 i32 i64 // i128 + f32 f64 + bool char + } +} + +mod intrinsics { + extern "rust-intrinsic" { + pub fn add_with_overflow<T>(x: T, y: T) -> (T, bool); + pub fn wrapping_add<T>(a: T, b: T) -> T; + pub fn wrapping_sub<T>(a: T, b: T) -> T; + pub fn rotate_left<T>(a: T, b: T) -> T; + pub fn rotate_right<T>(a: T, b: T) -> T; + pub fn offset<T>(ptr: *const T, count: isize) -> *const T; + pub fn copy_nonoverlapping<T>(src: *const T, dst: *mut T, count: usize); + pub fn move_val_init<T>(dst: *mut T, src: T); + pub fn uninit<T>() -> T; + } +} + +mod ptr { + #[lang = "const_ptr"] + impl<T> *const T { + pub unsafe fn offset(self, count: isize) -> *const T { + intrinsics::offset(self, count) + } + } + + #[lang = "mut_ptr"] + impl<T> *mut T { + pub unsafe fn offset(self, count: isize) -> *mut T { + intrinsics::offset(self, count) as *mut T + } + } + + pub unsafe fn swap_nonoverlapping<T>(x: *mut T, y: *mut T, count: usize) { + let x = x as *mut u8; + let y = y as *mut u8; + let len = mem::size_of::<T>() * count; + swap_nonoverlapping_bytes(x, y, len) + } + + pub unsafe fn swap_nonoverlapping_one<T>(x: *mut T, y: *mut T) { + // For types smaller than the block optimization below, + // just swap directly to avoid pessimizing codegen. + if mem::size_of::<T>() < 32 { + let z = read(x); + intrinsics::copy_nonoverlapping(y, x, 1); + write(y, z); + } else { + swap_nonoverlapping(x, y, 1); + } + } + + pub unsafe fn write<T>(dst: *mut T, src: T) { + intrinsics::move_val_init(&mut *dst, src) + } + + pub unsafe fn read<T>(src: *const T) -> T { + let mut tmp: T = mem::uninitialized(); + intrinsics::copy_nonoverlapping(src, &mut tmp, 1); + tmp + } + + pub unsafe fn swap_nonoverlapping_bytes(x: *mut u8, y: *mut u8, len: usize) { + struct Block(u64, u64, u64, u64); + struct UnalignedBlock(u64, u64, u64, u64); + + let block_size = mem::size_of::<Block>(); + + // Loop through x & y, copying them `Block` at a time + // The optimizer should unroll the loop fully for most types + // N.B. We can't use a for loop as the `range` impl calls `mem::swap` recursively + let mut i: usize = 0; + while i + block_size <= len { + // Create some uninitialized memory as scratch space + // Declaring `t` here avoids aligning the stack when this loop is unused + let mut t: Block = mem::uninitialized(); + let t = &mut t as *mut _ as *mut u8; + let x = x.offset(i as isize); + let y = y.offset(i as isize); + + // Swap a block of bytes of x & y, using t as a temporary buffer + // This should be optimized into efficient SIMD operations where available + intrinsics::copy_nonoverlapping(x, t, block_size); + intrinsics::copy_nonoverlapping(y, x, block_size); + intrinsics::copy_nonoverlapping(t, y, block_size); + i += block_size; + } + + if i < len { + // Swap any remaining bytes + let mut t: UnalignedBlock = mem::uninitialized(); + let rem = len - i; + + let t = &mut t as *mut _ as *mut u8; + let x = x.offset(i as isize); + let y = y.offset(i as isize); + + intrinsics::copy_nonoverlapping(x, t, rem); + intrinsics::copy_nonoverlapping(y, x, rem); + intrinsics::copy_nonoverlapping(t, y, rem); + } + } +} + +mod mem { + extern "rust-intrinsic" { + #[rustc_const_stable(feature = "const_transmute", since = "1.46.0")] + pub fn transmute<T, U>(_: T) -> U; + #[rustc_const_stable(feature = "const_size_of", since = "1.40.0")] + pub fn size_of<T>() -> usize; + } + + pub fn swap<T>(x: &mut T, y: &mut T) { + unsafe { + ptr::swap_nonoverlapping_one(x, y); + } + } + + pub fn replace<T>(dest: &mut T, mut src: T) -> T { + swap(dest, &mut src); + src + } + + pub unsafe fn uninitialized<T>() -> T { + intrinsics::uninit() + } +} + +macro_rules! impl_uint { + ($($ty:ident = $lang:literal),*) => { + $( + impl $ty { + pub fn wrapping_add(self, rhs: Self) -> Self { + unsafe { + intrinsics::wrapping_add(self, rhs) + } + } + + pub fn wrapping_sub(self, rhs: Self) -> Self { + unsafe { + intrinsics::wrapping_sub(self, rhs) + } + } + + pub fn rotate_left(self, n: u32) -> Self { + unsafe { + intrinsics::rotate_left(self, n as Self) + } + } + + pub fn rotate_right(self, n: u32) -> Self { + unsafe { + intrinsics::rotate_right(self, n as Self) + } + } + + pub fn to_le(self) -> Self { + #[cfg(target_endian = "little")] + { + self + } + } + + pub const fn from_le_bytes(bytes: [u8; mem::size_of::<Self>()]) -> Self { + Self::from_le(Self::from_ne_bytes(bytes)) + } + + pub const fn from_le(x: Self) -> Self { + #[cfg(target_endian = "little")] + { + x + } + } + + pub const fn from_ne_bytes(bytes: [u8; mem::size_of::<Self>()]) -> Self { + unsafe { mem::transmute(bytes) } + } + + pub fn checked_add(self, rhs: Self) -> Option<Self> { + let (a, b) = self.overflowing_add(rhs); + if b { + Option::None + } else { + Option::Some(a) + } + } + + pub fn overflowing_add(self, rhs: Self) -> (Self, bool) { + let (a, b) = unsafe { intrinsics::add_with_overflow(self as $ty, rhs as $ty) }; + (a as Self, b) + } + } + )* + } +} + +impl_uint!( + u8 = "u8", + u16 = "u16", + u32 = "u32", + u64 = "u64", + usize = "usize" +); + +#[lang = "add"] +pub trait Add<RHS = Self> { + type Output; + + fn add(self, rhs: RHS) -> Self::Output; +} +macro_rules! add_impl { + ($($t:ty)*) => ($( + impl Add for $t { + type Output = $t; + + fn add(self, other: $t) -> $t { self + other } + } + )*) +} + +add_impl! { usize u8 u16 u32 u64 /*isize i8 i16 i32 i64*/ f32 f64 } + +#[lang = "sub"] +pub trait Sub<RHS = Self> { + type Output; + + fn sub(self, rhs: RHS) -> Self::Output; +} +macro_rules! sub_impl { + ($($t:ty)*) => ($( + impl Sub for $t { + type Output = $t; + + fn sub(self, other: $t) -> $t { self - other } + } + )*) +} + +sub_impl! { usize u8 u16 u32 u64 /*isize i8 i16 i32 i64*/ f32 f64 } + +#[lang = "Range"] +pub struct Range<Idx> { + pub start: Idx, + pub end: Idx, +} + +pub trait TryFrom<T>: Sized { + /// The type returned in the event of a conversion error. + type Error; + + /// Performs the conversion. + fn try_from(value: T) -> Result<Self, Self::Error>; +} + +pub trait From<T>: Sized { + fn from(_: T) -> Self; +} + +impl<T> From<T> for T { + fn from(t: T) -> T { + t + } +} + +impl<T, U> TryFrom<U> for T +where + T: From<U>, +{ + type Error = !; + + fn try_from(value: U) -> Result<Self, Self::Error> { + Ok(T::from(value)) + } +} + +trait Step { + /// Returns the number of steps between two step objects. The count is + /// inclusive of `start` and exclusive of `end`. + /// + /// Returns `None` if it is not possible to calculate `steps_between` + /// without overflow. + fn steps_between(start: &Self, end: &Self) -> Option<usize>; + + /// Replaces this step with `1`, returning itself + fn replace_one(&mut self) -> Self; + + /// Replaces this step with `0`, returning itself + fn replace_zero(&mut self) -> Self; + + /// Adds one to this step, returning the result + fn add_one(&self) -> Self; + + /// Subtracts one to this step, returning the result + fn sub_one(&self) -> Self; + + /// Add an usize, returning None on overflow + fn add_usize(&self, n: usize) -> Option<Self>; +} + +// These are still macro-generated because the integer literals resolve to different types. +macro_rules! step_identical_methods { + () => { + #[inline] + fn replace_one(&mut self) -> Self { + mem::replace(self, 1) + } + + #[inline] + fn replace_zero(&mut self) -> Self { + mem::replace(self, 0) + } + + #[inline] + fn add_one(&self) -> Self { + Add::add(*self, 1) + } + + #[inline] + fn sub_one(&self) -> Self { + Sub::sub(*self, 1) + } + }; +} + +macro_rules! step_impl_unsigned { + ($($t:ty)*) => ($( + impl Step for $t { + fn steps_between(start: &$t, end: &$t) -> Option<usize> { + if *start < *end { + // Note: We assume $t <= usize here + Option::Some((*end - *start) as usize) + } else { + Option::Some(0) + } + } + + fn add_usize(&self, n: usize) -> Option<Self> { + match <$t>::try_from(n) { + Result::Ok(n_as_t) => self.checked_add(n_as_t), + Result::Err(_) => Option::None, + } + } + + step_identical_methods!(); + } + )*) +} +macro_rules! step_impl_signed { + ($( [$t:ty : $unsigned:ty] )*) => ($( + impl Step for $t { + #[inline] + #[allow(trivial_numeric_casts)] + fn steps_between(start: &$t, end: &$t) -> Option<usize> { + if *start < *end { + // Note: We assume $t <= isize here + // Use .wrapping_sub and cast to usize to compute the + // difference that may not fit inside the range of isize. + Option::Some((*end as isize).wrapping_sub(*start as isize) as usize) + } else { + Option::Some(0) + } + } + + #[inline] + #[allow(unreachable_patterns)] + fn add_usize(&self, n: usize) -> Option<Self> { + match <$unsigned>::try_from(n) { + Result::Ok(n_as_unsigned) => { + // Wrapping in unsigned space handles cases like + // `-120_i8.add_usize(200) == Option::Some(80_i8)`, + // even though 200_usize is out of range for i8. + let wrapped = (*self as $unsigned).wrapping_add(n_as_unsigned) as $t; + if wrapped >= *self { + Option::Some(wrapped) + } else { + Option::None // Addition overflowed + } + } + Result::Err(_) => Option::None, + } + } + + step_identical_methods!(); + } + )*) +} + +macro_rules! step_impl_no_between { + ($($t:ty)*) => ($( + impl Step for $t { + #[inline] + fn steps_between(_start: &Self, _end: &Self) -> Option<usize> { + Option::None + } + + #[inline] + fn add_usize(&self, n: usize) -> Option<Self> { + self.checked_add(n as $t) + } + + step_identical_methods!(); + } + )*) +} + +step_impl_unsigned!(usize); + +pub trait Iterator { + type Item; + + #[lang = "next"] + fn next(&mut self) -> Option<Self::Item>; +} + +impl<A: Step> Iterator for Range<A> { + type Item = A; + + fn next(&mut self) -> Option<A> { + if self.start < self.end { + // We check for overflow here, even though it can't actually + // happen. Adding this check does however help llvm vectorize loops + // for some ranges that don't get vectorized otherwise, + // and this won't actually result in an extra check in an optimized build. + match self.start.add_usize(1) { + Option::Some(mut n) => { + mem::swap(&mut n, &mut self.start); + Option::Some(n) + } + Option::None => Option::None, + } + } else { + Option::None + } + } +} + +pub trait IntoIterator { + type Item; + + type IntoIter: Iterator<Item = Self::Item>; + + #[lang = "into_iter"] + fn into_iter(self) -> Self::IntoIter; +} + +impl<I: Iterator> IntoIterator for I { + type Item = I::Item; + type IntoIter = I; + + fn into_iter(self) -> I { + self + } +} + +pub fn main() { + let a = 1usize..3usize; + + for i in a { // { dg-warning "unused name" } + unsafe { puts("loop\0" as *const str as *const i8); } + } +} diff --git a/gcc/testsuite/rust/compile/for-loop2.rs b/gcc/testsuite/rust/compile/for-loop2.rs new file mode 100644 index 0000000..d18bddd --- /dev/null +++ b/gcc/testsuite/rust/compile/for-loop2.rs @@ -0,0 +1,545 @@ +// { dg-output "1\r*\n2\r*\n" } +#![feature(intrinsics)] + +pub use option::Option::{self, None, Some}; +pub use result::Result::{self, Err, Ok}; + +extern "C" { + fn printf(s: *const i8, ...); + fn puts(s: *const i8); +} + +mod option { + pub enum Option<T> { + #[lang = "None"] + None, + #[lang = "Some"] + Some(T), + } +} + +mod result { + enum Result<T, E> { + Ok(T), + Err(E), + } +} + +#[lang = "sized"] +pub trait Sized {} + +#[lang = "clone"] +pub trait Clone: Sized { + fn clone(&self) -> Self; + + fn clone_from(&mut self, source: &Self) { + *self = source.clone() + } +} + +mod impls { + use super::Clone; + + macro_rules! impl_clone { + ($($t:ty)*) => { + $( + impl Clone for $t { + fn clone(&self) -> Self { + *self + } + } + )* + } + } + + impl_clone! { + usize u8 u16 u32 u64 // u128 + isize i8 i16 i32 i64 // i128 + f32 f64 + bool char + } +} + +#[lang = "copy"] +pub trait Copy: Clone { + // Empty. +} + +mod copy_impls { + use super::Copy; + + macro_rules! impl_copy { + ($($t:ty)*) => { + $( + impl Copy for $t {} + )* + } + } + + impl_copy! { + usize u8 u16 u32 u64 // u128 + isize i8 i16 i32 i64 // i128 + f32 f64 + bool char + } +} + +mod intrinsics { + extern "rust-intrinsic" { + pub fn add_with_overflow<T>(x: T, y: T) -> (T, bool); + pub fn wrapping_add<T>(a: T, b: T) -> T; + pub fn wrapping_sub<T>(a: T, b: T) -> T; + pub fn rotate_left<T>(a: T, b: T) -> T; + pub fn rotate_right<T>(a: T, b: T) -> T; + pub fn offset<T>(ptr: *const T, count: isize) -> *const T; + pub fn copy_nonoverlapping<T>(src: *const T, dst: *mut T, count: usize); + pub fn move_val_init<T>(dst: *mut T, src: T); + pub fn uninit<T>() -> T; + } +} + +mod ptr { + #[lang = "const_ptr"] + impl<T> *const T { + pub unsafe fn offset(self, count: isize) -> *const T { + intrinsics::offset(self, count) + } + } + + #[lang = "mut_ptr"] + impl<T> *mut T { + pub unsafe fn offset(self, count: isize) -> *mut T { + intrinsics::offset(self, count) as *mut T + } + } + + pub unsafe fn swap_nonoverlapping<T>(x: *mut T, y: *mut T, count: usize) { + let x = x as *mut u8; + let y = y as *mut u8; + let len = mem::size_of::<T>() * count; + swap_nonoverlapping_bytes(x, y, len) + } + + pub unsafe fn swap_nonoverlapping_one<T>(x: *mut T, y: *mut T) { + // For types smaller than the block optimization below, + // just swap directly to avoid pessimizing codegen. + if mem::size_of::<T>() < 32 { + let z = read(x); + intrinsics::copy_nonoverlapping(y, x, 1); + write(y, z); + } else { + swap_nonoverlapping(x, y, 1); + } + } + + pub unsafe fn write<T>(dst: *mut T, src: T) { + intrinsics::move_val_init(&mut *dst, src) + } + + pub unsafe fn read<T>(src: *const T) -> T { + let mut tmp: T = mem::uninitialized(); + intrinsics::copy_nonoverlapping(src, &mut tmp, 1); + tmp + } + + pub unsafe fn swap_nonoverlapping_bytes(x: *mut u8, y: *mut u8, len: usize) { + struct Block(u64, u64, u64, u64); + struct UnalignedBlock(u64, u64, u64, u64); + + let block_size = mem::size_of::<Block>(); + + // Loop through x & y, copying them `Block` at a time + // The optimizer should unroll the loop fully for most types + // N.B. We can't use a for loop as the `range` impl calls `mem::swap` recursively + let mut i: usize = 0; + while i + block_size <= len { + // Create some uninitialized memory as scratch space + // Declaring `t` here avoids aligning the stack when this loop is unused + let mut t: Block = mem::uninitialized(); + let t = &mut t as *mut _ as *mut u8; + let x = x.offset(i as isize); + let y = y.offset(i as isize); + + // Swap a block of bytes of x & y, using t as a temporary buffer + // This should be optimized into efficient SIMD operations where available + intrinsics::copy_nonoverlapping(x, t, block_size); + intrinsics::copy_nonoverlapping(y, x, block_size); + intrinsics::copy_nonoverlapping(t, y, block_size); + i += block_size; + } + + if i < len { + // Swap any remaining bytes + let mut t: UnalignedBlock = mem::uninitialized(); + let rem = len - i; + + let t = &mut t as *mut _ as *mut u8; + let x = x.offset(i as isize); + let y = y.offset(i as isize); + + intrinsics::copy_nonoverlapping(x, t, rem); + intrinsics::copy_nonoverlapping(y, x, rem); + intrinsics::copy_nonoverlapping(t, y, rem); + } + } +} + +mod mem { + extern "rust-intrinsic" { + #[rustc_const_stable(feature = "const_transmute", since = "1.46.0")] + pub fn transmute<T, U>(_: T) -> U; + #[rustc_const_stable(feature = "const_size_of", since = "1.40.0")] + pub fn size_of<T>() -> usize; + } + + pub fn swap<T>(x: &mut T, y: &mut T) { + unsafe { + ptr::swap_nonoverlapping_one(x, y); + } + } + + pub fn replace<T>(dest: &mut T, mut src: T) -> T { + swap(dest, &mut src); + src + } + + pub unsafe fn uninitialized<T>() -> T { + intrinsics::uninit() + } +} + +macro_rules! impl_uint { + ($($ty:ident = $lang:literal),*) => { + $( + impl $ty { + pub fn wrapping_add(self, rhs: Self) -> Self { + unsafe { + intrinsics::wrapping_add(self, rhs) + } + } + + pub fn wrapping_sub(self, rhs: Self) -> Self { + unsafe { + intrinsics::wrapping_sub(self, rhs) + } + } + + pub fn rotate_left(self, n: u32) -> Self { + unsafe { + intrinsics::rotate_left(self, n as Self) + } + } + + pub fn rotate_right(self, n: u32) -> Self { + unsafe { + intrinsics::rotate_right(self, n as Self) + } + } + + pub fn to_le(self) -> Self { + #[cfg(target_endian = "little")] + { + self + } + } + + pub const fn from_le_bytes(bytes: [u8; mem::size_of::<Self>()]) -> Self { + Self::from_le(Self::from_ne_bytes(bytes)) + } + + pub const fn from_le(x: Self) -> Self { + #[cfg(target_endian = "little")] + { + x + } + } + + pub const fn from_ne_bytes(bytes: [u8; mem::size_of::<Self>()]) -> Self { + unsafe { mem::transmute(bytes) } + } + + pub fn checked_add(self, rhs: Self) -> Option<Self> { + let (a, b) = self.overflowing_add(rhs); + if b { + Option::None + } else { + Option::Some(a) + } + } + + pub fn overflowing_add(self, rhs: Self) -> (Self, bool) { + let (a, b) = unsafe { intrinsics::add_with_overflow(self as $ty, rhs as $ty) }; + (a as Self, b) + } + } + )* + } +} + +impl_uint!( + u8 = "u8", + u16 = "u16", + u32 = "u32", + u64 = "u64", + usize = "usize" +); + +#[lang = "add"] +pub trait Add<RHS = Self> { + type Output; + + fn add(self, rhs: RHS) -> Self::Output; +} +macro_rules! add_impl { + ($($t:ty)*) => ($( + impl Add for $t { + type Output = $t; + + fn add(self, other: $t) -> $t { self + other } + } + )*) +} + +add_impl! { usize u8 u16 u32 u64 /*isize i8 i16 i32 i64*/ f32 f64 } + +#[lang = "sub"] +pub trait Sub<RHS = Self> { + type Output; + + fn sub(self, rhs: RHS) -> Self::Output; +} +macro_rules! sub_impl { + ($($t:ty)*) => ($( + impl Sub for $t { + type Output = $t; + + fn sub(self, other: $t) -> $t { self - other } + } + )*) +} + +sub_impl! { usize u8 u16 u32 u64 /*isize i8 i16 i32 i64*/ f32 f64 } + +#[lang = "Range"] +pub struct Range<Idx> { + pub start: Idx, + pub end: Idx, +} + +pub trait TryFrom<T>: Sized { + /// The type returned in the event of a conversion error. + type Error; + + /// Performs the conversion. + fn try_from(value: T) -> Result<Self, Self::Error>; +} + +pub trait From<T>: Sized { + fn from(_: T) -> Self; +} + +impl<T> From<T> for T { + fn from(t: T) -> T { + t + } +} + +impl<T, U> TryFrom<U> for T +where + T: From<U>, +{ + type Error = !; + + fn try_from(value: U) -> Result<Self, Self::Error> { + Ok(T::from(value)) + } +} + +trait Step { + /// Returns the number of steps between two step objects. The count is + /// inclusive of `start` and exclusive of `end`. + /// + /// Returns `None` if it is not possible to calculate `steps_between` + /// without overflow. + fn steps_between(start: &Self, end: &Self) -> Option<usize>; + + /// Replaces this step with `1`, returning itself + fn replace_one(&mut self) -> Self; + + /// Replaces this step with `0`, returning itself + fn replace_zero(&mut self) -> Self; + + /// Adds one to this step, returning the result + fn add_one(&self) -> Self; + + /// Subtracts one to this step, returning the result + fn sub_one(&self) -> Self; + + /// Add an usize, returning None on overflow + fn add_usize(&self, n: usize) -> Option<Self>; +} + +// These are still macro-generated because the integer literals resolve to different types. +macro_rules! step_identical_methods { + () => { + #[inline] + fn replace_one(&mut self) -> Self { + mem::replace(self, 1) + } + + #[inline] + fn replace_zero(&mut self) -> Self { + mem::replace(self, 0) + } + + #[inline] + fn add_one(&self) -> Self { + Add::add(*self, 1) + } + + #[inline] + fn sub_one(&self) -> Self { + Sub::sub(*self, 1) + } + }; +} + +macro_rules! step_impl_unsigned { + ($($t:ty)*) => ($( + impl Step for $t { + fn steps_between(start: &$t, end: &$t) -> Option<usize> { + if *start < *end { + // Note: We assume $t <= usize here + Option::Some((*end - *start) as usize) + } else { + Option::Some(0) + } + } + + fn add_usize(&self, n: usize) -> Option<Self> { + match <$t>::try_from(n) { + Result::Ok(n_as_t) => self.checked_add(n_as_t), + Result::Err(_) => Option::None, + } + } + + step_identical_methods!(); + } + )*) +} +macro_rules! step_impl_signed { + ($( [$t:ty : $unsigned:ty] )*) => ($( + impl Step for $t { + #[inline] + #[allow(trivial_numeric_casts)] + fn steps_between(start: &$t, end: &$t) -> Option<usize> { + if *start < *end { + // Note: We assume $t <= isize here + // Use .wrapping_sub and cast to usize to compute the + // difference that may not fit inside the range of isize. + Option::Some((*end as isize).wrapping_sub(*start as isize) as usize) + } else { + Option::Some(0) + } + } + + #[inline] + #[allow(unreachable_patterns)] + fn add_usize(&self, n: usize) -> Option<Self> { + match <$unsigned>::try_from(n) { + Result::Ok(n_as_unsigned) => { + // Wrapping in unsigned space handles cases like + // `-120_i8.add_usize(200) == Option::Some(80_i8)`, + // even though 200_usize is out of range for i8. + let wrapped = (*self as $unsigned).wrapping_add(n_as_unsigned) as $t; + if wrapped >= *self { + Option::Some(wrapped) + } else { + Option::None // Addition overflowed + } + } + Result::Err(_) => Option::None, + } + } + + step_identical_methods!(); + } + )*) +} + +macro_rules! step_impl_no_between { + ($($t:ty)*) => ($( + impl Step for $t { + #[inline] + fn steps_between(_start: &Self, _end: &Self) -> Option<usize> { + Option::None + } + + #[inline] + fn add_usize(&self, n: usize) -> Option<Self> { + self.checked_add(n as $t) + } + + step_identical_methods!(); + } + )*) +} + +step_impl_unsigned!(usize); + +pub trait Iterator { + type Item; + + #[lang = "next"] + fn next(&mut self) -> Option<Self::Item>; +} + +impl<A: Step> Iterator for Range<A> { + type Item = A; + + fn next(&mut self) -> Option<A> { + if self.start < self.end { + // We check for overflow here, even though it can't actually + // happen. Adding this check does however help llvm vectorize loops + // for some ranges that don't get vectorized otherwise, + // and this won't actually result in an extra check in an optimized build. + match self.start.add_usize(1) { + Option::Some(mut n) => { + mem::swap(&mut n, &mut self.start); + Option::Some(n) + } + Option::None => Option::None, + } + } else { + Option::None + } + } +} + +pub trait IntoIterator { + type Item; + + type IntoIter: Iterator<Item = Self::Item>; + + #[lang = "into_iter"] + fn into_iter(self) -> Self::IntoIter; +} + +impl<I: Iterator> IntoIterator for I { + type Item = I::Item; + type IntoIter = I; + + fn into_iter(self) -> I { + self + } +} + +pub fn main() { + // make sure we can desugar for-loops inside other blocks + + if true { + for _ in 20usize..40usize { + unsafe { puts("loop\0" as *const str as *const i8); } + } + } +} diff --git a/gcc/testsuite/rust/compile/generic-default1.rs b/gcc/testsuite/rust/compile/generic-default1.rs index 0a132bf..4155640 100644 --- a/gcc/testsuite/rust/compile/generic-default1.rs +++ b/gcc/testsuite/rust/compile/generic-default1.rs @@ -1,5 +1,5 @@ struct Foo<A = i321>(A); -// { dg-error "failed to resolve TypePath: i321" "" { target *-*-* } .-1 } +// { dg-error "could not resolve type path .i321." "" { target *-*-* } .-1 } fn main() { let a; diff --git a/gcc/testsuite/rust/compile/generics4.rs b/gcc/testsuite/rust/compile/generics4.rs index 31b681a..c4dbc432 100644 --- a/gcc/testsuite/rust/compile/generics4.rs +++ b/gcc/testsuite/rust/compile/generics4.rs @@ -6,7 +6,6 @@ struct GenericStruct<T>(T, usize); fn main() { let a2; a2 = GenericStruct::<i8, i32>(1, 456); // { dg-error "generic item takes at most 1 type arguments but 2 were supplied" } - // { dg-error {Failed to resolve expression of function call} "" { target *-*-* } .-1 } let b2: i32 = a2.0; // { dg-error {Expected Tuple or ADT got: T\?} "" { target *-*-* } .-1 } diff --git a/gcc/testsuite/rust/compile/generics5.rs b/gcc/testsuite/rust/compile/generics5.rs index 6c847b5..f861038 100644 --- a/gcc/testsuite/rust/compile/generics5.rs +++ b/gcc/testsuite/rust/compile/generics5.rs @@ -3,7 +3,7 @@ struct GenericStruct<T>(T, usize); fn main() { let a2; a2 = GenericStruct::<i8, T>(1, 456); - // { dg-error "failed to resolve TypePath: T" "" { target *-*-* } .-1 } + // { dg-error "could not resolve type path .T." "" { target *-*-* } .-1 } let b2: i32 = a2.0; let c2: usize = a2.1; diff --git a/gcc/testsuite/rust/compile/generics6.rs b/gcc/testsuite/rust/compile/generics6.rs index 33093cf..d77c559 100644 --- a/gcc/testsuite/rust/compile/generics6.rs +++ b/gcc/testsuite/rust/compile/generics6.rs @@ -27,6 +27,5 @@ impl Foo<f32> { fn main() { let a: i32 = Foo::test(); // { dg-error "multiple applicable items in scope for: .test." } - // { dg-error {Failed to resolve expression of function call} "" { target *-*-* } .-1 } } diff --git a/gcc/testsuite/rust/compile/generics9.rs b/gcc/testsuite/rust/compile/generics9.rs index 3766703..3c787aa 100644 --- a/gcc/testsuite/rust/compile/generics9.rs +++ b/gcc/testsuite/rust/compile/generics9.rs @@ -1,5 +1,5 @@ struct Foo<A, B = (A, B)>(A, B); -// { dg-error "failed to resolve TypePath: B" "" { target *-*-* } .-1 } +// { dg-error "could not resolve type path .B." "" { target *-*-* } .-1 } fn main() { let a: Foo<bool>; diff --git a/gcc/testsuite/rust/compile/if-without-else.rs b/gcc/testsuite/rust/compile/if-without-else.rs new file mode 100644 index 0000000..1a0f644 --- /dev/null +++ b/gcc/testsuite/rust/compile/if-without-else.rs @@ -0,0 +1,9 @@ +fn foo(pred: bool) -> u8 { + if pred { // { dg-error "mismatched types" } + 1 + } + 3 +} + +fn main(){ +} diff --git a/gcc/testsuite/rust/compile/implicit_returns_err3.rs b/gcc/testsuite/rust/compile/implicit_returns_err3.rs index ac98213..f0330ac 100644 --- a/gcc/testsuite/rust/compile/implicit_returns_err3.rs +++ b/gcc/testsuite/rust/compile/implicit_returns_err3.rs @@ -1,6 +1,6 @@ fn test(x: i32) -> i32 { // { dg-error "mismatched types, expected .i32. but got ...." } if x > 1 { - 1 + return 1; } } diff --git a/gcc/testsuite/rust/compile/issue-2015.rs b/gcc/testsuite/rust/compile/issue-2015.rs new file mode 100644 index 0000000..7789ecd --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-2015.rs @@ -0,0 +1,19 @@ +// { dg-additional-options "-frust-compile-until=lowering" } + +macro_rules! impl_foo { + () => { impl Foo } +} + +pub trait Foo {} + +pub trait Bar { + type Baz; +} + +pub fn foo(_value: impl Bar<Baz = impl_foo!()>) -> i32 { + 15 +} + +pub fn bar(_value: impl Bar<Baz = impl Foo>) -> i32 { + 16 +} diff --git a/gcc/testsuite/rust/compile/issue-2035.rs b/gcc/testsuite/rust/compile/issue-2035.rs new file mode 100644 index 0000000..c0817d5 --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-2035.rs @@ -0,0 +1,10 @@ +fn func(i: i32) { + i(); + // { dg-error "expected function, found .i32. .E0618." "" { target *-*-* } .-1 } +} + +fn main() { + let i = 0i32; + i(); + // { dg-error "expected function, found .i32. .E0618." "" { target *-*-* } .-1 } +} diff --git a/gcc/testsuite/rust/compile/issue-2369.rs b/gcc/testsuite/rust/compile/issue-2369.rs new file mode 100644 index 0000000..9475aef --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-2369.rs @@ -0,0 +1,21 @@ +#[lang = "sized"] +trait Sized {} + +fn main() { + pub trait Foo { + type A; + fn boo(&self) -> <Self as Foo>::A; + } + + struct Bar; + + impl Foo for isize { + type A = usize; + fn boo(&self) -> usize { + 42 + } + } + + fn baz<I>(x: &<I as Foo<A = Bar>>::A) {} + // { dg-error "associated type bindings are not allowed here .E0229." "" { target *-*-* } .-1 } +} diff --git a/gcc/testsuite/rust/compile/issue-2423.rs b/gcc/testsuite/rust/compile/issue-2423.rs index ae7897c..6fcd32f 100644 --- a/gcc/testsuite/rust/compile/issue-2423.rs +++ b/gcc/testsuite/rust/compile/issue-2423.rs @@ -1,14 +1,14 @@ impl NonExistant { - // { dg-error "failed to resolve" "" { target *-*-* } .-1 } + // { dg-error "could not resolve" "" { target *-*-* } .-1 } fn test() {} } impl NotFound for NonExistant { - // { dg-error "failed to resolve" "" { target *-*-* } .-1 } + // { dg-error "could not resolve" "" { target *-*-* } .-1 } fn test() {} } trait A {} impl A for NotFound {} -// { dg-error "failed to resolve" "" { target *-*-* } .-1 } +// { dg-error "could not resolve" "" { target *-*-* } .-1 } diff --git a/gcc/testsuite/rust/compile/issue-2954.rs b/gcc/testsuite/rust/compile/issue-2954.rs new file mode 100644 index 0000000..52f7c91 --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-2954.rs @@ -0,0 +1,17 @@ +#[lang = "sized"] +trait Sized {} + +#[lang = "receiver"] +#[unstable(feature = "receiver_trait", issue = "none")] +// #[doc(hidden)] +pub trait Receiver { + // Empty. +} + +#[unstable(feature = "receiver_trait", issue = "none")] +impl<T: ?Sized> Receiver for &T {} + +#[unstable(feature = "receiver_trait", issue = "none")] +impl<T: ?Sized> Receiver for &mut T {} + + diff --git a/gcc/testsuite/rust/compile/issue-3022.rs b/gcc/testsuite/rust/compile/issue-3022.rs new file mode 100644 index 0000000..b8b8e6f --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-3022.rs @@ -0,0 +1,18 @@ +#[lang = "sized"] +trait Sized {} + +trait Foo<T> { + fn foo(self) -> T; +} + +struct Bar<T, U> { + // { dg-warning "struct is never constructed" "" { target *-*-* } .-1 } + value: U, + valte: T, +} + +impl<T: Foo<U>, U> Foo<U> for Bar<T, U> { + fn foo(self) -> U { + self.value + } +} diff --git a/gcc/testsuite/rust/compile/issue-3031.rs b/gcc/testsuite/rust/compile/issue-3031.rs new file mode 100644 index 0000000..33f5bf0 --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-3031.rs @@ -0,0 +1,15 @@ +#![feature(no_core)] +#![feature(lang_items)] +#![no_core] + +#[lang = "sized"] +trait Sized {} + +trait A<T: ?Sized> {} + +struct Cell<X> { + // { dg-warning "struct is never constructed" "" { target *-*-* } .-1 } + x: X, +} + +impl<T, U> A<Cell<U>> for Cell<T> where T: A<U> {} diff --git a/gcc/testsuite/rust/compile/issue-3174.rs b/gcc/testsuite/rust/compile/issue-3174.rs new file mode 100644 index 0000000..87588e1 --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-3174.rs @@ -0,0 +1,28 @@ +extern "C" { + fn printf(s: *const i8, ...); +} + +enum Option { + Some(i32), + None, +} + +impl Option { + fn add(&mut self) { + match *self { + Option::Some(ref mut a) => *a += 1, + Option::None => {} + } + } +} + +fn main() { + unsafe { + let mut a = Option::None; + a.add(); + let _s = "%d\n\0"; + let _s = _s as *const str; + let s = _s as *const i8; + printf(s, a); + } +} diff --git a/gcc/testsuite/rust/compile/issue-3315-1.rs b/gcc/testsuite/rust/compile/issue-3315-1.rs new file mode 100644 index 0000000..07581da --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-3315-1.rs @@ -0,0 +1,8 @@ +//You should be able to create a module of the same name as a builtin type + +mod i32 { +} + +fn main() -> isize { + 0 +} diff --git a/gcc/testsuite/rust/compile/issue-3315-2.rs b/gcc/testsuite/rust/compile/issue-3315-2.rs new file mode 100644 index 0000000..71abd6c --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-3315-2.rs @@ -0,0 +1,7 @@ +mod i32 { +} + +fn main() -> isize { + let i:i32 = 0 as i32; + i as isize +} diff --git a/gcc/testsuite/rust/compile/issue-3382.rs b/gcc/testsuite/rust/compile/issue-3382.rs new file mode 100644 index 0000000..6f4382f --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-3382.rs @@ -0,0 +1,61 @@ +#[lang = "sized"] +trait Sized {} + +enum Result<T, E> { + #[lang = "Ok"] + Ok(T), + #[lang = "Err"] + Err(E), +} + +#[lang = "try"] +pub trait Try { + /// The type of this value when viewed as successful. + // #[unstable(feature = "try_trait", issue = "42327")] + type Ok; + /// The type of this value when viewed as failed. + // #[unstable(feature = "try_trait", issue = "42327")] + type Error; + + /// Applies the "?" operator. A return of `Ok(t)` means that the + /// execution should continue normally, and the result of `?` is the + /// value `t`. A return of `Err(e)` means that execution should branch + /// to the innermost enclosing `catch`, or return from the function. + /// + /// If an `Err(e)` result is returned, the value `e` will be "wrapped" + /// in the return type of the enclosing scope (which must itself implement + /// `Try`). Specifically, the value `X::from_error(From::from(e))` + /// is returned, where `X` is the return type of the enclosing function. + #[lang = "into_result"] + #[unstable(feature = "try_trait", issue = "42327")] + fn into_result(self) -> Result<Self::Ok, Self::Error>; + + /// Wrap an error value to construct the composite result. For example, + /// `Result::Err(x)` and `Result::from_error(x)` are equivalent. + #[lang = "from_error"] + #[unstable(feature = "try_trait", issue = "42327")] + fn from_error(v: Self::Ok) -> Self; + + /// Wrap an OK value to construct the composite result. For example, + /// `Result::Ok(x)` and `Result::from_ok(x)` are equivalent. + #[lang = "from_ok"] + #[unstable(feature = "try_trait", issue = "42327")] + fn from_ok(v: Self::Error) -> Self; +} + +impl<T, E> Try for Result<T, E> { + type Ok = T; + type Error = E; + + fn into_result(self) -> Result<T, E> { + self + } + + fn from_ok(v: T) -> Self { + Result::Ok(v) + } + + fn from_error(v: E) -> Self { + Result::Err(v) + } +} diff --git a/gcc/testsuite/rust/compile/issue-3402-1.rs b/gcc/testsuite/rust/compile/issue-3402-1.rs new file mode 100644 index 0000000..ed603ce --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-3402-1.rs @@ -0,0 +1,29 @@ +pub struct Foo { + a: i32, + // { dg-warning "field is never read" "" { target *-*-* } .-1 } +} +pub struct Bar(i32); + +#[lang = "sized"] +trait Sized {} + +pub mod core { + pub mod default { + pub trait Default: Sized { + fn default() -> Self; + } + + impl Default for i32 { + fn default() -> Self { + 0 + } + } + } +} + +impl ::core::default::Default for Bar { + #[inline] + fn default() -> Bar { + Bar(core::default::Default::default()) + } +} diff --git a/gcc/testsuite/rust/compile/issue-3402-2.rs b/gcc/testsuite/rust/compile/issue-3402-2.rs new file mode 100644 index 0000000..b665af2 --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-3402-2.rs @@ -0,0 +1,18 @@ +pub struct Bar(i32); + +#[lang = "sized"] +trait Sized {} + +pub trait A: Sized { + fn foo() -> Self; +} + +impl A for i32 { + fn foo() -> Self { + 0 + } +} + +pub fn bar() { + let _ = Bar(A::foo()); +} diff --git a/gcc/testsuite/rust/compile/issue-3403.rs b/gcc/testsuite/rust/compile/issue-3403.rs new file mode 100644 index 0000000..ced6b4e --- /dev/null +++ b/gcc/testsuite/rust/compile/issue-3403.rs @@ -0,0 +1,38 @@ +pub struct Foo { + a: i32, + // { dg-warning "field is never read" "" { target *-*-* } .-1 } +} +pub struct Bar(i32); + +#[lang = "sized"] +trait Sized {} + +pub mod core { + pub mod default { + pub trait Default: Sized { + fn default() -> Self; + } + + impl Default for i32 { + fn default() -> Self { + 0 + } + } + } +} + +impl ::core::default::Default for Bar { + #[inline] + fn default() -> Bar { + Bar(core::default::Default::default()) + } +} + +impl ::core::default::Default for Foo { + #[inline] + fn default() -> Foo { + Foo { + a: core::default::Default::default(), + } + } +} diff --git a/gcc/testsuite/rust/compile/macros/builtin/option_env1.rs b/gcc/testsuite/rust/compile/macros/builtin/option_env1.rs new file mode 100644 index 0000000..cf9f65b --- /dev/null +++ b/gcc/testsuite/rust/compile/macros/builtin/option_env1.rs @@ -0,0 +1,29 @@ +#![feature(rustc_attrs)] + +#[rustc_builtin_macro] +macro_rules! option_env { + () => {} +} + +#[lang = "sized"] +trait Sized {} + +pub mod core { + pub mod option { + pub enum Option<T> { + #[lang = "Some"] + Some(T), + #[lang = "None"] + None, + } + } +} + +use core::option::Option; + + +fn main() { + // Both a guaranteed-to-exist variable and a failed find should compile + let _: Option<&str> = option_env!("PWD"); + let _: Option<&str> = option_env!("PROBABLY_DOESNT_EXIST"); +} diff --git a/gcc/testsuite/rust/compile/macros/builtin/option_env2.rs b/gcc/testsuite/rust/compile/macros/builtin/option_env2.rs new file mode 100644 index 0000000..63f72545 --- /dev/null +++ b/gcc/testsuite/rust/compile/macros/builtin/option_env2.rs @@ -0,0 +1,27 @@ +#![feature(rustc_attrs)] + +#[rustc_builtin_macro] +macro_rules! option_env { + () => {} +} + +#[lang = "sized"] +trait Sized {} + +pub mod core { + pub mod option { + pub enum Option<T> { + #[lang = "Some"] + Some(T), + #[lang = "None"] + None, + } + } +} + +use core::option::Option; + +fn main() { + let _: Option<&str> = option_env!(42); + // { dg-error "argument must be a string literal" "" { target *-*-* } .-1 } +} diff --git a/gcc/testsuite/rust/compile/macros/builtin/option_env3.rs b/gcc/testsuite/rust/compile/macros/builtin/option_env3.rs new file mode 100644 index 0000000..ad6dd4c --- /dev/null +++ b/gcc/testsuite/rust/compile/macros/builtin/option_env3.rs @@ -0,0 +1,28 @@ +#![feature(rustc_attrs)] + +#[rustc_builtin_macro] +macro_rules! option_env { + () => {} +} + +#[lang = "sized"] +trait Sized {} + +pub mod core { + pub mod option { + pub enum Option<T> { + #[lang = "Some"] + Some(T), + #[lang = "None"] + None, + } + } +} + +use core::option::Option; + + +fn main() { + let _: Option<&str> = option_env!("A","B"); + // { dg-error "'option_env!' takes 1 argument" "" { target *-*-* } .-1 } +} diff --git a/gcc/testsuite/rust/compile/macros/mbe/macro-expand-module.rs b/gcc/testsuite/rust/compile/macros/mbe/macro-expand-module.rs new file mode 100644 index 0000000..e3e702e --- /dev/null +++ b/gcc/testsuite/rust/compile/macros/mbe/macro-expand-module.rs @@ -0,0 +1,11 @@ +mod foo { + macro_rules! bar { + () => () + } + + bar! (); + + pub struct S; +} + +pub fn buzz(_: foo::S) {} diff --git a/gcc/testsuite/rust/compile/macros/mbe/macro43.rs b/gcc/testsuite/rust/compile/macros/mbe/macro43.rs index 992bc77..fbc36a9 100644 --- a/gcc/testsuite/rust/compile/macros/mbe/macro43.rs +++ b/gcc/testsuite/rust/compile/macros/mbe/macro43.rs @@ -48,7 +48,7 @@ macro_rules! nonzero_integers { } - impl_nonzero_fmt! { // { dg-error "unknown macro" } + impl_nonzero_fmt! { // { dg-error "could not resolve macro invocation" } (Debug, Display, Binary, Octal, LowerHex, UpperHex) for $Ty } )+ diff --git a/gcc/testsuite/rust/compile/macros/mbe/macro44.rs b/gcc/testsuite/rust/compile/macros/mbe/macro44.rs index dabac6f..0cfd987 100644 --- a/gcc/testsuite/rust/compile/macros/mbe/macro44.rs +++ b/gcc/testsuite/rust/compile/macros/mbe/macro44.rs @@ -16,7 +16,7 @@ mod foo { } fn bar_f() { - baz!(); // { dg-error "unknown macro" } + baz!(); // { dg-error "could not resolve macro invocation" } } } diff --git a/gcc/testsuite/rust/compile/method2.rs b/gcc/testsuite/rust/compile/method2.rs index c8699f7..961a039 100644 --- a/gcc/testsuite/rust/compile/method2.rs +++ b/gcc/testsuite/rust/compile/method2.rs @@ -12,5 +12,5 @@ fn main() { let b; b = a.test::<asfasfr>(false); - // { dg-error "failed to resolve TypePath: asfasfr" "" { target *-*-* } .-1 } + // { dg-error "could not resolve type path .asfasfr." "" { target *-*-* } .-1 } } diff --git a/gcc/testsuite/rust/compile/nested_macro_use2.rs b/gcc/testsuite/rust/compile/nested_macro_use2.rs index 4659500..7bb6154 100644 --- a/gcc/testsuite/rust/compile/nested_macro_use2.rs +++ b/gcc/testsuite/rust/compile/nested_macro_use2.rs @@ -8,5 +8,5 @@ mod foo { } fn main() { - baz!(); // { dg-error "unknown macro: .baz." } + baz!(); // { dg-error "could not resolve macro invocation .baz." } } diff --git a/gcc/testsuite/rust/compile/nr2/compile.exp b/gcc/testsuite/rust/compile/nr2/compile.exp index f2724f6..35637f1 100644 --- a/gcc/testsuite/rust/compile/nr2/compile.exp +++ b/gcc/testsuite/rust/compile/nr2/compile.exp @@ -14,9 +14,7 @@ # along with GCC; see the file COPYING3. If not see # <http://www.gnu.org/licenses/>. -# Compile tests, no torture testing, for name resolution 2.0 -# -# These tests raise errors in the front end; torture testing doesn't apply. +# Run compile tests with name resolution 2.0 enabled # Load support procs. load_lib rust-dg.exp @@ -44,7 +42,7 @@ namespace eval rust-nr2-ns { # Run tests in directories # Manually specifying these, in case some other test file # does something weird - set test_dirs {{} {macros builtin} {macros mbe} {macros proc}} + set test_dirs {{} {macros builtin} {macros mbe} {macros proc} {torture}} set tests_expect_ok "" set tests_expect_err "" diff --git a/gcc/testsuite/rust/compile/nr2/exclude b/gcc/testsuite/rust/compile/nr2/exclude index 60322f3..fed7bde 100644 --- a/gcc/testsuite/rust/compile/nr2/exclude +++ b/gcc/testsuite/rust/compile/nr2/exclude @@ -1,154 +1,46 @@ -bounds1.rs -break-rust2.rs -break-rust3.rs canonical_paths1.rs cfg1.rs -cfg3.rs -cfg4.rs -cfg5.rs -closure_no_type_anno.rs -complex-path1.rs -const-issue1440.rs const_generics_3.rs -const_generics_4.rs -const_generics_5.rs -const_generics_7.rs -derive_empty.rs -derive_macro1.rs -expected_type_args2.rs feature_rust_attri0.rs -format_args_basic_expansion.rs -generic-default1.rs -generics1.rs -generics10.rs -generics11.rs -generics3.rs -generics4.rs -generics5.rs -generics6.rs generics9.rs -if_let_expr.rs -issue-1130.rs -issue-1173.rs -issue-1272.rs -issue-1447.rs -issue-1483.rs -issue-1725-1.rs -issue-1725-2.rs -issue-1786.rs -issue-1893.rs issue-1901.rs issue-1981.rs -issue-2036.rs issue-2043.rs -issue-2136-2.rs -issue-2142.rs -issue-2238.rs issue-2330.rs -issue-2479.rs -issue-2723-1.rs -issue-2723-2.rs -issue-2772-2.rs -issue-2775.rs -issue-2782.rs issue-2812.rs issue-850.rs -issue-852.rs issue-855.rs +issue-3315-2.rs iterators1.rs lookup_err1.rs -macros/mbe/macro13.rs -macros/mbe/macro15.rs -macros/mbe/macro23.rs -macros/mbe/macro40.rs macros/mbe/macro43.rs -macros/mbe/macro44.rs -macros/mbe/macro50.rs -macros/mbe/macro54.rs macros/mbe/macro6.rs -macros/mbe/macro_rules_macro_rules.rs -macros/mbe/macro_use1.rs -match-never-ltype.rs -match-never-rtype.rs -match1.rs -match2.rs -match3.rs -match4.rs -match5.rs -match9.rs -method2.rs multiple_bindings1.rs multiple_bindings2.rs -name_resolution2.rs -name_resolution4.rs -nested_macro_use1.rs -nested_macro_use2.rs -nested_macro_use3.rs -not_find_value_in_scope.rs -parse_associated_type_as_generic_arg.rs -parse_associated_type_as_generic_arg2.rs -parse_associated_type_as_generic_arg3.rs -parse_complex_generic_application.rs -parse_complex_generic_application2.rs -path_as_generic_arg.rs -pattern-struct.rs -privacy4.rs privacy5.rs privacy8.rs -macros/proc/attribute_non_function.rs -macros/proc/derive_non_function.rs -macros/proc/non_function.rs pub_restricted_1.rs pub_restricted_2.rs pub_restricted_3.rs -redef_error2.rs -redef_error4.rs -redef_error5.rs -self-path1.rs -self-path2.rs sizeof-stray-infer-var-bug.rs -struct-expr-parse.rs -traits3.rs -traits6.rs -traits7.rs -type-bindings1.rs -unconstrained_type_param.rs undeclared_label.rs use_1.rs -use_2.rs -v0-mangle1.rs -v0-mangle2.rs while_break_expr.rs -exhaustiveness1.rs -exhaustiveness2.rs -exhaustiveness3.rs -issue-2324-1.rs -issue-2324-2.rs -issue-3046.rs -issue-3139-2.rs -issue-3032-1.rs -issue-3032-2.rs -# https://github.com/Rust-GCC/gccrs/issues/3189 -if_let_expr_simple.rs -iflet.rs -issue-3033.rs -issue-3009.rs -issue-2953-2.rs -issue-1773.rs issue-2905-2.rs -issue-2907.rs -issue-2423.rs issue-266.rs -additional-trait-bounds2.rs -auto_traits3.rs -issue-3140.rs -cmp1.rs -derive_clone_enum1.rs -derive_clone_enum2.rs derive_clone_enum3.rs -derive_macro4.rs -derive_macro6.rs -issue-2987.rs -issue-3139-1.rs -issue-3139-3.rs +derive-debug1.rs +derive-default1.rs +issue-3402-1.rs +for-loop1.rs +for-loop2.rs +issue-3403.rs +derive-eq-invalid.rs +derive-hash1.rs +torture/alt_patterns1.rs +torture/builtin_abort.rs +torture/loop4.rs +torture/loop8.rs +torture/name_resolve1.rs +torture/uninit-intrinsic-1.rs # please don't delete the trailing newline diff --git a/gcc/testsuite/rust/compile/redef_error2.rs b/gcc/testsuite/rust/compile/redef_error2.rs index 65793bc..ed946f8 100644 --- a/gcc/testsuite/rust/compile/redef_error2.rs +++ b/gcc/testsuite/rust/compile/redef_error2.rs @@ -1,4 +1,4 @@ const TEST: i32 = 2; -const TEST: f32 = 3.0; // { dg-error "redefined multiple times" } +const TEST: f32 = 3.0; // { dg-error "defined multiple times" } fn main() {} diff --git a/gcc/testsuite/rust/compile/redef_error5.rs b/gcc/testsuite/rust/compile/redef_error5.rs index dc6ad50..b3d71e1 100644 --- a/gcc/testsuite/rust/compile/redef_error5.rs +++ b/gcc/testsuite/rust/compile/redef_error5.rs @@ -2,7 +2,7 @@ struct Foo(i32, bool); impl Foo { const TEST: i32 = 123; - const TEST: bool = false; // { dg-error "redefined multiple times" } + const TEST: bool = false; // { dg-error "defined multiple times" } } fn main() {} diff --git a/gcc/testsuite/rust/compile/reference1.rs b/gcc/testsuite/rust/compile/reference1.rs index 2f94754..28f7a26 100644 --- a/gcc/testsuite/rust/compile/reference1.rs +++ b/gcc/testsuite/rust/compile/reference1.rs @@ -2,5 +2,5 @@ fn main() { let a = &123; let b: &mut i32 = a; // { dg-error "mismatched mutability" "" { target *-*-* } .-1 } - // { dg-error "mismatched types, expected .&mut i32. but got .& i32." "" { target *-*-* } .-2 } + // { dg-error "mismatched types, expected .&mut i32. but got .& <integer>." "" { target *-*-* } .-2 } } diff --git a/gcc/testsuite/rust/compile/self-path2.rs b/gcc/testsuite/rust/compile/self-path2.rs index b9b82ca..6441c33 100644 --- a/gcc/testsuite/rust/compile/self-path2.rs +++ b/gcc/testsuite/rust/compile/self-path2.rs @@ -11,11 +11,11 @@ fn baz() { crate::bar(); crate::self::foo(); - // { dg-error "failed to resolve: .self. in paths can only be used in start position" "" { target *-*-* } .-1 } + // { dg-error "leading path segment .self. can only be used at the beginning of a path" "" { target *-*-* } .-1 } } type a = foo; type b = crate::foo; type c = self::foo; type d = crate::self::foo; -// { dg-error "failed to resolve: .self. in paths can only be used in start position" "" { target *-*-* } .-1 } +// { dg-error "leading path segment .self. can only be used at the beginning of a path" "" { target *-*-* } .-1 } diff --git a/gcc/testsuite/rust/compile/structural-eq-peq.rs b/gcc/testsuite/rust/compile/structural-eq-peq.rs new file mode 100644 index 0000000..d04c295 --- /dev/null +++ b/gcc/testsuite/rust/compile/structural-eq-peq.rs @@ -0,0 +1,9 @@ +#[lang = "structural_peq"] +pub trait StructuralPartialEq { + // Empty. +} + +#[lang = "structural_teq"] +pub trait StructuralEq { + // Empty. +} diff --git a/gcc/testsuite/rust/compile/torture/if.rs b/gcc/testsuite/rust/compile/torture/if.rs index bcd520f..3b753a7 100644 --- a/gcc/testsuite/rust/compile/torture/if.rs +++ b/gcc/testsuite/rust/compile/torture/if.rs @@ -4,6 +4,10 @@ fn foo() -> bool { fn bar() {} +fn baz(a: i32) { + a; +} + struct Foo1 { one: i32 } @@ -13,7 +17,7 @@ fn main() { if foo() { bar(); let a = Foo1{one: 1}; - a.one + baz (a.one); } -}
\ No newline at end of file +} diff --git a/gcc/testsuite/rust/compile/try-expr1.rs b/gcc/testsuite/rust/compile/try-expr1.rs new file mode 100644 index 0000000..f1a7865 --- /dev/null +++ b/gcc/testsuite/rust/compile/try-expr1.rs @@ -0,0 +1,84 @@ +// { dg-additional-options "-frust-compile-until=typecheck" } + +#[lang = "sized"] +trait Sized {} + +enum Result { + #[lang = "Ok"] + Ok(i32), + #[lang = "Err"] + Err(i32) +} + +pub trait From<T>: Sized { + /// Performs the conversion. + #[lang = "from"] + #[stable(feature = "rust1", since = "1.0.0")] + fn from(_: T) -> Self; +} + +impl<T> From<T> for T { + fn from(t: T) -> Self { t } +} + +#[lang = "try"] +pub trait Try { + /// The type of this value when viewed as successful. + // #[unstable(feature = "try_trait", issue = "42327")] + // type Ok; + /// The type of this value when viewed as failed. + // #[unstable(feature = "try_trait", issue = "42327")] + // type Error; + + /// Applies the "?" operator. A return of `Ok(t)` means that the + /// execution should continue normally, and the result of `?` is the + /// value `t`. A return of `Err(e)` means that execution should branch + /// to the innermost enclosing `catch`, or return from the function. + /// + /// If an `Err(e)` result is returned, the value `e` will be "wrapped" + /// in the return type of the enclosing scope (which must itself implement + /// `Try`). Specifically, the value `X::from_error(From::from(e))` + /// is returned, where `X` is the return type of the enclosing function. + #[lang = "into_result"] + #[unstable(feature = "try_trait", issue = "42327")] + fn into_result(self) -> Result; + + /// Wrap an error value to construct the composite result. For example, + /// `Result::Err(x)` and `Result::from_error(x)` are equivalent. + #[lang = "from_error"] + #[unstable(feature = "try_trait", issue = "42327")] + fn from_error(v: i32) -> Self; + + /// Wrap an OK value to construct the composite result. For example, + /// `Result::Ok(x)` and `Result::from_ok(x)` are equivalent. + #[lang = "from_ok"] + #[unstable(feature = "try_trait", issue = "42327")] + fn from_ok(v: i32) -> Self; +} + +impl Try for Result { + // type Ok = i32; + // type Error = i32; + + fn into_result(self) -> Result { + self + } + + fn from_ok(v: i32) -> Self { + Result::Ok(v) + } + + fn from_error(v: i32) -> Self { + Result::Err(v) + } +} + +fn bar() -> Result { + Result::Ok(15) +} + +fn foo() -> Result { + let a = bar()?; + + Result::Ok(a) +} diff --git a/gcc/testsuite/rust/compile/try-trait.rs b/gcc/testsuite/rust/compile/try-trait.rs new file mode 100644 index 0000000..9ec135d --- /dev/null +++ b/gcc/testsuite/rust/compile/try-trait.rs @@ -0,0 +1,44 @@ +#[lang = "sized"] +trait Sized {} + +enum Result<T, E> { + #[lang = "Ok"] + Ok(T), + #[lang = "Err"] + Err(E) +} + +#[lang = "try"] +pub trait Try { + /// The type of this value when viewed as successful. + #[unstable(feature = "try_trait", issue = "42327")] + type Ok; + /// The type of this value when viewed as failed. + #[unstable(feature = "try_trait", issue = "42327")] + type Error; + + /// Applies the "?" operator. A return of `Ok(t)` means that the + /// execution should continue normally, and the result of `?` is the + /// value `t`. A return of `Err(e)` means that execution should branch + /// to the innermost enclosing `catch`, or return from the function. + /// + /// If an `Err(e)` result is returned, the value `e` will be "wrapped" + /// in the return type of the enclosing scope (which must itself implement + /// `Try`). Specifically, the value `X::from_error(From::from(e))` + /// is returned, where `X` is the return type of the enclosing function. + #[lang = "into_result"] + #[unstable(feature = "try_trait", issue = "42327")] + fn into_result(self) -> Result<Self::Ok, Self::Error>; + + /// Wrap an error value to construct the composite result. For example, + /// `Result::Err(x)` and `Result::from_error(x)` are equivalent. + #[lang = "from_error"] + #[unstable(feature = "try_trait", issue = "42327")] + fn from_error(v: Self::Error) -> Self; + + /// Wrap an OK value to construct the composite result. For example, + /// `Result::Ok(x)` and `Result::from_ok(x)` are equivalent. + #[lang = "from_ok"] + #[unstable(feature = "try_trait", issue = "42327")] + fn from_ok(v: Self::Ok) -> Self; +} diff --git a/gcc/testsuite/rust/compile/type-bindings1.rs b/gcc/testsuite/rust/compile/type-bindings1.rs index 358035b..ef0b471 100644 --- a/gcc/testsuite/rust/compile/type-bindings1.rs +++ b/gcc/testsuite/rust/compile/type-bindings1.rs @@ -7,5 +7,4 @@ fn main() { let a; a = Foo::<A = i32, B = f32>(123f32); // { dg-error "associated type bindings are not allowed here" "" { target *-*-* } .-1 } - // { dg-error {Failed to resolve expression of function call} "" { target *-*-* } .-2 } } diff --git a/gcc/testsuite/rust/compile/unconstrained_type_param.rs b/gcc/testsuite/rust/compile/unconstrained_type_param.rs index 1cef0b9..60554da 100644 --- a/gcc/testsuite/rust/compile/unconstrained_type_param.rs +++ b/gcc/testsuite/rust/compile/unconstrained_type_param.rs @@ -13,5 +13,4 @@ impl<X, Y> Foo<X> { fn main() { let a = Foo::test(); // { dg-error "expected" "" { target *-*-* } .-1 } - // { dg-error "Failed to resolve expression of function call" "" { target *-*-* } .-2 } } diff --git a/gcc/testsuite/rust/execute/crate-metavar1.rs b/gcc/testsuite/rust/execute/crate-metavar1.rs new file mode 100644 index 0000000..8418308 --- /dev/null +++ b/gcc/testsuite/rust/execute/crate-metavar1.rs @@ -0,0 +1,11 @@ +macro_rules! foo { + () => { + $crate::bar() + } +} + +pub fn bar() -> i32 { 1 } + +fn main() -> i32 { + foo!() - crate::bar() +} diff --git a/gcc/testsuite/rust/execute/torture/builtin_macro_option_env.rs b/gcc/testsuite/rust/execute/torture/builtin_macro_option_env.rs new file mode 100644 index 0000000..56fbeaa --- /dev/null +++ b/gcc/testsuite/rust/execute/torture/builtin_macro_option_env.rs @@ -0,0 +1,65 @@ +// { dg-output "VALUE\r*\nVALUE\r*\n" } +// { dg-set-compiler-env-var ENV_MACRO_TEST "VALUE" } + +#![feature(rustc_attrs)] + +#[rustc_builtin_macro] +macro_rules! option_env { + () => {{}}; +} + +#[lang = "sized"] +trait Sized {} + +pub mod core { + pub mod option { + pub enum Option<T> { + #[lang = "Some"] + Some(T), + #[lang = "None"] + None, + } + } +} + +use core::option::Option; + +extern "C" { + fn printf(fmt: *const i8, ...); +} + +fn print(s: &str) { + unsafe { + printf( + "%s\n" as *const str as *const i8, + s as *const str as *const i8, + ); + } +} + +macro_rules! env_macro_test { + () => { "ENV_MACRO_TEST" } +} + +fn main() -> i32 { + let val0: Option<&'static str> = option_env!("ENV_MACRO_TEST"); + + + match val0 { + Option::None => {}, + Option::Some(s) => { + print(s); + } + } + + //eager expansion test + let val1: Option<&'static str> = option_env!(env_macro_test!(),); + + match val1 { + Option::None => {}, + Option::Some(s) => { + print(s); + } + } + 0 +} diff --git a/gcc/testsuite/rust/execute/torture/derive-default1.rs b/gcc/testsuite/rust/execute/torture/derive-default1.rs new file mode 100644 index 0000000..4bcafa0 --- /dev/null +++ b/gcc/testsuite/rust/execute/torture/derive-default1.rs @@ -0,0 +1,26 @@ +#[derive(Default)] +struct Foo { a: i32 } +#[derive(Default)] +struct Bar(i32); + +#[lang = "sized"] +trait Sized {} + +mod core { + mod default { + trait Default: Sized { + fn default() -> Self; + } + + impl Default for i32 { + fn default() -> Self { 1 } + } + } +} + +fn main() -> i32 { + let foo = Foo::default(); + let bar = Bar::default(); + + foo.a + bar.0 - 2 +} diff --git a/gcc/testsuite/rust/execute/torture/derive-partialeq1.rs b/gcc/testsuite/rust/execute/torture/derive-partialeq1.rs new file mode 100644 index 0000000..67b2773 --- /dev/null +++ b/gcc/testsuite/rust/execute/torture/derive-partialeq1.rs @@ -0,0 +1,64 @@ +// { dg-output "true\r*\nfalse\r*\nfalse\r*\n" } + +#![feature(intrinsics)] + +#[lang = "sized"] +trait Sized {} + +#[lang = "copy"] +trait Copy {} + +#[lang = "eq"] +pub trait PartialEq<Rhs: ?Sized = Self> { + /// This method tests for `self` and `other` values to be equal, and is used + /// by `==`. + #[must_use] + #[stable(feature = "rust1", since = "1.0.0")] + fn eq(&self, other: &Rhs) -> bool; + + /// This method tests for `!=`. + #[inline] + #[must_use] + #[stable(feature = "rust1", since = "1.0.0")] + fn ne(&self, other: &Rhs) -> bool { + !self.eq(other) + } +} + +#[lang = "structural_peq"] +trait StructuralPartialEq {} + +#[derive(PartialEq, Copy)] // { dg-warning "unused name" } +struct Foo; + +#[derive(PartialEq)] +struct Bar(Foo); + +#[derive(PartialEq)] +struct Baz { _inner: Foo } + +extern "C" { + fn puts(s: *const i8); +} + +fn print(b: bool) { + if b { + unsafe { puts("true" as *const str as *const i8) } + } else { + unsafe { puts("false" as *const str as *const i8) } + } +} + +fn main() -> i32 { + let x = Foo; + + let b1 = x == Foo; + let b2 = Bar(x) != Bar(Foo); + let b3 = Baz { _inner: Foo } != Baz { _inner: x }; + + print(b1); + print(b2); + print(b3); + + 0 +} diff --git a/gcc/testsuite/rust/execute/torture/enum_intrinsics1.rs b/gcc/testsuite/rust/execute/torture/enum_intrinsics1.rs new file mode 100644 index 0000000..c30bbd3 --- /dev/null +++ b/gcc/testsuite/rust/execute/torture/enum_intrinsics1.rs @@ -0,0 +1,48 @@ +/* { dg-output "0\r*\n2\r*\n" } */ +#![feature(intrinsics)] + +#[lang = "sized"] +pub trait Sized {} + +enum BookFormat { + Paperback, + Hardback, + Ebook, +} + +extern "C" { + fn printf(s: *const i8, ...); +} + +mod core { + mod intrinsics { + #[lang = "discriminant_kind"] + pub trait DiscriminantKind { + #[lang = "discriminant_type"] + type Discriminant; + } + + extern "rust-intrinsic" { + pub fn discriminant_value<T>(v: &T) -> <T as DiscriminantKind>::Discriminant; + } + } +} + +pub fn main() -> i32 { + let a = BookFormat::Paperback; + let b = BookFormat::Ebook; + + unsafe { + let val1: isize = core::intrinsics::discriminant_value(&a); + let val2 = core::intrinsics::discriminant_value(&b); + + let a = "%i\n"; + let b = a as *const str; + let c = b as *const i8; + + printf(c, val1 as i32); + printf(c, val2 as i32); + } + + 0 +} diff --git a/gcc/testsuite/rust/execute/torture/enum_intrinsics2.rs b/gcc/testsuite/rust/execute/torture/enum_intrinsics2.rs new file mode 100644 index 0000000..c1bae35 --- /dev/null +++ b/gcc/testsuite/rust/execute/torture/enum_intrinsics2.rs @@ -0,0 +1,25 @@ +#![feature(intrinsics)] + +#[lang = "sized"] +pub trait Sized {} + +enum BookFormat { + Paperback, + Hardback, + Ebook, +} + +mod core { + mod intrinsics { + extern "rust-intrinsic" { + #[rustc_const_unstable(feature = "variant_count", issue = "73662")] + pub fn variant_count<T>() -> usize; + } + } +} + +pub fn main() -> i32 { + let count = core::intrinsics::variant_count::<BookFormat>(); + + (count as i32) - 3 +} diff --git a/gcc/testsuite/rust/execute/torture/for-loop1.rs b/gcc/testsuite/rust/execute/torture/for-loop1.rs new file mode 100644 index 0000000..5a6a70c --- /dev/null +++ b/gcc/testsuite/rust/execute/torture/for-loop1.rs @@ -0,0 +1,545 @@ +// { dg-output "loop\r*\nloop\r*\n" } +#![feature(intrinsics)] + +pub use option::Option::{self, None, Some}; +pub use result::Result::{self, Err, Ok}; + +extern "C" { + fn printf(s: *const i8, ...); + fn puts(s: *const i8); +} + +mod option { + pub enum Option<T> { + #[lang = "None"] + None, + #[lang = "Some"] + Some(T), + } +} + +mod result { + enum Result<T, E> { + Ok(T), + Err(E), + } +} + +#[lang = "sized"] +pub trait Sized {} + +#[lang = "clone"] +pub trait Clone: Sized { + fn clone(&self) -> Self; + + fn clone_from(&mut self, source: &Self) { + *self = source.clone() + } +} + +mod impls { + use super::Clone; + + macro_rules! impl_clone { + ($($t:ty)*) => { + $( + impl Clone for $t { + fn clone(&self) -> Self { + *self + } + } + )* + } + } + + impl_clone! { + usize u8 u16 u32 u64 // u128 + isize i8 i16 i32 i64 // i128 + f32 f64 + bool char + } +} + +#[lang = "copy"] +pub trait Copy: Clone { + // Empty. +} + +mod copy_impls { + use super::Copy; + + macro_rules! impl_copy { + ($($t:ty)*) => { + $( + impl Copy for $t {} + )* + } + } + + impl_copy! { + usize u8 u16 u32 u64 // u128 + isize i8 i16 i32 i64 // i128 + f32 f64 + bool char + } +} + +mod intrinsics { + extern "rust-intrinsic" { + pub fn add_with_overflow<T>(x: T, y: T) -> (T, bool); + pub fn wrapping_add<T>(a: T, b: T) -> T; + pub fn wrapping_sub<T>(a: T, b: T) -> T; + pub fn rotate_left<T>(a: T, b: T) -> T; + pub fn rotate_right<T>(a: T, b: T) -> T; + pub fn offset<T>(ptr: *const T, count: isize) -> *const T; + pub fn copy_nonoverlapping<T>(src: *const T, dst: *mut T, count: usize); + pub fn move_val_init<T>(dst: *mut T, src: T); + pub fn uninit<T>() -> T; + } +} + +mod ptr { + #[lang = "const_ptr"] + impl<T> *const T { + pub unsafe fn offset(self, count: isize) -> *const T { + intrinsics::offset(self, count) + } + } + + #[lang = "mut_ptr"] + impl<T> *mut T { + pub unsafe fn offset(self, count: isize) -> *mut T { + intrinsics::offset(self, count) as *mut T + } + } + + pub unsafe fn swap_nonoverlapping<T>(x: *mut T, y: *mut T, count: usize) { + let x = x as *mut u8; + let y = y as *mut u8; + let len = mem::size_of::<T>() * count; + swap_nonoverlapping_bytes(x, y, len) + } + + pub unsafe fn swap_nonoverlapping_one<T>(x: *mut T, y: *mut T) { + // For types smaller than the block optimization below, + // just swap directly to avoid pessimizing codegen. + if mem::size_of::<T>() < 32 { + let z = read(x); + intrinsics::copy_nonoverlapping(y, x, 1); + write(y, z); + } else { + swap_nonoverlapping(x, y, 1); + } + } + + pub unsafe fn write<T>(dst: *mut T, src: T) { + intrinsics::move_val_init(&mut *dst, src) + } + + pub unsafe fn read<T>(src: *const T) -> T { + let mut tmp: T = mem::uninitialized(); + intrinsics::copy_nonoverlapping(src, &mut tmp, 1); + tmp + } + + pub unsafe fn swap_nonoverlapping_bytes(x: *mut u8, y: *mut u8, len: usize) { + struct Block(u64, u64, u64, u64); + struct UnalignedBlock(u64, u64, u64, u64); + + let block_size = mem::size_of::<Block>(); + + // Loop through x & y, copying them `Block` at a time + // The optimizer should unroll the loop fully for most types + // N.B. We can't use a for loop as the `range` impl calls `mem::swap` recursively + let mut i: usize = 0; + while i + block_size <= len { + // Create some uninitialized memory as scratch space + // Declaring `t` here avoids aligning the stack when this loop is unused + let mut t: Block = mem::uninitialized(); + let t = &mut t as *mut _ as *mut u8; + let x = x.offset(i as isize); + let y = y.offset(i as isize); + + // Swap a block of bytes of x & y, using t as a temporary buffer + // This should be optimized into efficient SIMD operations where available + intrinsics::copy_nonoverlapping(x, t, block_size); + intrinsics::copy_nonoverlapping(y, x, block_size); + intrinsics::copy_nonoverlapping(t, y, block_size); + i += block_size; + } + + if i < len { + // Swap any remaining bytes + let mut t: UnalignedBlock = mem::uninitialized(); + let rem = len - i; + + let t = &mut t as *mut _ as *mut u8; + let x = x.offset(i as isize); + let y = y.offset(i as isize); + + intrinsics::copy_nonoverlapping(x, t, rem); + intrinsics::copy_nonoverlapping(y, x, rem); + intrinsics::copy_nonoverlapping(t, y, rem); + } + } +} + +mod mem { + extern "rust-intrinsic" { + #[rustc_const_stable(feature = "const_transmute", since = "1.46.0")] + pub fn transmute<T, U>(_: T) -> U; + #[rustc_const_stable(feature = "const_size_of", since = "1.40.0")] + pub fn size_of<T>() -> usize; + } + + pub fn swap<T>(x: &mut T, y: &mut T) { + unsafe { + ptr::swap_nonoverlapping_one(x, y); + } + } + + pub fn replace<T>(dest: &mut T, mut src: T) -> T { + swap(dest, &mut src); + src + } + + pub unsafe fn uninitialized<T>() -> T { + intrinsics::uninit() + } +} + +macro_rules! impl_uint { + ($($ty:ident = $lang:literal),*) => { + $( + impl $ty { + pub fn wrapping_add(self, rhs: Self) -> Self { + unsafe { + intrinsics::wrapping_add(self, rhs) + } + } + + pub fn wrapping_sub(self, rhs: Self) -> Self { + unsafe { + intrinsics::wrapping_sub(self, rhs) + } + } + + pub fn rotate_left(self, n: u32) -> Self { + unsafe { + intrinsics::rotate_left(self, n as Self) + } + } + + pub fn rotate_right(self, n: u32) -> Self { + unsafe { + intrinsics::rotate_right(self, n as Self) + } + } + + pub fn to_le(self) -> Self { + #[cfg(target_endian = "little")] + { + self + } + } + + pub const fn from_le_bytes(bytes: [u8; mem::size_of::<Self>()]) -> Self { + Self::from_le(Self::from_ne_bytes(bytes)) + } + + pub const fn from_le(x: Self) -> Self { + #[cfg(target_endian = "little")] + { + x + } + } + + pub const fn from_ne_bytes(bytes: [u8; mem::size_of::<Self>()]) -> Self { + unsafe { mem::transmute(bytes) } + } + + pub fn checked_add(self, rhs: Self) -> Option<Self> { + let (a, b) = self.overflowing_add(rhs); + if b { + Option::None + } else { + Option::Some(a) + } + } + + pub fn overflowing_add(self, rhs: Self) -> (Self, bool) { + let (a, b) = unsafe { intrinsics::add_with_overflow(self as $ty, rhs as $ty) }; + (a as Self, b) + } + } + )* + } +} + +impl_uint!( + u8 = "u8", + u16 = "u16", + u32 = "u32", + u64 = "u64", + usize = "usize" +); + +#[lang = "add"] +pub trait Add<RHS = Self> { + type Output; + + fn add(self, rhs: RHS) -> Self::Output; +} +macro_rules! add_impl { + ($($t:ty)*) => ($( + impl Add for $t { + type Output = $t; + + fn add(self, other: $t) -> $t { self + other } + } + )*) +} + +add_impl! { usize u8 u16 u32 u64 /*isize i8 i16 i32 i64*/ f32 f64 } + +#[lang = "sub"] +pub trait Sub<RHS = Self> { + type Output; + + fn sub(self, rhs: RHS) -> Self::Output; +} +macro_rules! sub_impl { + ($($t:ty)*) => ($( + impl Sub for $t { + type Output = $t; + + fn sub(self, other: $t) -> $t { self - other } + } + )*) +} + +sub_impl! { usize u8 u16 u32 u64 /*isize i8 i16 i32 i64*/ f32 f64 } + +#[lang = "Range"] +pub struct Range<Idx> { + pub start: Idx, + pub end: Idx, +} + +pub trait TryFrom<T>: Sized { + /// The type returned in the event of a conversion error. + type Error; + + /// Performs the conversion. + fn try_from(value: T) -> Result<Self, Self::Error>; +} + +pub trait From<T>: Sized { + fn from(_: T) -> Self; +} + +impl<T> From<T> for T { + fn from(t: T) -> T { + t + } +} + +impl<T, U> TryFrom<U> for T +where + T: From<U>, +{ + type Error = !; + + fn try_from(value: U) -> Result<Self, Self::Error> { + Ok(T::from(value)) + } +} + +trait Step { + /// Returns the number of steps between two step objects. The count is + /// inclusive of `start` and exclusive of `end`. + /// + /// Returns `None` if it is not possible to calculate `steps_between` + /// without overflow. + fn steps_between(start: &Self, end: &Self) -> Option<usize>; + + /// Replaces this step with `1`, returning itself + fn replace_one(&mut self) -> Self; + + /// Replaces this step with `0`, returning itself + fn replace_zero(&mut self) -> Self; + + /// Adds one to this step, returning the result + fn add_one(&self) -> Self; + + /// Subtracts one to this step, returning the result + fn sub_one(&self) -> Self; + + /// Add an usize, returning None on overflow + fn add_usize(&self, n: usize) -> Option<Self>; +} + +// These are still macro-generated because the integer literals resolve to different types. +macro_rules! step_identical_methods { + () => { + #[inline] + fn replace_one(&mut self) -> Self { + mem::replace(self, 1) + } + + #[inline] + fn replace_zero(&mut self) -> Self { + mem::replace(self, 0) + } + + #[inline] + fn add_one(&self) -> Self { + Add::add(*self, 1) + } + + #[inline] + fn sub_one(&self) -> Self { + Sub::sub(*self, 1) + } + }; +} + +macro_rules! step_impl_unsigned { + ($($t:ty)*) => ($( + impl Step for $t { + fn steps_between(start: &$t, end: &$t) -> Option<usize> { + if *start < *end { + // Note: We assume $t <= usize here + Option::Some((*end - *start) as usize) + } else { + Option::Some(0) + } + } + + fn add_usize(&self, n: usize) -> Option<Self> { + match <$t>::try_from(n) { + Result::Ok(n_as_t) => self.checked_add(n_as_t), + Result::Err(_) => Option::None, + } + } + + step_identical_methods!(); + } + )*) +} +macro_rules! step_impl_signed { + ($( [$t:ty : $unsigned:ty] )*) => ($( + impl Step for $t { + #[inline] + #[allow(trivial_numeric_casts)] + fn steps_between(start: &$t, end: &$t) -> Option<usize> { + if *start < *end { + // Note: We assume $t <= isize here + // Use .wrapping_sub and cast to usize to compute the + // difference that may not fit inside the range of isize. + Option::Some((*end as isize).wrapping_sub(*start as isize) as usize) + } else { + Option::Some(0) + } + } + + #[inline] + #[allow(unreachable_patterns)] + fn add_usize(&self, n: usize) -> Option<Self> { + match <$unsigned>::try_from(n) { + Result::Ok(n_as_unsigned) => { + // Wrapping in unsigned space handles cases like + // `-120_i8.add_usize(200) == Option::Some(80_i8)`, + // even though 200_usize is out of range for i8. + let wrapped = (*self as $unsigned).wrapping_add(n_as_unsigned) as $t; + if wrapped >= *self { + Option::Some(wrapped) + } else { + Option::None // Addition overflowed + } + } + Result::Err(_) => Option::None, + } + } + + step_identical_methods!(); + } + )*) +} + +macro_rules! step_impl_no_between { + ($($t:ty)*) => ($( + impl Step for $t { + #[inline] + fn steps_between(_start: &Self, _end: &Self) -> Option<usize> { + Option::None + } + + #[inline] + fn add_usize(&self, n: usize) -> Option<Self> { + self.checked_add(n as $t) + } + + step_identical_methods!(); + } + )*) +} + +step_impl_unsigned!(usize); + +pub trait Iterator { + type Item; + + #[lang = "next"] + fn next(&mut self) -> Option<Self::Item>; +} + +impl<A: Step> Iterator for Range<A> { + type Item = A; + + fn next(&mut self) -> Option<A> { + if self.start < self.end { + // We check for overflow here, even though it can't actually + // happen. Adding this check does however help llvm vectorize loops + // for some ranges that don't get vectorized otherwise, + // and this won't actually result in an extra check in an optimized build. + match self.start.add_usize(1) { + Option::Some(mut n) => { + mem::swap(&mut n, &mut self.start); + Option::Some(n) + } + Option::None => Option::None, + } + } else { + Option::None + } + } +} + +pub trait IntoIterator { + type Item; + + type IntoIter: Iterator<Item = Self::Item>; + + #[lang = "into_iter"] + fn into_iter(self) -> Self::IntoIter; +} + +impl<I: Iterator> IntoIterator for I { + type Item = I::Item; + type IntoIter = I; + + fn into_iter(self) -> I { + self + } +} + +pub fn main() -> i32 { + let a = 1usize..3usize; + + for i in a { // { dg-warning "unused name" } + unsafe { puts("loop\0" as *const str as *const i8); } + } + + 0 +} diff --git a/gcc/testsuite/rust/execute/torture/for-loop2.rs b/gcc/testsuite/rust/execute/torture/for-loop2.rs new file mode 100644 index 0000000..5ba2cd1 --- /dev/null +++ b/gcc/testsuite/rust/execute/torture/for-loop2.rs @@ -0,0 +1,544 @@ +// { dg-output "loop1\r*\nloop2\r*\n" } +#![feature(intrinsics)] + +pub use option::Option::{self, None, Some}; +pub use result::Result::{self, Err, Ok}; + +extern "C" { + fn printf(s: *const i8, ...); +} + +mod option { + pub enum Option<T> { + #[lang = "None"] + None, + #[lang = "Some"] + Some(T), + } +} + +mod result { + enum Result<T, E> { + Ok(T), + Err(E), + } +} + +#[lang = "sized"] +pub trait Sized {} + +#[lang = "clone"] +pub trait Clone: Sized { + fn clone(&self) -> Self; + + fn clone_from(&mut self, source: &Self) { + *self = source.clone() + } +} + +mod impls { + use super::Clone; + + macro_rules! impl_clone { + ($($t:ty)*) => { + $( + impl Clone for $t { + fn clone(&self) -> Self { + *self + } + } + )* + } + } + + impl_clone! { + usize u8 u16 u32 u64 // u128 + isize i8 i16 i32 i64 // i128 + f32 f64 + bool char + } +} + +#[lang = "copy"] +pub trait Copy: Clone { + // Empty. +} + +mod copy_impls { + use super::Copy; + + macro_rules! impl_copy { + ($($t:ty)*) => { + $( + impl Copy for $t {} + )* + } + } + + impl_copy! { + usize u8 u16 u32 u64 // u128 + isize i8 i16 i32 i64 // i128 + f32 f64 + bool char + } +} + +mod intrinsics { + extern "rust-intrinsic" { + pub fn add_with_overflow<T>(x: T, y: T) -> (T, bool); + pub fn wrapping_add<T>(a: T, b: T) -> T; + pub fn wrapping_sub<T>(a: T, b: T) -> T; + pub fn rotate_left<T>(a: T, b: T) -> T; + pub fn rotate_right<T>(a: T, b: T) -> T; + pub fn offset<T>(ptr: *const T, count: isize) -> *const T; + pub fn copy_nonoverlapping<T>(src: *const T, dst: *mut T, count: usize); + pub fn move_val_init<T>(dst: *mut T, src: T); + pub fn uninit<T>() -> T; + } +} + +mod ptr { + #[lang = "const_ptr"] + impl<T> *const T { + pub unsafe fn offset(self, count: isize) -> *const T { + intrinsics::offset(self, count) + } + } + + #[lang = "mut_ptr"] + impl<T> *mut T { + pub unsafe fn offset(self, count: isize) -> *mut T { + intrinsics::offset(self, count) as *mut T + } + } + + pub unsafe fn swap_nonoverlapping<T>(x: *mut T, y: *mut T, count: usize) { + let x = x as *mut u8; + let y = y as *mut u8; + let len = mem::size_of::<T>() * count; + swap_nonoverlapping_bytes(x, y, len) + } + + pub unsafe fn swap_nonoverlapping_one<T>(x: *mut T, y: *mut T) { + // For types smaller than the block optimization below, + // just swap directly to avoid pessimizing codegen. + if mem::size_of::<T>() < 32 { + let z = read(x); + intrinsics::copy_nonoverlapping(y, x, 1); + write(y, z); + } else { + swap_nonoverlapping(x, y, 1); + } + } + + pub unsafe fn write<T>(dst: *mut T, src: T) { + intrinsics::move_val_init(&mut *dst, src) + } + + pub unsafe fn read<T>(src: *const T) -> T { + let mut tmp: T = mem::uninitialized(); + intrinsics::copy_nonoverlapping(src, &mut tmp, 1); + tmp + } + + pub unsafe fn swap_nonoverlapping_bytes(x: *mut u8, y: *mut u8, len: usize) { + struct Block(u64, u64, u64, u64); + struct UnalignedBlock(u64, u64, u64, u64); + + let block_size = mem::size_of::<Block>(); + + // Loop through x & y, copying them `Block` at a time + // The optimizer should unroll the loop fully for most types + // N.B. We can't use a for loop as the `range` impl calls `mem::swap` recursively + let mut i: usize = 0; + while i + block_size <= len { + // Create some uninitialized memory as scratch space + // Declaring `t` here avoids aligning the stack when this loop is unused + let mut t: Block = mem::uninitialized(); + let t = &mut t as *mut _ as *mut u8; + let x = x.offset(i as isize); + let y = y.offset(i as isize); + + // Swap a block of bytes of x & y, using t as a temporary buffer + // This should be optimized into efficient SIMD operations where available + intrinsics::copy_nonoverlapping(x, t, block_size); + intrinsics::copy_nonoverlapping(y, x, block_size); + intrinsics::copy_nonoverlapping(t, y, block_size); + i += block_size; + } + + if i < len { + // Swap any remaining bytes + let mut t: UnalignedBlock = mem::uninitialized(); + let rem = len - i; + + let t = &mut t as *mut _ as *mut u8; + let x = x.offset(i as isize); + let y = y.offset(i as isize); + + intrinsics::copy_nonoverlapping(x, t, rem); + intrinsics::copy_nonoverlapping(y, x, rem); + intrinsics::copy_nonoverlapping(t, y, rem); + } + } +} + +mod mem { + extern "rust-intrinsic" { + #[rustc_const_stable(feature = "const_transmute", since = "1.46.0")] + pub fn transmute<T, U>(_: T) -> U; + #[rustc_const_stable(feature = "const_size_of", since = "1.40.0")] + pub fn size_of<T>() -> usize; + } + + pub fn swap<T>(x: &mut T, y: &mut T) { + unsafe { + ptr::swap_nonoverlapping_one(x, y); + } + } + + pub fn replace<T>(dest: &mut T, mut src: T) -> T { + swap(dest, &mut src); + src + } + + pub unsafe fn uninitialized<T>() -> T { + intrinsics::uninit() + } +} + +macro_rules! impl_uint { + ($($ty:ident = $lang:literal),*) => { + $( + impl $ty { + pub fn wrapping_add(self, rhs: Self) -> Self { + unsafe { + intrinsics::wrapping_add(self, rhs) + } + } + + pub fn wrapping_sub(self, rhs: Self) -> Self { + unsafe { + intrinsics::wrapping_sub(self, rhs) + } + } + + pub fn rotate_left(self, n: u32) -> Self { + unsafe { + intrinsics::rotate_left(self, n as Self) + } + } + + pub fn rotate_right(self, n: u32) -> Self { + unsafe { + intrinsics::rotate_right(self, n as Self) + } + } + + pub fn to_le(self) -> Self { + #[cfg(target_endian = "little")] + { + self + } + } + + pub const fn from_le_bytes(bytes: [u8; mem::size_of::<Self>()]) -> Self { + Self::from_le(Self::from_ne_bytes(bytes)) + } + + pub const fn from_le(x: Self) -> Self { + #[cfg(target_endian = "little")] + { + x + } + } + + pub const fn from_ne_bytes(bytes: [u8; mem::size_of::<Self>()]) -> Self { + unsafe { mem::transmute(bytes) } + } + + pub fn checked_add(self, rhs: Self) -> Option<Self> { + let (a, b) = self.overflowing_add(rhs); + if b { + Option::None + } else { + Option::Some(a) + } + } + + pub fn overflowing_add(self, rhs: Self) -> (Self, bool) { + let (a, b) = unsafe { intrinsics::add_with_overflow(self as $ty, rhs as $ty) }; + (a as Self, b) + } + } + )* + } +} + +impl_uint!( + u8 = "u8", + u16 = "u16", + u32 = "u32", + u64 = "u64", + usize = "usize" +); + +#[lang = "add"] +pub trait Add<RHS = Self> { + type Output; + + fn add(self, rhs: RHS) -> Self::Output; +} +macro_rules! add_impl { + ($($t:ty)*) => ($( + impl Add for $t { + type Output = $t; + + fn add(self, other: $t) -> $t { self + other } + } + )*) +} + +add_impl! { usize u8 u16 u32 u64 /*isize i8 i16 i32 i64*/ f32 f64 } + +#[lang = "sub"] +pub trait Sub<RHS = Self> { + type Output; + + fn sub(self, rhs: RHS) -> Self::Output; +} +macro_rules! sub_impl { + ($($t:ty)*) => ($( + impl Sub for $t { + type Output = $t; + + fn sub(self, other: $t) -> $t { self - other } + } + )*) +} + +sub_impl! { usize u8 u16 u32 u64 /*isize i8 i16 i32 i64*/ f32 f64 } + +#[lang = "Range"] +pub struct Range<Idx> { + pub start: Idx, + pub end: Idx, +} + +pub trait TryFrom<T>: Sized { + /// The type returned in the event of a conversion error. + type Error; + + /// Performs the conversion. + fn try_from(value: T) -> Result<Self, Self::Error>; +} + +pub trait From<T>: Sized { + fn from(_: T) -> Self; +} + +impl<T> From<T> for T { + fn from(t: T) -> T { + t + } +} + +impl<T, U> TryFrom<U> for T +where + T: From<U>, +{ + type Error = !; + + fn try_from(value: U) -> Result<Self, Self::Error> { + Ok(T::from(value)) + } +} + +trait Step { + /// Returns the number of steps between two step objects. The count is + /// inclusive of `start` and exclusive of `end`. + /// + /// Returns `None` if it is not possible to calculate `steps_between` + /// without overflow. + fn steps_between(start: &Self, end: &Self) -> Option<usize>; + + /// Replaces this step with `1`, returning itself + fn replace_one(&mut self) -> Self; + + /// Replaces this step with `0`, returning itself + fn replace_zero(&mut self) -> Self; + + /// Adds one to this step, returning the result + fn add_one(&self) -> Self; + + /// Subtracts one to this step, returning the result + fn sub_one(&self) -> Self; + + /// Add an usize, returning None on overflow + fn add_usize(&self, n: usize) -> Option<Self>; +} + +// These are still macro-generated because the integer literals resolve to different types. +macro_rules! step_identical_methods { + () => { + #[inline] + fn replace_one(&mut self) -> Self { + mem::replace(self, 1) + } + + #[inline] + fn replace_zero(&mut self) -> Self { + mem::replace(self, 0) + } + + #[inline] + fn add_one(&self) -> Self { + Add::add(*self, 1) + } + + #[inline] + fn sub_one(&self) -> Self { + Sub::sub(*self, 1) + } + }; +} + +macro_rules! step_impl_unsigned { + ($($t:ty)*) => ($( + impl Step for $t { + fn steps_between(start: &$t, end: &$t) -> Option<usize> { + if *start < *end { + // Note: We assume $t <= usize here + Option::Some((*end - *start) as usize) + } else { + Option::Some(0) + } + } + + fn add_usize(&self, n: usize) -> Option<Self> { + match <$t>::try_from(n) { + Result::Ok(n_as_t) => self.checked_add(n_as_t), + Result::Err(_) => Option::None, + } + } + + step_identical_methods!(); + } + )*) +} +macro_rules! step_impl_signed { + ($( [$t:ty : $unsigned:ty] )*) => ($( + impl Step for $t { + #[inline] + #[allow(trivial_numeric_casts)] + fn steps_between(start: &$t, end: &$t) -> Option<usize> { + if *start < *end { + // Note: We assume $t <= isize here + // Use .wrapping_sub and cast to usize to compute the + // difference that may not fit inside the range of isize. + Option::Some((*end as isize).wrapping_sub(*start as isize) as usize) + } else { + Option::Some(0) + } + } + + #[inline] + #[allow(unreachable_patterns)] + fn add_usize(&self, n: usize) -> Option<Self> { + match <$unsigned>::try_from(n) { + Result::Ok(n_as_unsigned) => { + // Wrapping in unsigned space handles cases like + // `-120_i8.add_usize(200) == Option::Some(80_i8)`, + // even though 200_usize is out of range for i8. + let wrapped = (*self as $unsigned).wrapping_add(n_as_unsigned) as $t; + if wrapped >= *self { + Option::Some(wrapped) + } else { + Option::None // Addition overflowed + } + } + Result::Err(_) => Option::None, + } + } + + step_identical_methods!(); + } + )*) +} + +macro_rules! step_impl_no_between { + ($($t:ty)*) => ($( + impl Step for $t { + #[inline] + fn steps_between(_start: &Self, _end: &Self) -> Option<usize> { + Option::None + } + + #[inline] + fn add_usize(&self, n: usize) -> Option<Self> { + self.checked_add(n as $t) + } + + step_identical_methods!(); + } + )*) +} + +step_impl_unsigned!(usize); + +pub trait Iterator { + type Item; + + #[lang = "next"] + fn next(&mut self) -> Option<Self::Item>; +} + +impl<A: Step> Iterator for Range<A> { + type Item = A; + + fn next(&mut self) -> Option<A> { + if self.start < self.end { + // We check for overflow here, even though it can't actually + // happen. Adding this check does however help llvm vectorize loops + // for some ranges that don't get vectorized otherwise, + // and this won't actually result in an extra check in an optimized build. + match self.start.add_usize(1) { + Option::Some(mut n) => { + mem::swap(&mut n, &mut self.start); + Option::Some(n) + } + Option::None => Option::None, + } + } else { + Option::None + } + } +} + +pub trait IntoIterator { + type Item; + + type IntoIter: Iterator<Item = Self::Item>; + + #[lang = "into_iter"] + fn into_iter(self) -> Self::IntoIter; +} + +impl<I: Iterator> IntoIterator for I { + type Item = I::Item; + type IntoIter = I; + + fn into_iter(self) -> I { + self + } +} + +pub fn main() -> i32 { + let a = 1usize..3usize; + + for i in a { + unsafe { printf("loop%d\n\0" as *const str as *const i8, i); } + } + + 0 +} diff --git a/gcc/testsuite/rust/execute/torture/issue-3126.rs b/gcc/testsuite/rust/execute/torture/issue-3126.rs new file mode 100644 index 0000000..f505146 --- /dev/null +++ b/gcc/testsuite/rust/execute/torture/issue-3126.rs @@ -0,0 +1,52 @@ +/* { dg-output "child\r*\n" }*/ +extern "C" { + fn printf(s: *const i8, ...); +} + +#[lang = "sized"] +pub trait Sized {} + +struct Foo { + my_int: u32, + // { dg-warning "field is never read: .my_int." "" { target *-*-* } .-1 } +} + +trait Parent<T> { + fn parent(&self) -> T; +} + +trait Child: Parent<u32> { + fn child(&self); +} + +impl Parent<u32> for Foo { + fn parent(&self) -> u32 { + unsafe { + let parent = "parent %i\n\0"; + let msg = parent as *const str; + printf(msg as *const i8, self.my_int); + return self.my_int; + } + } +} + +impl Child for Foo { + fn child(&self) { + let _ = self; + unsafe { + let child = "child\n\0"; + let msg = child as *const str; + printf(msg as *const i8); + } + } +} + +pub fn main() -> i32 { + let a = Foo { my_int: 0xf00dfeed }; + let b: &dyn Child = &a; + + // b.parent(); + b.child(); + + 0 +} diff --git a/gcc/testsuite/rust/execute/torture/issue-3381.rs b/gcc/testsuite/rust/execute/torture/issue-3381.rs new file mode 100644 index 0000000..62dbcd0 --- /dev/null +++ b/gcc/testsuite/rust/execute/torture/issue-3381.rs @@ -0,0 +1,90 @@ +/* { dg-output "Err: 15\r*\n" } */ +#[lang = "sized"] +trait Sized {} + +enum Result<T, E> { + #[lang = "Ok"] + Ok(T), + #[lang = "Err"] + Err(E), +} + +#[lang = "try"] +pub trait Try { + type Ok; + type Error; + + #[lang = "into_result"] + #[unstable(feature = "try_trait", issue = "42327")] + fn into_result(self) -> Result<Self::Ok, Self::Error>; + + #[lang = "from_error"] + #[unstable(feature = "try_trait", issue = "42327")] + fn from_error(v: Self::Ok) -> Self; + + #[lang = "from_ok"] + #[unstable(feature = "try_trait", issue = "42327")] + fn from_ok(v: Self::Error) -> Self; +} + +impl<T, E> Try for Result<T, E> { + type Ok = T; + type Error = E; + + fn into_result(self) -> Result<T, E> { + self + } + + fn from_ok(v: T) -> Self { + Result::Ok(v) + } + + fn from_error(v: E) -> Self { + Result::Err(v) + } +} + +pub trait From<T>: Sized { + fn from(_: T) -> Self; +} + +impl<T> From<T> for T { + fn from(t: T) -> Self { + t + } +} + +fn print(s: &str, value: i32) { + extern "C" { + fn printf(s: *const i8, ...); + } + + unsafe { + printf(s as *const str as *const i8, value); + } +} + +fn baz() -> Result<i32, i32> { + Result::Err(15) +} + +fn foo() -> Result<i32, i32> { + let b = match baz() { + Result::Ok(value) => value, + Result::Err(err) => { + return Try::from_error(From::from(err)); + } + }; + + Result::Ok(15 + b) +} + +fn main() -> i32 { + let a = foo(); + match a { + Result::Ok(value) => print("Ok: %i\n", value), + Result::Err(err) => print("Err: %i\n", err), + }; + + 0 +} diff --git a/gcc/testsuite/rust/execute/torture/issue-3502.rs b/gcc/testsuite/rust/execute/torture/issue-3502.rs new file mode 100644 index 0000000..f07a126 --- /dev/null +++ b/gcc/testsuite/rust/execute/torture/issue-3502.rs @@ -0,0 +1,52 @@ +/* { dg-output "parent 123\r*\nchild\r*\n" } */ +extern "C" { + fn printf(s: *const i8, ...); +} + +#[lang = "sized"] +pub trait Sized {} + +struct Foo { + my_int: u32, + // { dg-warning "field is never read: .my_int." "" { target *-*-* } .-1 } +} + +trait Parent<T> { + fn parent(&self) -> T; +} + +trait Child: Parent<u32> { + fn child(&self); +} + +impl Parent<u32> for Foo { + fn parent(&self) -> u32 { + unsafe { + let parent = "parent %u\n\0"; + let msg = parent as *const str; + printf(msg as *const i8, self.my_int); + return self.my_int; + } + } +} + +impl Child for Foo { + fn child(&self) { + let _ = self; + unsafe { + let child = "child\n\0"; + let msg = child as *const str; + printf(msg as *const i8); + } + } +} + +pub fn main() -> i32 { + let a = Foo { my_int: 123 }; + let b: &dyn Child = &a; + + b.parent(); + b.child(); + + 0 +} |