diff options
Diffstat (limited to 'gcc/testsuite/gcc.target/riscv')
43 files changed, 332 insertions, 201 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c b/gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c index e2369fc..326d5dc 100644 --- a/gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c +++ b/gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c @@ -10,10 +10,10 @@ func (int a, int b); **sum: ** ... ** cm.mvsa01 s1,s2 -** call func +** call func(?:@plt)? ** mv s0,a0 ** cm.mva01s s1,s2 -** call func +** call func(?:@plt)? ** ... */ int diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c index 9718115..581b5db 100644 --- a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile target { { rv64-*-*}}} */ +/* { dg-do compile { target rv64-*-* } } */ /* { dg-options "-march=rv64gc_zicbop -mabi=lp64" } */ void foo (char *p) diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c index 4871a97..3f7c1a4 100644 --- a/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile target { { rv32-*-*}}} */ +/* { dg-do compile { target rv64-*-* } } */ /* { dg-options "-march=rv32gc_zicbop -mabi=ilp32" } */ void foo (char *p) diff --git a/gcc/testsuite/gcc.target/riscv/cpymem-64.c b/gcc/testsuite/gcc.target/riscv/cpymem-64.c index 37b8ef0..c91b015 100644 --- a/gcc/testsuite/gcc.target/riscv/cpymem-64.c +++ b/gcc/testsuite/gcc.target/riscv/cpymem-64.c @@ -95,7 +95,7 @@ COPY_ALIGNED_N(11) /* **copy_15: ** ... -** (call|tail)\tmemcpy +** (call|tail)\tmemcpy(?:@plt)? ** ... */ COPY_N(15) @@ -116,7 +116,7 @@ COPY_ALIGNED_N(15) /* **copy_27: ** ... -** (call|tail)\tmemcpy +** (call|tail)\tmemcpy(?:@plt)? ** ... */ COPY_N(27) diff --git a/gcc/testsuite/gcc.target/riscv/fmax-snan.c b/gcc/testsuite/gcc.target/riscv/fmax-snan.c index aabaad5..a1f6149 100644 --- a/gcc/testsuite/gcc.target/riscv/fmax-snan.c +++ b/gcc/testsuite/gcc.target/riscv/fmax-snan.c @@ -10,4 +10,4 @@ fmax (double x, double y) /* { dg-final { scan-assembler-not "\tfmax\\.d\t" } } */ /* { dg-final { scan-assembler-not "\tfge\\.d\t" } } */ -/* { dg-final { scan-assembler "\t(call|tail)\tfmax\t" } } */ +/* { dg-final { scan-assembler "\t(call|tail)\tfmax(?:@plt)?\t" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/fmaxf-snan.c b/gcc/testsuite/gcc.target/riscv/fmaxf-snan.c index f74a817..1daf3e9 100644 --- a/gcc/testsuite/gcc.target/riscv/fmaxf-snan.c +++ b/gcc/testsuite/gcc.target/riscv/fmaxf-snan.c @@ -10,4 +10,4 @@ fmaxf (float x, float y) /* { dg-final { scan-assembler-not "\tfmax\\.s\t" } } */ /* { dg-final { scan-assembler-not "\tfge\\.s\t" } } */ -/* { dg-final { scan-assembler "\t(call|tail)\tfmaxf\t" } } */ +/* { dg-final { scan-assembler "\t(call|tail)\tfmaxf(?:@plt)?\t" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/fmin-snan.c b/gcc/testsuite/gcc.target/riscv/fmin-snan.c index 3b2e8c3..cc0e16c 100644 --- a/gcc/testsuite/gcc.target/riscv/fmin-snan.c +++ b/gcc/testsuite/gcc.target/riscv/fmin-snan.c @@ -10,4 +10,4 @@ fmin (double x, double y) /* { dg-final { scan-assembler-not "\tfmin\\.d\t" } } */ /* { dg-final { scan-assembler-not "\tfle\\.d\t" } } */ -/* { dg-final { scan-assembler "\t(call|tail)\tfmin\t" } } */ +/* { dg-final { scan-assembler "\t(call|tail)\tfmin(?:@plt)?\t" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/fminf-snan.c b/gcc/testsuite/gcc.target/riscv/fminf-snan.c index d28822e..598644e 100644 --- a/gcc/testsuite/gcc.target/riscv/fminf-snan.c +++ b/gcc/testsuite/gcc.target/riscv/fminf-snan.c @@ -10,4 +10,4 @@ fminf (float x, float y) /* { dg-final { scan-assembler-not "\tfmin\\.s\t" } } */ /* { dg-final { scan-assembler-not "\tfle\\.s\t" } } */ -/* { dg-final { scan-assembler "\t(call|tail)\tfminf\t" } } */ +/* { dg-final { scan-assembler "\t(call|tail)\tfminf(?:@plt)?\t" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/large-model.c b/gcc/testsuite/gcc.target/riscv/large-model.c index 244d14e..d5ef7a0 100644 --- a/gcc/testsuite/gcc.target/riscv/large-model.c +++ b/gcc/testsuite/gcc.target/riscv/large-model.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64 -fno-section-anchors -mcmodel=large" } */ +/* { dg-options "-march=rv64gc -mabi=lp64 -fno-section-anchors -mcmodel=large -fno-pie" } */ /* { dg-skip-if "" { *-*-* } {"-O0"} } */ int a, b; int foo1() diff --git a/gcc/testsuite/gcc.target/riscv/mcpu-xiangshan-nanhu.c b/gcc/testsuite/gcc.target/riscv/mcpu-xiangshan-nanhu.c index 2903c88..c2a374f 100644 --- a/gcc/testsuite/gcc.target/riscv/mcpu-xiangshan-nanhu.c +++ b/gcc/testsuite/gcc.target/riscv/mcpu-xiangshan-nanhu.c @@ -1,6 +1,6 @@ -/* { dg-do compile } */ +/* { dg-do compile { target { rv64 } } } */ /* { dg-skip-if "-march given" { *-*-* } { "-march=*" } } */ -/* { dg-options "-mcpu=xiangshan-nanhu" { target { rv64 } } } */ +/* { dg-options "-mcpu=xiangshan-nanhu" } */ /* XiangShan Nanhu => rv64imafdc_zba_zbb_zbc_zbs_zbkb_zbkc_zbkx_zknd _zkne_zknh_zksed_zksh_svinval_zicbom_zicboz */ diff --git a/gcc/testsuite/gcc.target/riscv/predef-1.c b/gcc/testsuite/gcc.target/riscv/predef-1.c index 250812a..551346e 100644 --- a/gcc/testsuite/gcc.target/riscv/predef-1.c +++ b/gcc/testsuite/gcc.target/riscv/predef-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32i -mabi=ilp32 -mcmodel=medlow" } */ +/* { dg-options "-march=rv32i -mabi=ilp32 -mcmodel=medlow -fno-pie" } */ int main () { #if !defined(__riscv) diff --git a/gcc/testsuite/gcc.target/riscv/predef-4.c b/gcc/testsuite/gcc.target/riscv/predef-4.c index ba8b5c7..7b3c054 100644 --- a/gcc/testsuite/gcc.target/riscv/predef-4.c +++ b/gcc/testsuite/gcc.target/riscv/predef-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64ia -mabi=lp64 -mcmodel=medlow" } */ +/* { dg-options "-march=rv64ia -mabi=lp64 -mcmodel=medlow -fno-pie" } */ int main () { #if !defined(__riscv) diff --git a/gcc/testsuite/gcc.target/riscv/predef-7.c b/gcc/testsuite/gcc.target/riscv/predef-7.c index 833e2be..36caf8e 100644 --- a/gcc/testsuite/gcc.target/riscv/predef-7.c +++ b/gcc/testsuite/gcc.target/riscv/predef-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32em -mabi=ilp32e -mno-div -mcmodel=medlow" } */ +/* { dg-options "-march=rv32em -mabi=ilp32e -mno-div -mcmodel=medlow -fno-pie" } */ int main () { #if !defined(__riscv) diff --git a/gcc/testsuite/gcc.target/riscv/predef-9.c b/gcc/testsuite/gcc.target/riscv/predef-9.c index b173d5d..fa072ad 100644 --- a/gcc/testsuite/gcc.target/riscv/predef-9.c +++ b/gcc/testsuite/gcc.target/riscv/predef-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64em -mabi=lp64e -mno-div -mcmodel=medlow" } */ +/* { dg-options "-march=rv64em -mabi=lp64e -mno-div -mcmodel=medlow -fno-pie" } */ /* { dg-warning "LP64E ABI is marked for deprecation in GCC" "" { target *-*-* } 0 } */ /* { dg-note "if you need LP64E please notify the GCC project via PR116152" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/riscv/prefetch-zicbop.c b/gcc/testsuite/gcc.target/riscv/prefetch-zicbop.c index 0faa120..44da4b2 100644 --- a/gcc/testsuite/gcc.target/riscv/prefetch-zicbop.c +++ b/gcc/testsuite/gcc.target/riscv/prefetch-zicbop.c @@ -1,4 +1,4 @@ -/* { dg-do compile target { { rv64-*-*}}} */ +/* { dg-do compile { target rv64-*-* } } */ /* { dg-options "-march=rv64gc_zicbop -mabi=lp64" } */ void foo (char *p) diff --git a/gcc/testsuite/gcc.target/riscv/prefetch-zihintntl.c b/gcc/testsuite/gcc.target/riscv/prefetch-zihintntl.c index 78a3afe..43439d7 100644 --- a/gcc/testsuite/gcc.target/riscv/prefetch-zihintntl.c +++ b/gcc/testsuite/gcc.target/riscv/prefetch-zihintntl.c @@ -1,4 +1,4 @@ -/* { dg-do compile target { { rv64-*-*}}} */ +/* { dg-do compile { target rv64-*-* } } */ /* { dg-options "-march=rv64gc_zicbop_zihintntl -mabi=lp64" } */ void foo (char *p) diff --git a/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c b/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c index 0af4d71..fd845f5 100644 --- a/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c +++ b/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c @@ -244,9 +244,9 @@ test_f0 () /* **foo: ** cm.push {ra}, -16 -** call f1 +** call f1(?:@plt)? ** cm.pop {ra}, 16 -** tail f2 +** tail f2(?:@plt)? */ void foo (void) @@ -258,7 +258,7 @@ foo (void) /* **test_popretz: ** cm.push {ra}, -16 -** call f1 +** call f1(?:@plt)? ** li a0,0 ** cm.popret {ra}, 16 */ diff --git a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c index 723889f4..d90f4f4 100644 --- a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c +++ b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c @@ -244,9 +244,9 @@ test_f0 () /* **foo: ** cm.push {ra}, -16 -** call f1 +** call f1(?:@plt)? ** cm.pop {ra}, 16 -** tail f2 +** tail f2(?:@plt)? */ void foo (void) @@ -258,7 +258,7 @@ foo (void) /* **test_popretz: ** cm.push {ra}, -16 -** call f1 +** call f1(?:@plt)? ** li a0,0 ** cm.popret {ra}, 16 */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111391-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111391-2.c index 1f170c9..32db3a6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111391-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111391-2.c @@ -3,7 +3,7 @@ #include "pr111391-1.c" -/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*2,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 } } +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*2,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 } } */ /* { dg-final { scan-assembler-times {vmv\.x\.s} 2 } } */ /* { dg-final { scan-assembler-times {vslidedown.vi\s+v[0-9]+,\s*v[0-9]+,\s*1} 1 } } */ /* { dg-final { scan-assembler-times {slli\s+[a-x0-9]+,[a-x0-9]+,32} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c index 3095a6d..a043b33 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/merge-4.c @@ -119,4 +119,4 @@ merge10 (vnx16df x, vnx16df y, vnx16df *out) *(vnx16df*)out = v; } -/* dg-final scan-assembler-times {\tvmerge.vvm} 11 */ +/* { dg-final { scan-assembler-times {\tvmerge.vvm} 11 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c index 1dfd828..4ae341a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/merge-4.c @@ -3,6 +3,6 @@ #include "../vls-vlmax/merge-4.c" -/* dg-final scan-assembler-times {\tvmerge.vvm} 11 */ +/* { dg-final { scan-assembler-times {\tvmerge.vvm} 11 } } */ /* { dg-final { scan-assembler-not {\tvms} } } */ /* { dg-final { scan-assembler-times {\tvlm.v} 11 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-14.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-14.c index 163152a..222d8c2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-14.c @@ -1,20 +1,20 @@ /* { dg-do compile } */ /* { dg-options "-O3 -march=rv32gc_zve32x_zvl64b -mabi=ilp32d" } */ -void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} -void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} -void f___rvv_int8mf8x3_t () {__rvv_int8mf8x3_t t;} -void f___rvv_uint8mf8x3_t () {__rvv_uint8mf8x3_t t;} -void f___rvv_int8mf8x4_t () {__rvv_int8mf8x4_t t;} -void f___rvv_uint8mf8x4_t () {__rvv_uint8mf8x4_t t;} -void f___rvv_int8mf8x5_t () {__rvv_int8mf8x5_t t;} -void f___rvv_uint8mf8x5_t () {__rvv_uint8mf8x5_t t;} -void f___rvv_int8mf8x6_t () {__rvv_int8mf8x6_t t;} -void f___rvv_uint8mf8x6_t () {__rvv_uint8mf8x6_t t;} -void f___rvv_int8mf8x7_t () {__rvv_int8mf8x7_t t;} -void f___rvv_uint8mf8x7_t () {__rvv_uint8mf8x7_t t;} -void f___rvv_int8mf8x8_t () {__rvv_int8mf8x8_t t;} -void f___rvv_uint8mf8x8_t () {__rvv_uint8mf8x8_t t;} +void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x2_t'} } */ +void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x2_t'} } */ +void f___rvv_int8mf8x3_t () {__rvv_int8mf8x3_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x3_t'} } */ +void f___rvv_uint8mf8x3_t () {__rvv_uint8mf8x3_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x3_t'} } */ +void f___rvv_int8mf8x4_t () {__rvv_int8mf8x4_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x4_t'} } */ +void f___rvv_uint8mf8x4_t () {__rvv_uint8mf8x4_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x4_t'} } */ +void f___rvv_int8mf8x5_t () {__rvv_int8mf8x5_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x5_t'} } */ +void f___rvv_uint8mf8x5_t () {__rvv_uint8mf8x5_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x5_t'} } */ +void f___rvv_int8mf8x6_t () {__rvv_int8mf8x6_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x6_t'} } */ +void f___rvv_uint8mf8x6_t () {__rvv_uint8mf8x6_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x6_t'} } */ +void f___rvv_int8mf8x7_t () {__rvv_int8mf8x7_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x7_t'} } */ +void f___rvv_uint8mf8x7_t () {__rvv_uint8mf8x7_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x7_t'} } */ +void f___rvv_int8mf8x8_t () {__rvv_int8mf8x8_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x8_t'} } */ +void f___rvv_uint8mf8x8_t () {__rvv_uint8mf8x8_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x8_t'} } */ void f___rvv_int8mf4x2_t () {__rvv_int8mf4x2_t t;} void f___rvv_uint8mf4x2_t () {__rvv_uint8mf4x2_t t;} void f___rvv_int8mf4x3_t () {__rvv_int8mf4x3_t t;} @@ -65,20 +65,20 @@ void f___rvv_int8m2x4_t () {__rvv_int8m2x4_t t;} void f___rvv_uint8m2x4_t () {__rvv_uint8m2x4_t t;} void f___rvv_int8m4x2_t () {__rvv_int8m4x2_t t;} void f___rvv_uint8m4x2_t () {__rvv_uint8m4x2_t t;} -void f___rvv_int16mf4x2_t () {__rvv_int16mf4x2_t t;} -void f___rvv_uint16mf4x2_t () {__rvv_uint16mf4x2_t t;} -void f___rvv_int16mf4x3_t () {__rvv_int16mf4x3_t t;} -void f___rvv_uint16mf4x3_t () {__rvv_uint16mf4x3_t t;} -void f___rvv_int16mf4x4_t () {__rvv_int16mf4x4_t t;} -void f___rvv_uint16mf4x4_t () {__rvv_uint16mf4x4_t t;} -void f___rvv_int16mf4x5_t () {__rvv_int16mf4x5_t t;} -void f___rvv_uint16mf4x5_t () {__rvv_uint16mf4x5_t t;} -void f___rvv_int16mf4x6_t () {__rvv_int16mf4x6_t t;} -void f___rvv_uint16mf4x6_t () {__rvv_uint16mf4x6_t t;} -void f___rvv_int16mf4x7_t () {__rvv_int16mf4x7_t t;} -void f___rvv_uint16mf4x7_t () {__rvv_uint16mf4x7_t t;} -void f___rvv_int16mf4x8_t () {__rvv_int16mf4x8_t t;} -void f___rvv_uint16mf4x8_t () {__rvv_uint16mf4x8_t t;} +void f___rvv_int16mf4x2_t () {__rvv_int16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x2_t'} } */ +void f___rvv_uint16mf4x2_t () {__rvv_uint16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x2_t'} } */ +void f___rvv_int16mf4x3_t () {__rvv_int16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x3_t'} } */ +void f___rvv_uint16mf4x3_t () {__rvv_uint16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x3_t'} } */ +void f___rvv_int16mf4x4_t () {__rvv_int16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x4_t'} } */ +void f___rvv_uint16mf4x4_t () {__rvv_uint16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x4_t'} } */ +void f___rvv_int16mf4x5_t () {__rvv_int16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x5_t'} } */ +void f___rvv_uint16mf4x5_t () {__rvv_uint16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x5_t'} } */ +void f___rvv_int16mf4x6_t () {__rvv_int16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x6_t'} } */ +void f___rvv_uint16mf4x6_t () {__rvv_uint16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x6_t'} } */ +void f___rvv_int16mf4x7_t () {__rvv_int16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x7_t'} } */ +void f___rvv_uint16mf4x7_t () {__rvv_uint16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x7_t'} } */ +void f___rvv_int16mf4x8_t () {__rvv_int16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x8_t'} } */ +void f___rvv_uint16mf4x8_t () {__rvv_uint16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x8_t'} } */ void f___rvv_int16mf2x2_t () {__rvv_int16mf2x2_t t;} void f___rvv_uint16mf2x2_t () {__rvv_uint16mf2x2_t t;} void f___rvv_int16mf2x3_t () {__rvv_int16mf2x3_t t;} @@ -115,20 +115,20 @@ void f___rvv_int16m2x4_t () {__rvv_int16m2x4_t t;} void f___rvv_uint16m2x4_t () {__rvv_uint16m2x4_t t;} void f___rvv_int16m4x2_t () {__rvv_int16m4x2_t t;} void f___rvv_uint16m4x2_t () {__rvv_uint16m4x2_t t;} -void f___rvv_int32mf2x2_t () {__rvv_int32mf2x2_t t;} -void f___rvv_uint32mf2x2_t () {__rvv_uint32mf2x2_t t;} -void f___rvv_int32mf2x3_t () {__rvv_int32mf2x3_t t;} -void f___rvv_uint32mf2x3_t () {__rvv_uint32mf2x3_t t;} -void f___rvv_int32mf2x4_t () {__rvv_int32mf2x4_t t;} -void f___rvv_uint32mf2x4_t () {__rvv_uint32mf2x4_t t;} -void f___rvv_int32mf2x5_t () {__rvv_int32mf2x5_t t;} -void f___rvv_uint32mf2x5_t () {__rvv_uint32mf2x5_t t;} -void f___rvv_int32mf2x6_t () {__rvv_int32mf2x6_t t;} -void f___rvv_uint32mf2x6_t () {__rvv_uint32mf2x6_t t;} -void f___rvv_int32mf2x7_t () {__rvv_int32mf2x7_t t;} -void f___rvv_uint32mf2x7_t () {__rvv_uint32mf2x7_t t;} -void f___rvv_int32mf2x8_t () {__rvv_int32mf2x8_t t;} -void f___rvv_uint32mf2x8_t () {__rvv_uint32mf2x8_t t;} +void f___rvv_int32mf2x2_t () {__rvv_int32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x2_t'} } */ +void f___rvv_uint32mf2x2_t () {__rvv_uint32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x2_t'} } */ +void f___rvv_int32mf2x3_t () {__rvv_int32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x3_t'} } */ +void f___rvv_uint32mf2x3_t () {__rvv_uint32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x3_t'} } */ +void f___rvv_int32mf2x4_t () {__rvv_int32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x4_t'} } */ +void f___rvv_uint32mf2x4_t () {__rvv_uint32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x4_t'} } */ +void f___rvv_int32mf2x5_t () {__rvv_int32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x5_t'} } */ +void f___rvv_uint32mf2x5_t () {__rvv_uint32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x5_t'} } */ +void f___rvv_int32mf2x6_t () {__rvv_int32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x6_t'} } */ +void f___rvv_uint32mf2x6_t () {__rvv_uint32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x6_t'} } */ +void f___rvv_int32mf2x7_t () {__rvv_int32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x7_t'} } */ +void f___rvv_uint32mf2x7_t () {__rvv_uint32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x7_t'} } */ +void f___rvv_int32mf2x8_t () {__rvv_int32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x8_t'} } */ +void f___rvv_uint32mf2x8_t () {__rvv_uint32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x8_t'} } */ void f___rvv_int32m1x2_t () {__rvv_int32m1x2_t t;} void f___rvv_uint32m1x2_t () {__rvv_uint32m1x2_t t;} void f___rvv_int32m1x3_t () {__rvv_int32m1x3_t t;} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c index 9e962a7..2762b7a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-16.c @@ -1,20 +1,20 @@ /* { dg-do compile } */ /* { dg-options "-O3 -march=rv32gc_zve32f_zvl64b -mabi=ilp32d" } */ -void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} -void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} -void f___rvv_int8mf8x3_t () {__rvv_int8mf8x3_t t;} -void f___rvv_uint8mf8x3_t () {__rvv_uint8mf8x3_t t;} -void f___rvv_int8mf8x4_t () {__rvv_int8mf8x4_t t;} -void f___rvv_uint8mf8x4_t () {__rvv_uint8mf8x4_t t;} -void f___rvv_int8mf8x5_t () {__rvv_int8mf8x5_t t;} -void f___rvv_uint8mf8x5_t () {__rvv_uint8mf8x5_t t;} -void f___rvv_int8mf8x6_t () {__rvv_int8mf8x6_t t;} -void f___rvv_uint8mf8x6_t () {__rvv_uint8mf8x6_t t;} -void f___rvv_int8mf8x7_t () {__rvv_int8mf8x7_t t;} -void f___rvv_uint8mf8x7_t () {__rvv_uint8mf8x7_t t;} -void f___rvv_int8mf8x8_t () {__rvv_int8mf8x8_t t;} -void f___rvv_uint8mf8x8_t () {__rvv_uint8mf8x8_t t;} +void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x2_t'} } */ +void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x2_t'} } */ +void f___rvv_int8mf8x3_t () {__rvv_int8mf8x3_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x3_t'} } */ +void f___rvv_uint8mf8x3_t () {__rvv_uint8mf8x3_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x3_t'} } */ +void f___rvv_int8mf8x4_t () {__rvv_int8mf8x4_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x4_t'} } */ +void f___rvv_uint8mf8x4_t () {__rvv_uint8mf8x4_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x4_t'} } */ +void f___rvv_int8mf8x5_t () {__rvv_int8mf8x5_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x5_t'} } */ +void f___rvv_uint8mf8x5_t () {__rvv_uint8mf8x5_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x5_t'} } */ +void f___rvv_int8mf8x6_t () {__rvv_int8mf8x6_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x6_t'} } */ +void f___rvv_uint8mf8x6_t () {__rvv_uint8mf8x6_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x6_t'} } */ +void f___rvv_int8mf8x7_t () {__rvv_int8mf8x7_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x7_t'} } */ +void f___rvv_uint8mf8x7_t () {__rvv_uint8mf8x7_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x7_t'} } */ +void f___rvv_int8mf8x8_t () {__rvv_int8mf8x8_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x8_t'} } */ +void f___rvv_uint8mf8x8_t () {__rvv_uint8mf8x8_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x8_t'} } */ void f___rvv_int8mf4x2_t () {__rvv_int8mf4x2_t t;} void f___rvv_uint8mf4x2_t () {__rvv_uint8mf4x2_t t;} void f___rvv_int8mf4x3_t () {__rvv_int8mf4x3_t t;} @@ -65,20 +65,20 @@ void f___rvv_int8m2x4_t () {__rvv_int8m2x4_t t;} void f___rvv_uint8m2x4_t () {__rvv_uint8m2x4_t t;} void f___rvv_int8m4x2_t () {__rvv_int8m4x2_t t;} void f___rvv_uint8m4x2_t () {__rvv_uint8m4x2_t t;} -void f___rvv_int16mf4x2_t () {__rvv_int16mf4x2_t t;} -void f___rvv_uint16mf4x2_t () {__rvv_uint16mf4x2_t t;} -void f___rvv_int16mf4x3_t () {__rvv_int16mf4x3_t t;} -void f___rvv_uint16mf4x3_t () {__rvv_uint16mf4x3_t t;} -void f___rvv_int16mf4x4_t () {__rvv_int16mf4x4_t t;} -void f___rvv_uint16mf4x4_t () {__rvv_uint16mf4x4_t t;} -void f___rvv_int16mf4x5_t () {__rvv_int16mf4x5_t t;} -void f___rvv_uint16mf4x5_t () {__rvv_uint16mf4x5_t t;} -void f___rvv_int16mf4x6_t () {__rvv_int16mf4x6_t t;} -void f___rvv_uint16mf4x6_t () {__rvv_uint16mf4x6_t t;} -void f___rvv_int16mf4x7_t () {__rvv_int16mf4x7_t t;} -void f___rvv_uint16mf4x7_t () {__rvv_uint16mf4x7_t t;} -void f___rvv_int16mf4x8_t () {__rvv_int16mf4x8_t t;} -void f___rvv_uint16mf4x8_t () {__rvv_uint16mf4x8_t t;} +void f___rvv_int16mf4x2_t () {__rvv_int16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x2_t'} } */ +void f___rvv_uint16mf4x2_t () {__rvv_uint16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x2_t'} } */ +void f___rvv_int16mf4x3_t () {__rvv_int16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x3_t'} } */ +void f___rvv_uint16mf4x3_t () {__rvv_uint16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x3_t'} } */ +void f___rvv_int16mf4x4_t () {__rvv_int16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x4_t'} } */ +void f___rvv_uint16mf4x4_t () {__rvv_uint16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x4_t'} } */ +void f___rvv_int16mf4x5_t () {__rvv_int16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x5_t'} } */ +void f___rvv_uint16mf4x5_t () {__rvv_uint16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x5_t'} } */ +void f___rvv_int16mf4x6_t () {__rvv_int16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x6_t'} } */ +void f___rvv_uint16mf4x6_t () {__rvv_uint16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x6_t'} } */ +void f___rvv_int16mf4x7_t () {__rvv_int16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x7_t'} } */ +void f___rvv_uint16mf4x7_t () {__rvv_uint16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x7_t'} } */ +void f___rvv_int16mf4x8_t () {__rvv_int16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x8_t'} } */ +void f___rvv_uint16mf4x8_t () {__rvv_uint16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x8_t'} } */ void f___rvv_int16mf2x2_t () {__rvv_int16mf2x2_t t;} void f___rvv_uint16mf2x2_t () {__rvv_uint16mf2x2_t t;} void f___rvv_int16mf2x3_t () {__rvv_int16mf2x3_t t;} @@ -115,20 +115,20 @@ void f___rvv_int16m2x4_t () {__rvv_int16m2x4_t t;} void f___rvv_uint16m2x4_t () {__rvv_uint16m2x4_t t;} void f___rvv_int16m4x2_t () {__rvv_int16m4x2_t t;} void f___rvv_uint16m4x2_t () {__rvv_uint16m4x2_t t;} -void f___rvv_int32mf2x2_t () {__rvv_int32mf2x2_t t;} -void f___rvv_uint32mf2x2_t () {__rvv_uint32mf2x2_t t;} -void f___rvv_int32mf2x3_t () {__rvv_int32mf2x3_t t;} -void f___rvv_uint32mf2x3_t () {__rvv_uint32mf2x3_t t;} -void f___rvv_int32mf2x4_t () {__rvv_int32mf2x4_t t;} -void f___rvv_uint32mf2x4_t () {__rvv_uint32mf2x4_t t;} -void f___rvv_int32mf2x5_t () {__rvv_int32mf2x5_t t;} -void f___rvv_uint32mf2x5_t () {__rvv_uint32mf2x5_t t;} -void f___rvv_int32mf2x6_t () {__rvv_int32mf2x6_t t;} -void f___rvv_uint32mf2x6_t () {__rvv_uint32mf2x6_t t;} -void f___rvv_int32mf2x7_t () {__rvv_int32mf2x7_t t;} -void f___rvv_uint32mf2x7_t () {__rvv_uint32mf2x7_t t;} -void f___rvv_int32mf2x8_t () {__rvv_int32mf2x8_t t;} -void f___rvv_uint32mf2x8_t () {__rvv_uint32mf2x8_t t;} +void f___rvv_int32mf2x2_t () {__rvv_int32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x2_t'} } */ +void f___rvv_uint32mf2x2_t () {__rvv_uint32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x2_t'} } */ +void f___rvv_int32mf2x3_t () {__rvv_int32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x3_t'} } */ +void f___rvv_uint32mf2x3_t () {__rvv_uint32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x3_t'} } */ +void f___rvv_int32mf2x4_t () {__rvv_int32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x4_t'} } */ +void f___rvv_uint32mf2x4_t () {__rvv_uint32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x4_t'} } */ +void f___rvv_int32mf2x5_t () {__rvv_int32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x5_t'} } */ +void f___rvv_uint32mf2x5_t () {__rvv_uint32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x5_t'} } */ +void f___rvv_int32mf2x6_t () {__rvv_int32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x6_t'} } */ +void f___rvv_uint32mf2x6_t () {__rvv_uint32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x6_t'} } */ +void f___rvv_int32mf2x7_t () {__rvv_int32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x7_t'} } */ +void f___rvv_uint32mf2x7_t () {__rvv_uint32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x7_t'} } */ +void f___rvv_int32mf2x8_t () {__rvv_int32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x8_t'} } */ +void f___rvv_uint32mf2x8_t () {__rvv_uint32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x8_t'} } */ void f___rvv_int32m1x2_t () {__rvv_int32m1x2_t t;} void f___rvv_uint32m1x2_t () {__rvv_uint32m1x2_t t;} void f___rvv_int32m1x3_t () {__rvv_int32m1x3_t t;} @@ -179,13 +179,13 @@ void f___rvv_float16m1_t () {__rvv_float16m1_t t;} /* { dg-error {unknown type n void f___rvv_float16m2_t () {__rvv_float16m2_t t;} /* { dg-error {unknown type name '__rvv_float16m2_t'} } */ void f___rvv_float16m4_t () {__rvv_float16m4_t t;} /* { dg-error {unknown type name '__rvv_float16m4_t'} } */ void f___rvv_float16m8_t () {__rvv_float16m8_t t;} /* { dg-error {unknown type name '__rvv_float16m8_t'} } */ -void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} -void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} -void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} -void f___rvv_float32mf2x5_t () {__rvv_float32mf2x5_t t;} -void f___rvv_float32mf2x6_t () {__rvv_float32mf2x6_t t;} -void f___rvv_float32mf2x7_t () {__rvv_float32mf2x7_t t;} -void f___rvv_float32mf2x8_t () {__rvv_float32mf2x8_t t;} +void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x2_t'} } */ +void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x3_t'} } */ +void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x4_t'} } */ +void f___rvv_float32mf2x5_t () {__rvv_float32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x5_t'} } */ +void f___rvv_float32mf2x6_t () {__rvv_float32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x6_t'} } */ +void f___rvv_float32mf2x7_t () {__rvv_float32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x7_t'} } */ +void f___rvv_float32mf2x8_t () {__rvv_float32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x8_t'} } */ void f___rvv_float32m1x2_t () {__rvv_float32m1x2_t t;} void f___rvv_float32m1x3_t () {__rvv_float32m1x3_t t;} void f___rvv_float32m1x4_t () {__rvv_float32m1x4_t t;} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-18.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-18.c index 402e8f6..95b760f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-18.c @@ -1,20 +1,20 @@ /* { dg-do compile } */ /* { dg-options "-O3 -march=rv32gc_zve32x_zvl64b_zvfhmin -mabi=ilp32d" } */ -void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} -void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} -void f___rvv_int8mf8x3_t () {__rvv_int8mf8x3_t t;} -void f___rvv_uint8mf8x3_t () {__rvv_uint8mf8x3_t t;} -void f___rvv_int8mf8x4_t () {__rvv_int8mf8x4_t t;} -void f___rvv_uint8mf8x4_t () {__rvv_uint8mf8x4_t t;} -void f___rvv_int8mf8x5_t () {__rvv_int8mf8x5_t t;} -void f___rvv_uint8mf8x5_t () {__rvv_uint8mf8x5_t t;} -void f___rvv_int8mf8x6_t () {__rvv_int8mf8x6_t t;} -void f___rvv_uint8mf8x6_t () {__rvv_uint8mf8x6_t t;} -void f___rvv_int8mf8x7_t () {__rvv_int8mf8x7_t t;} -void f___rvv_uint8mf8x7_t () {__rvv_uint8mf8x7_t t;} -void f___rvv_int8mf8x8_t () {__rvv_int8mf8x8_t t;} -void f___rvv_uint8mf8x8_t () {__rvv_uint8mf8x8_t t;} +void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x2_t'} } */ +void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x2_t'} } */ +void f___rvv_int8mf8x3_t () {__rvv_int8mf8x3_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x3_t'} } */ +void f___rvv_uint8mf8x3_t () {__rvv_uint8mf8x3_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x3_t'} } */ +void f___rvv_int8mf8x4_t () {__rvv_int8mf8x4_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x4_t'} } */ +void f___rvv_uint8mf8x4_t () {__rvv_uint8mf8x4_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x4_t'} } */ +void f___rvv_int8mf8x5_t () {__rvv_int8mf8x5_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x5_t'} } */ +void f___rvv_uint8mf8x5_t () {__rvv_uint8mf8x5_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x5_t'} } */ +void f___rvv_int8mf8x6_t () {__rvv_int8mf8x6_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x6_t'} } */ +void f___rvv_uint8mf8x6_t () {__rvv_uint8mf8x6_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x6_t'} } */ +void f___rvv_int8mf8x7_t () {__rvv_int8mf8x7_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x7_t'} } */ +void f___rvv_uint8mf8x7_t () {__rvv_uint8mf8x7_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x7_t'} } */ +void f___rvv_int8mf8x8_t () {__rvv_int8mf8x8_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x8_t'} } */ +void f___rvv_uint8mf8x8_t () {__rvv_uint8mf8x8_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x8_t'} } */ void f___rvv_int8mf4x2_t () {__rvv_int8mf4x2_t t;} void f___rvv_uint8mf4x2_t () {__rvv_uint8mf4x2_t t;} void f___rvv_int8mf4x3_t () {__rvv_int8mf4x3_t t;} @@ -65,20 +65,20 @@ void f___rvv_int8m2x4_t () {__rvv_int8m2x4_t t;} void f___rvv_uint8m2x4_t () {__rvv_uint8m2x4_t t;} void f___rvv_int8m4x2_t () {__rvv_int8m4x2_t t;} void f___rvv_uint8m4x2_t () {__rvv_uint8m4x2_t t;} -void f___rvv_int16mf4x2_t () {__rvv_int16mf4x2_t t;} -void f___rvv_uint16mf4x2_t () {__rvv_uint16mf4x2_t t;} -void f___rvv_int16mf4x3_t () {__rvv_int16mf4x3_t t;} -void f___rvv_uint16mf4x3_t () {__rvv_uint16mf4x3_t t;} -void f___rvv_int16mf4x4_t () {__rvv_int16mf4x4_t t;} -void f___rvv_uint16mf4x4_t () {__rvv_uint16mf4x4_t t;} -void f___rvv_int16mf4x5_t () {__rvv_int16mf4x5_t t;} -void f___rvv_uint16mf4x5_t () {__rvv_uint16mf4x5_t t;} -void f___rvv_int16mf4x6_t () {__rvv_int16mf4x6_t t;} -void f___rvv_uint16mf4x6_t () {__rvv_uint16mf4x6_t t;} -void f___rvv_int16mf4x7_t () {__rvv_int16mf4x7_t t;} -void f___rvv_uint16mf4x7_t () {__rvv_uint16mf4x7_t t;} -void f___rvv_int16mf4x8_t () {__rvv_int16mf4x8_t t;} -void f___rvv_uint16mf4x8_t () {__rvv_uint16mf4x8_t t;} +void f___rvv_int16mf4x2_t () {__rvv_int16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x2_t'} } */ +void f___rvv_uint16mf4x2_t () {__rvv_uint16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x2_t'} } */ +void f___rvv_int16mf4x3_t () {__rvv_int16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x3_t'} } */ +void f___rvv_uint16mf4x3_t () {__rvv_uint16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x3_t'} } */ +void f___rvv_int16mf4x4_t () {__rvv_int16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x4_t'} } */ +void f___rvv_uint16mf4x4_t () {__rvv_uint16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x4_t'} } */ +void f___rvv_int16mf4x5_t () {__rvv_int16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x5_t'} } */ +void f___rvv_uint16mf4x5_t () {__rvv_uint16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x5_t'} } */ +void f___rvv_int16mf4x6_t () {__rvv_int16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x6_t'} } */ +void f___rvv_uint16mf4x6_t () {__rvv_uint16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x6_t'} } */ +void f___rvv_int16mf4x7_t () {__rvv_int16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x7_t'} } */ +void f___rvv_uint16mf4x7_t () {__rvv_uint16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x7_t'} } */ +void f___rvv_int16mf4x8_t () {__rvv_int16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x8_t'} } */ +void f___rvv_uint16mf4x8_t () {__rvv_uint16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x8_t'} } */ void f___rvv_int16mf2x2_t () {__rvv_int16mf2x2_t t;} void f___rvv_uint16mf2x2_t () {__rvv_uint16mf2x2_t t;} void f___rvv_int16mf2x3_t () {__rvv_int16mf2x3_t t;} @@ -115,20 +115,20 @@ void f___rvv_int16m2x4_t () {__rvv_int16m2x4_t t;} void f___rvv_uint16m2x4_t () {__rvv_uint16m2x4_t t;} void f___rvv_int16m4x2_t () {__rvv_int16m4x2_t t;} void f___rvv_uint16m4x2_t () {__rvv_uint16m4x2_t t;} -void f___rvv_int32mf2x2_t () {__rvv_int32mf2x2_t t;} -void f___rvv_uint32mf2x2_t () {__rvv_uint32mf2x2_t t;} -void f___rvv_int32mf2x3_t () {__rvv_int32mf2x3_t t;} -void f___rvv_uint32mf2x3_t () {__rvv_uint32mf2x3_t t;} -void f___rvv_int32mf2x4_t () {__rvv_int32mf2x4_t t;} -void f___rvv_uint32mf2x4_t () {__rvv_uint32mf2x4_t t;} -void f___rvv_int32mf2x5_t () {__rvv_int32mf2x5_t t;} -void f___rvv_uint32mf2x5_t () {__rvv_uint32mf2x5_t t;} -void f___rvv_int32mf2x6_t () {__rvv_int32mf2x6_t t;} -void f___rvv_uint32mf2x6_t () {__rvv_uint32mf2x6_t t;} -void f___rvv_int32mf2x7_t () {__rvv_int32mf2x7_t t;} -void f___rvv_uint32mf2x7_t () {__rvv_uint32mf2x7_t t;} -void f___rvv_int32mf2x8_t () {__rvv_int32mf2x8_t t;} -void f___rvv_uint32mf2x8_t () {__rvv_uint32mf2x8_t t;} +void f___rvv_int32mf2x2_t () {__rvv_int32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x2_t'} } */ +void f___rvv_uint32mf2x2_t () {__rvv_uint32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x2_t'} } */ +void f___rvv_int32mf2x3_t () {__rvv_int32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x3_t'} } */ +void f___rvv_uint32mf2x3_t () {__rvv_uint32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x3_t'} } */ +void f___rvv_int32mf2x4_t () {__rvv_int32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x4_t'} } */ +void f___rvv_uint32mf2x4_t () {__rvv_uint32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x4_t'} } */ +void f___rvv_int32mf2x5_t () {__rvv_int32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x5_t'} } */ +void f___rvv_uint32mf2x5_t () {__rvv_uint32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x5_t'} } */ +void f___rvv_int32mf2x6_t () {__rvv_int32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x6_t'} } */ +void f___rvv_uint32mf2x6_t () {__rvv_uint32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x6_t'} } */ +void f___rvv_int32mf2x7_t () {__rvv_int32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x7_t'} } */ +void f___rvv_uint32mf2x7_t () {__rvv_uint32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x7_t'} } */ +void f___rvv_int32mf2x8_t () {__rvv_int32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x8_t'} } */ +void f___rvv_uint32mf2x8_t () {__rvv_uint32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x8_t'} } */ void f___rvv_int32m1x2_t () {__rvv_int32m1x2_t t;} void f___rvv_uint32m1x2_t () {__rvv_uint32m1x2_t t;} void f___rvv_int32m1x3_t () {__rvv_int32m1x3_t t;} @@ -173,13 +173,13 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type n void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */ void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */ void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */ -void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} -void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} -void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} -void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} -void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} -void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} -void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} +void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x2_t'} } */ +void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x3_t'} } */ +void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x4_t'} } */ +void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x5_t'} } */ +void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x6_t'} } */ +void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x7_t'} } */ +void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x8_t'} } */ void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} @@ -198,13 +198,13 @@ void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} -void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} -void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} -void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} -void f___rvv_float32mf2x5_t () {__rvv_float32mf2x5_t t;} -void f___rvv_float32mf2x6_t () {__rvv_float32mf2x6_t t;} -void f___rvv_float32mf2x7_t () {__rvv_float32mf2x7_t t;} -void f___rvv_float32mf2x8_t () {__rvv_float32mf2x8_t t;} +void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x2_t'} } */ +void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x3_t'} } */ +void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x4_t'} } */ +void f___rvv_float32mf2x5_t () {__rvv_float32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x5_t'} } */ +void f___rvv_float32mf2x6_t () {__rvv_float32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x6_t'} } */ +void f___rvv_float32mf2x7_t () {__rvv_float32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x7_t'} } */ +void f___rvv_float32mf2x8_t () {__rvv_float32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x8_t'} } */ void f___rvv_float32m1x2_t () {__rvv_float32m1x2_t t;} void f___rvv_float32m1x3_t () {__rvv_float32m1x3_t t;} void f___rvv_float32m1x4_t () {__rvv_float32m1x4_t t;} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c index 39c8c00..d21b810 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c @@ -51,7 +51,7 @@ foo1 (vint8m1_t a) ** vs1r\.v\tv30,0\(sp\) ** sub\tsp,sp,t0 ** vs1r\.v\tv31,0\(sp\) -** call\tbar2 +** call\tbar2(?:@plt)? ** csrr\tt0,vlenb ** vl1re64\.v\tv31,0\(sp\) ** add\tsp,sp,t0 @@ -96,8 +96,8 @@ foo2 (vint8m1_t a) ** foo3: ** call\tt0,__riscv_save_0 ** vl1re8\.v\tv8,0\(a0\) -** call\tbar1 -** call\tbar2 +** call\tbar1(?:@plt)? +** call\tbar2(?:@plt)? ** tail\t__riscv_restore_0 */ void diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c index 5f8f96f..70a32d7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c @@ -10,7 +10,7 @@ void bar2 (); /* ** foo1: ** cm.push\t{ra},\s*-16 -** call\tbar1 +** call\tbar1(?:@plt)? ** cm.popret\t{ra},\s*16 */ void @@ -53,7 +53,7 @@ foo1 (vint8m1_t a) ** vs1r\.v\tv30,0\(sp\) ** sub\tsp,sp,t0 ** vs1r\.v\tv31,0\(sp\) -** call\tbar2 +** call\tbar2(?:@plt)? ** csrr\tt0,vlenb ** vl1re64\.v\tv31,0\(sp\) ** add\tsp,sp,t0 @@ -97,7 +97,7 @@ foo2 (vint8m1_t a) ** foo3: ** cm.push\t{ra},\s*-16 ** vl1re8\.v\tv8,0\(a0\) -** call\tbar1 +** call\tbar1(?:@plt)? ** cm.popret\t{ra},\s*16 */ void diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c index a9f3855..3f2cb2f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-callee-saved-2.c @@ -11,7 +11,7 @@ void bar2 (); ** foo1: ** addi\tsp,sp,-16 ** sd\tra,8\(sp\) -** call\tbar1 +** call\tbar1(?:@plt)? ** ld\tra,8\(sp\) ** addi\tsp,sp,16 ** jr\tra @@ -57,7 +57,7 @@ foo1 (vint8m1_t a) ** vs1r\.v\tv30,0\(sp\) ** sub\tsp,sp,t0 ** vs1r\.v\tv31,0\(sp\) -** call\tbar2 +** call\tbar2(?:@plt)? ** csrr\tt0,vlenb ** vl1re64\.v\tv31,0\(sp\) ** add\tsp,sp,t0 @@ -105,7 +105,7 @@ foo2 (vint8m1_t a) ** addi\tsp,sp,-16 ** sd\tra,8\(sp\) ** vl1re8\.v\tv8,0\(a0\) -** call\tbar1 +** call\tbar1(?:@plt)? ** ld\tra,8\(sp\) ** addi\tsp,sp,16 ** jr\tra diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-1.c index 9edd6cb..3534720 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-1.c @@ -21,7 +21,7 @@ f1 (void *a, void *b) /* Tiny __builtin_memcmp should use libc. ** f2: ** li\s+a\d,\d+ -** tail\s+memcmp +** tail\s+memcmp(?:@plt)? */ int f2 (void *a, void *b) @@ -79,7 +79,7 @@ f5 (void *a, void *b) /* Don't inline if the length is too large for one operation. ** f6: ** li\s+a2,\d+ -** tail\s+memcmp +** tail\s+memcmp(?:@plt)? */ int f6 (void *a, void *b) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-3.c index 82aa307..c1c1aae 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-3.c @@ -8,7 +8,7 @@ /* Tiny __builtin_memcmp should use libc. ** f1: ** li\s+a\d,\d+ -** tail\s+memcmp +** tail\s+memcmp(?:@plt)? */ int f1 (void *a, void *b) @@ -36,7 +36,7 @@ f2 (void *a, void *b) /* Don't inline if the length is too large for one operation. ** f3: ** li\s+a2,\d+ -** tail\s+memcmp +** tail\s+memcmp(?:@plt)? */ int f3 (void *a, void *b) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-4.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-4.c index e2dd6a1..ad87038 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cmpmem-4.c @@ -8,7 +8,7 @@ /* Tiny __builtin_memcmp should use libc. ** f1: ** li\s+a\d,\d+ -** tail\s+memcmp +** tail\s+memcmp(?:@plt)? */ int f1 (void *a, void *b) @@ -53,7 +53,7 @@ f3 (void *a, void *b) /* Don't inline if the length is too large for one operation. ** f4: ** li\s+a2,\d+ -** tail\s+memcmp +** tail\s+memcmp(?:@plt)? */ int f4 (void *a, void *b) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-1.c index 654c800..5e35204 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/cpymem-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! riscv_abi_e } } } */ -/* { dg-additional-options "-O1 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-additional-options "-O1 -fno-schedule-insns -fno-schedule-insns2 -fno-pie" } */ /* { dg-add-options riscv_v } */ /* { dg-final { check-function-bodies "**" "" } } */ @@ -109,4 +109,4 @@ void f3 () memcpy (&a_a, &a_b, sizeof a_a); } -/* { dg-final { scan-assembler-not {\m(tail|call)\s+memcpy\M} } } */ +/* { dg-final { scan-assembler-not {\m(tail|call)\s+memcpy(?:@plt)?\M} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/movmem-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/movmem-1.c index 03e633b..44bf3d7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/movmem-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/movmem-1.c @@ -52,7 +52,7 @@ f3 (char *a, char const *b) /* Don't vectorise if the move is too large for one operation ** f4: ** li\s+a2,\d+ -** tail\s+memmove +** tail\s+memmove(?:@plt)? */ char * f4 (char *a, char const *b) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr114352-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr114352-3.c index 9bfa39c..4f375e5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr114352-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr114352-3.c @@ -93,9 +93,9 @@ test_5 (_Float16 *a, _Float16 *b, _Float16 *out, unsigned count) /* ** test_6: ** ... -** call\s+__extendhfsf2 +** call\s+__extendhfsf2(?:@plt)? ** ... -** call\s+__truncsfhf2 +** call\s+__truncsfhf2(?:@plt)? ** ... */ void diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-1.c index a22d366..490445f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-1.c @@ -94,7 +94,7 @@ f6 (void *a, int const b) /* Don't vectorise if the move is too large for one operation. ** f7: ** li\s+a2,\d+ -** tail\s+memset +** tail\s+memset(?:@plt)? */ void * f7 (void *a, int const b) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-2.c index a108868..876929e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-2.c @@ -44,7 +44,7 @@ f2 (void *a, int const b) /* Don't vectorise if the move is too large for requested lmul. ** f3: ** li\s+a2,\d+ -** tail\s+memset +** tail\s+memset(?:@plt)? */ void * f3 (void *a, int const b) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c index 460a8f2..a185916 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/setmem-3.c @@ -62,7 +62,7 @@ f3 (void *a, int const b) /* Don't vectorise if the move is too large for requested lmul. ** f4: ** li\s+a2,\d+ -** tail\s+memset +** tail\s+memset(?:@plt)? */ void * f4 (void *a, int const b) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/spill-9.c b/gcc/testsuite/gcc.target/riscv/rvv/base/spill-9.c index 7e5758b..375d316 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/spill-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/spill-9.c @@ -18,7 +18,7 @@ void f (char*); ** ... ** addi\ta0,sp,15 ** andi\ta0,a0,-16 -** call\tf +** call\tf(?:@plt)? ** ... ** lw\tra,12\(sp\) ** lw\ts0,8\(sp\) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl_zve32-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl_zve32-1.c new file mode 100644 index 0000000..f6899c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl_zve32-1.c @@ -0,0 +1,73 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32imafc_zve32f_zvl128b -mabi=ilp32 -O2" } */ + +struct S0 +{ + unsigned a : 15; + int b; + int c; +}; + +struct S1 +{ + struct S0 s0; + int e; +}; + +struct Z +{ + char c; + int z; +} __attribute__((packed)); + +union U +{ + struct S1 s1; + struct Z z; +}; + +int __attribute__((noinline, noclone)) +return_zero (void) +{ + return 0; +} + +volatile union U gu; +struct S0 gs; + +int __attribute__((noinline, noclone)) +check_outcome () +{ + if (gs.a != 6 + || gs.b != 80000) + __builtin_abort (); +} + +int +main (int argc, char *argv[]) +{ + union U u; + struct S1 m; + struct S0 l; + + if (return_zero ()) + u.z.z = 20000; + else + { + u.s1.s0.a = 6; + u.s1.s0.b = 80000; + u.s1.e = 2; + + m = u.s1; + m.s0.c = 0; + l = m.s0; + gs = l; + } + + gu = u; + check_outcome (); + return 0; +} + +/* { dg-final { scan-assembler {vsetivli\s+zero,\s*2,\s*e32,\s*m1,\s*t[au],\s*m[au]} } } */ +/* { dg-final { scan-assembler {vsetivli\s+zero,\s*4,\s*e32,\s*m1,\s*t[au],\s*m[au]} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl_zve32-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl_zve32-2.c new file mode 100644 index 0000000..dd81f8b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl_zve32-2.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64g_zve32x_zvl128b -mabi=lp64d -O3" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +typedef unsigned int V2SI __attribute__((vector_size(8))); + +V2SI v1, v2; + +/* Make sure we won't use mf2 mode even vector register is OK to hold for + ELEN=32. */ +void foo1() +{ +/* +** foo1: +** ... +** vsetivli zero,2,e32,m1,ta,ma +** ... +** vle32\.v v[0-9]+,0\([a-x][0-9]+\) +** ... +** vse32\.v v[0-9]+,0\([a-x][0-9]+\) +** ... +** ret +*/ + v1 = v2; +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c index 6e027a5..84d3c4c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { ! riscv_abi_e } } } */ +/* { dg-do compile { target { { ! riscv_abi_e } && rv64 } } } */ /* { dg-add-options riscv_v } */ /* { dg-additional-options "-std=gnu99 -O3 -fno-schedule-insns -fno-schedule-insns2" } */ diff --git a/gcc/testsuite/gcc.target/riscv/zba-shNadd-09.c b/gcc/testsuite/gcc.target/riscv/zba-shNadd-09.c new file mode 100644 index 0000000..303f3cb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zba-shNadd-09.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zba -mabi=lp64" } */ +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ + +long long sub (unsigned long long a, unsigned long long b) +{ + b = (b << 50) >> 49; + unsigned int x = a + b; + return x; +} + +/* { dg-final { scan-assembler-not {\msh1add} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zba-shNadd-10.c b/gcc/testsuite/gcc.target/riscv/zba-shNadd-10.c new file mode 100644 index 0000000..883cce2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zba-shNadd-10.c @@ -0,0 +1,21 @@ +/* { dg-do run { target { rv64 } } } */ +/* { dg-options "-march=rv64gc_zba -mabi=lp64d -O2" } */ + +struct { + unsigned a : 14; + unsigned b : 3; +} c; + +unsigned long long d; +void e (unsigned long long *f, long p2) { *f = p2; } +signed g; +long i; + +int main () { + c.b = 4; + i = -(-c.a - (3023282U + c.a + g)); + e (&d, i); + if (d != 3023282) + __builtin_abort (); + __builtin_exit (0); +} diff --git a/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c b/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c index f7d8f44..be304e7 100644 --- a/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c +++ b/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c @@ -10,7 +10,7 @@ bar (); **fool_rv32e: ** cm.push {ra}, -32 ** ... -** call bar +** call bar(?:@plt)? ** ... ** lw a[0-5],32\(sp\) ** ... |