diff options
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/amxtf32intrin.h | 47 | ||||
| -rw-r--r-- | gcc/config/i386/cpuid.h | 1 | ||||
| -rw-r--r-- | gcc/config/i386/i386-c.cc | 2 | ||||
| -rw-r--r-- | gcc/config/i386/i386-isa.def | 1 | ||||
| -rw-r--r-- | gcc/config/i386/i386-options.cc | 4 | ||||
| -rw-r--r-- | gcc/config/i386/i386.opt | 4 | ||||
| -rw-r--r-- | gcc/config/i386/i386.opt.urls | 3 | ||||
| -rw-r--r-- | gcc/config/i386/immintrin.h | 2 |
8 files changed, 63 insertions, 1 deletions
diff --git a/gcc/config/i386/amxtf32intrin.h b/gcc/config/i386/amxtf32intrin.h new file mode 100644 index 0000000..450a33e --- /dev/null +++ b/gcc/config/i386/amxtf32intrin.h @@ -0,0 +1,47 @@ +/* Copyright (C) 2024 Free Software Foundation, Inc. + This file is part of GCC. + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#if !defined _IMMINTRIN_H_INCLUDED +#error "Never use <amxtf32intrin.h> directly; include <immintrin.h> instead." +#endif + +#ifndef _AMXTF32INTRIN_H_INCLUDED +#define _AMXTF32INTRIN_H_INCLUDED + +#if !defined(__AMX_TF32__) +#pragma GCC push_options +#pragma GCC target("amx-tf32") +#define __DISABLE_AMX_TF32__ +#endif /* __AMX_TF32__ */ + +#if defined(__x86_64__) +#define _tile_mmultf32ps_internal(src1_dst,src2,src3) \ + __asm__ volatile\ + ("{tmmultf32ps\t%%tmm"#src3", %%tmm"#src2", %%tmm"#src1_dst"|tmmultf32ps\t%%tmm"#src1_dst", %%tmm"#src2", %%tmm"#src3"}" ::) + +#define _tile_mmultf32ps(src1_dst,src2,src3) \ + _tile_mmultf32ps_internal (src1_dst, src2, src3) + +#endif + +#ifdef __DISABLE_AMX_TF32__ +#undef __DISABLE_AMX_TF32__ +#pragma GCC pop_options +#endif /* __DISABLE_AMX_TF32__ */ + +#endif /* _AMXTF32INTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index 2fc163b..7cd8319 100644 --- a/gcc/config/i386/cpuid.h +++ b/gcc/config/i386/cpuid.h @@ -164,6 +164,7 @@ /* AMX sub leaf (%eax == 0x1e, %ecx == 1) */ /* %eax */ +#define bit_AMX_TF32 (1 << 6) #define bit_AMX_AVX512 (1 << 7) /* AVX10 sub leaf (%eax == 0x24) */ diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc index 1c36beb..98cb676 100644 --- a/gcc/config/i386/i386-c.cc +++ b/gcc/config/i386/i386-c.cc @@ -743,6 +743,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__AVX10_2_512__"); if (isa_flag2 & OPTION_MASK_ISA2_AMX_AVX512) def_or_undef (parse_in, "__AMX_AVX512__"); + if (isa_flag2 & OPTION_MASK_ISA2_AMX_TF32) + def_or_undef (parse_in, "__AMX_TF32__"); if (TARGET_IAMCU) { def_or_undef (parse_in, "__iamcu"); diff --git a/gcc/config/i386/i386-isa.def b/gcc/config/i386/i386-isa.def index fcc3bc4..1b82a69 100644 --- a/gcc/config/i386/i386-isa.def +++ b/gcc/config/i386/i386-isa.def @@ -124,3 +124,4 @@ DEF_PTA(AVX10_1_512) DEF_PTA(AVX10_2_256) DEF_PTA(AVX10_2_512) DEF_PTA(AMX_AVX512) +DEF_PTA(AMX_TF32) diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc index 2f6646f..6f68e79 100644 --- a/gcc/config/i386/i386-options.cc +++ b/gcc/config/i386/i386-options.cc @@ -264,7 +264,8 @@ static struct ix86_target_opts isa2_opts[] = { "-mavx10.1-512", OPTION_MASK_ISA2_AVX10_1_512 }, { "-mavx10.2-256", OPTION_MASK_ISA2_AVX10_2_256 }, { "-mavx10.2-512", OPTION_MASK_ISA2_AVX10_2_512 }, - { "-mamx-avx512", OPTION_MASK_ISA2_AMX_AVX512 } + { "-mamx-avx512", OPTION_MASK_ISA2_AMX_AVX512 }, + { "-mamx-tf32", OPTION_MASK_ISA2_AMX_TF32 } }; static struct ix86_target_opts isa_opts[] = { @@ -1134,6 +1135,7 @@ ix86_valid_target_attribute_inner_p (tree fndecl, tree args, char *p_strings[], IX86_ATTR_ISA ("avx10.2-256", OPT_mavx10_2_256), IX86_ATTR_ISA ("avx10.2-512", OPT_mavx10_2_512), IX86_ATTR_ISA ("amx-avx512", OPT_mamx_avx512), + IX86_ATTR_ISA ("amx-tf32", OPT_mamx_tf32), /* enum options */ IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_), diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index 232daff..280ad77 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -1394,3 +1394,7 @@ mamx-avx512 Target Mask(ISA2_AMX_AVX512) Var(ix86_isa_flags2) Save Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX10.1-512, AVX10.2-512 and AMX-AVX512 built-in functions and code generation. + +mamx-tf32 +Target Mask(ISA2_AMX_TF32) Var(ix86_isa_flags2) Save +Support AMX-TF32 built-in functions and code generation. diff --git a/gcc/config/i386/i386.opt.urls b/gcc/config/i386/i386.opt.urls index 9f590f6..9921cda 100644 --- a/gcc/config/i386/i386.opt.urls +++ b/gcc/config/i386/i386.opt.urls @@ -616,3 +616,6 @@ UrlSuffix(gcc/x86-Options.html#index-mavx10_002e2) mamx-avx512 UrlSuffix(gcc/x86-Options.html#index-mamx-avx512) +mamx-tf32 +UrlSuffix(gcc/x86-Options.html#index-mamx-tf32) + diff --git a/gcc/config/i386/immintrin.h b/gcc/config/i386/immintrin.h index 772af56..84b8f60 100644 --- a/gcc/config/i386/immintrin.h +++ b/gcc/config/i386/immintrin.h @@ -134,6 +134,8 @@ #include <amxavx512intrin.h> +#include <amxtf32intrin.h> + #include <prfchwintrin.h> #include <keylockerintrin.h> |