diff options
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index f8cdb06..389f2f9 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -4125,6 +4125,35 @@ [(set_attr "type" "shift_reg")] ) +(define_insn_and_split "*aarch64_reg_<optab>_minus<mode>3" + [(set (match_operand:GPI 0 "register_operand" "=&r") + (ASHIFT:GPI + (match_operand:GPI 1 "register_operand" "r") + (minus:QI (match_operand 2 "const_int_operand" "n") + (match_operand:QI 3 "register_operand" "r"))))] + "INTVAL (operands[2]) == GET_MODE_BITSIZE (<MODE>mode)" + "#" + "&& true" + [(const_int 0)] + { + rtx subreg_tmp = gen_lowpart (SImode, operands[3]); + + rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode) + : gen_lowpart (SImode, operands[0])); + + emit_insn (gen_negsi2 (tmp, subreg_tmp)); + + rtx and_op = gen_rtx_AND (SImode, tmp, + GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - 1)); + + rtx subreg_tmp2 = gen_lowpart_SUBREG (QImode, and_op); + + emit_insn (gen_<optab><mode>3 (operands[0], operands[1], subreg_tmp2)); + DONE; + } + [(set_attr "length" "8")] +) + ;; Logical left shift using SISD or Integer instruction (define_insn "*aarch64_ashl_sisd_or_int_<mode>3" [(set (match_operand:GPI 0 "register_operand" "=r,r,w,w") |