diff options
Diffstat (limited to 'gcc/config/arm')
| -rw-r--r-- | gcc/config/arm/aout.h | 12 | ||||
| -rw-r--r-- | gcc/config/arm/arm-mve-builtins.h | 2 | ||||
| -rw-r--r-- | gcc/config/arm/arm.cc | 68 | ||||
| -rw-r--r-- | gcc/config/arm/arm.h | 8 | ||||
| -rw-r--r-- | gcc/config/arm/bpabi.h | 2 | ||||
| -rw-r--r-- | gcc/config/arm/elf.h | 4 | ||||
| -rw-r--r-- | gcc/config/arm/linux-eabi.h | 2 | ||||
| -rw-r--r-- | gcc/config/arm/symbian.h | 6 | ||||
| -rw-r--r-- | gcc/config/arm/unknown-elf.h | 2 | ||||
| -rw-r--r-- | gcc/config/arm/vxworks.h | 4 |
10 files changed, 55 insertions, 55 deletions
diff --git a/gcc/config/arm/aout.h b/gcc/config/arm/aout.h index db9e8dd..0c32c1e 100644 --- a/gcc/config/arm/aout.h +++ b/gcc/config/arm/aout.h @@ -1,7 +1,7 @@ /* Definitions of target machine for GNU compiler, for ARM with a.out Copyright (C) 1995-2024 Free Software Foundation, Inc. Contributed by Richard Earnshaw (rearnsha@armltd.co.uk). - + This file is part of GCC. GCC is free software; you can redistribute it and/or modify it @@ -165,7 +165,7 @@ #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM)) #endif - + /* Output an element of a dispatch table. */ #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ do \ @@ -174,7 +174,7 @@ asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \ } \ while (0) - + /* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions can be used. For non-pic code where the offsets do not suitable for @@ -266,7 +266,7 @@ fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES)) /* Align output to a power of two. Horrible /bin/as. */ -#ifndef ASM_OUTPUT_ALIGN +#ifndef ASM_OUTPUT_ALIGN #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ do \ { \ @@ -292,7 +292,7 @@ } \ while (0) #endif - + /* Output a local common block. /bin/as can't do this, so hack a `.space' into the bss segment. Note that this is *bad* practice, which is guaranteed NOT to work since it doesn't define STATIC @@ -308,7 +308,7 @@ } \ while (0) #endif - + /* Output a zero-initialized block. */ #ifndef ASM_OUTPUT_ALIGNED_BSS #define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \ diff --git a/gcc/config/arm/arm-mve-builtins.h b/gcc/config/arm/arm-mve-builtins.h index fe7adf0..2e48d91 100644 --- a/gcc/config/arm/arm-mve-builtins.h +++ b/gcc/config/arm/arm-mve-builtins.h @@ -401,7 +401,7 @@ public: bool require_integer_immediate (unsigned int); bool require_derived_scalar_type (unsigned int, type_class_index, unsigned int = SAME_SIZE); - + bool check_num_arguments (unsigned int); bool check_gp_argument (unsigned int, unsigned int &, unsigned int &); tree resolve_unary (type_class_index = SAME_TYPE_CLASS, diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index 0d32b70..8ccdf1a 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -15367,9 +15367,9 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase, HOST_WIDE_INT srcoffset, dstoffset; HOST_WIDE_INT src_autoinc, dst_autoinc; rtx mem, addr; - + gcc_assert (interleave_factor >= 1 && interleave_factor <= 4); - + /* Use hard registers if we have aligned source or destination so we can use load/store multiple with contiguous registers. */ if (dst_aligned || src_aligned) @@ -15383,7 +15383,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase, src = copy_addr_to_reg (XEXP (srcbase, 0)); srcoffset = dstoffset = 0; - + /* Calls to arm_gen_load_multiple and arm_gen_store_multiple update SRC/DST. For copying the last bytes we want to subtract this offset again. */ src_autoinc = dst_autoinc = 0; @@ -15437,14 +15437,14 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase, remaining -= block_size_bytes; } - + /* Copy any whole words left (note these aren't interleaved with any subsequent halfword/byte load/stores in the interests of simplicity). */ - + words = remaining / UNITS_PER_WORD; gcc_assert (words < interleave_factor); - + if (src_aligned && words > 1) { emit_insn (arm_gen_load_multiple (regnos, words, src, TRUE, srcbase, @@ -15490,11 +15490,11 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase, } remaining -= words * UNITS_PER_WORD; - + gcc_assert (remaining < 4); - + /* Copy a halfword if necessary. */ - + if (remaining >= 2) { halfword_tmp = gen_reg_rtx (SImode); @@ -15518,11 +15518,11 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase, remaining -= 2; srcoffset += 2; } - + gcc_assert (remaining < 2); - + /* Copy last byte. */ - + if ((remaining & 1) != 0) { byte_tmp = gen_reg_rtx (SImode); @@ -15543,9 +15543,9 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase, remaining--; srcoffset++; } - + /* Store last halfword if we haven't done so already. */ - + if (halfword_tmp) { addr = plus_constant (Pmode, dst, dstoffset - dst_autoinc); @@ -15564,7 +15564,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase, emit_move_insn (mem, gen_lowpart (QImode, byte_tmp)); dstoffset++; } - + gcc_assert (remaining == 0 && srcoffset == dstoffset); } @@ -15583,7 +15583,7 @@ arm_adjust_block_mem (rtx mem, HOST_WIDE_INT length, rtx *loop_reg, rtx *loop_mem) { *loop_reg = copy_addr_to_reg (XEXP (mem, 0)); - + /* Although the new mem does not refer to a known location, it does keep up to LENGTH bytes of alignment. */ *loop_mem = change_address (mem, BLKmode, *loop_reg); @@ -15603,14 +15603,14 @@ arm_block_move_unaligned_loop (rtx dest, rtx src, HOST_WIDE_INT length, { rtx src_reg, dest_reg, final_src, test; HOST_WIDE_INT leftover; - + leftover = length % bytes_per_iter; length -= leftover; - + /* Create registers and memory references for use within the loop. */ arm_adjust_block_mem (src, bytes_per_iter, &src_reg, &src); arm_adjust_block_mem (dest, bytes_per_iter, &dest_reg, &dest); - + /* Calculate the value that SRC_REG should have after the last iteration of the loop. */ final_src = expand_simple_binop (Pmode, PLUS, src_reg, GEN_INT (length), @@ -15619,7 +15619,7 @@ arm_block_move_unaligned_loop (rtx dest, rtx src, HOST_WIDE_INT length, /* Emit the start of the loop. */ rtx_code_label *label = gen_label_rtx (); emit_label (label); - + /* Emit the loop body. */ arm_block_move_unaligned_straight (dest, src, bytes_per_iter, interleave_factor); @@ -15627,11 +15627,11 @@ arm_block_move_unaligned_loop (rtx dest, rtx src, HOST_WIDE_INT length, /* Move on to the next block. */ emit_move_insn (src_reg, plus_constant (Pmode, src_reg, bytes_per_iter)); emit_move_insn (dest_reg, plus_constant (Pmode, dest_reg, bytes_per_iter)); - + /* Emit the loop condition. */ test = gen_rtx_NE (VOIDmode, src_reg, final_src); emit_jump_insn (gen_cbranchsi4 (test, src_reg, final_src, label)); - + /* Mop up any left-over bytes. */ if (leftover) arm_block_move_unaligned_straight (dest, src, leftover, interleave_factor); @@ -15645,7 +15645,7 @@ static int arm_cpymemqi_unaligned (rtx *operands) { HOST_WIDE_INT length = INTVAL (operands[2]); - + if (optimize_size) { bool src_aligned = MEM_ALIGN (operands[1]) >= BITS_PER_WORD; @@ -15656,7 +15656,7 @@ arm_cpymemqi_unaligned (rtx *operands) resulting code can be smaller. */ unsigned int interleave_factor = (src_aligned || dst_aligned) ? 2 : 1; HOST_WIDE_INT bytes_per_iter = (src_aligned || dst_aligned) ? 8 : 4; - + if (length > 12) arm_block_move_unaligned_loop (operands[0], operands[1], length, interleave_factor, bytes_per_iter); @@ -15674,7 +15674,7 @@ arm_cpymemqi_unaligned (rtx *operands) else arm_block_move_unaligned_straight (operands[0], operands[1], length, 4); } - + return 1; } @@ -31165,10 +31165,10 @@ int vfp3_const_double_for_fract_bits (rtx operand) { REAL_VALUE_TYPE r0; - + if (!CONST_DOUBLE_P (operand)) return 0; - + r0 = *CONST_DOUBLE_REAL_VALUE (operand); if (exact_real_inverse (DFmode, &r0) && !REAL_VALUE_NEGATIVE (r0)) @@ -32430,7 +32430,7 @@ arm_autoinc_modes_ok_p (machine_mode mode, enum arm_auto_incmodes code) else return false; } - + return true; case ARM_POST_DEC: @@ -32447,10 +32447,10 @@ arm_autoinc_modes_ok_p (machine_mode mode, enum arm_auto_incmodes code) return false; return true; - + default: return false; - + } return false; @@ -32461,7 +32461,7 @@ arm_autoinc_modes_ok_p (machine_mode mode, enum arm_auto_incmodes code) Additionally, the default expansion code is not available or suitable for post-reload insn splits (this can occur when the register allocator chooses not to do a shift in NEON). - + This function is used in both initial expand and post-reload splits, and handles all kinds of 64-bit shifts. @@ -33531,7 +33531,7 @@ arm_asan_shadow_offset (void) /* This is a temporary fix for PR60655. Ideally we need to handle most of these cases in the generic part but - currently we reject minus (..) (sym_ref). We try to + currently we reject minus (..) (sym_ref). We try to ameliorate the case with minus (sym_ref1) (sym_ref2) where they are in the same section. */ @@ -33854,7 +33854,7 @@ arm_valid_target_attribute_tree (tree args, struct gcc_options *opts, return build_target_option_node (opts, opts_set); } -static void +static void add_attribute (const char * mode, tree *attributes) { size_t len = strlen (mode); @@ -33885,7 +33885,7 @@ arm_insert_attributes (tree fndecl, tree * attributes) /* Nested definitions must inherit mode. */ if (current_function_decl) { - mode = TARGET_THUMB ? "thumb" : "arm"; + mode = TARGET_THUMB ? "thumb" : "arm"; add_attribute (mode, attributes); return; } diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index b092ba6..13a90d8 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1426,7 +1426,7 @@ extern const char *fp_sysreg_names[NB_FP_SYSREGS]; but prevents the compiler from extending the lifetime of these registers. */ #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P \ - arm_small_register_classes_for_mode_p + arm_small_register_classes_for_mode_p /* Must leave BASE_REGS reloads alone */ #define THUMB_SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ @@ -1479,7 +1479,7 @@ extern const char *fp_sysreg_names[NB_FP_SYSREGS]; /* Return the maximum number of consecutive registers needed to represent mode MODE in a register of class CLASS. - ARM regs are UNITS_PER_WORD bits. + ARM regs are UNITS_PER_WORD bits. FIXME: Is this true for iWMMX? */ #define CLASS_MAX_NREGS(CLASS, MODE) \ (CLASS == VPR_REG) \ @@ -1647,14 +1647,14 @@ machine_function; #define ARM_Q_BIT_READ (arm_q_bit_access ()) #define ARM_GE_BITS_READ (arm_ge_bits_access ()) -/* As in the machine_function, a global set of call-via labels, for code +/* As in the machine_function, a global set of call-via labels, for code that is in text_section. */ extern GTY(()) rtx thumb_call_via_label[14]; /* The number of potential ways of assigning to a co-processor. */ #define ARM_NUM_COPROC_SLOTS 1 -/* Enumeration of procedure calling standard variants. We don't really +/* Enumeration of procedure calling standard variants. We don't really support all of these yet. */ enum arm_pcs { diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h index 7a279f3..2e418fa 100644 --- a/gcc/config/arm/bpabi.h +++ b/gcc/config/arm/bpabi.h @@ -1,6 +1,6 @@ /* Configuration file for ARM BPABI targets. Copyright (C) 2004-2024 Free Software Foundation, Inc. - Contributed by CodeSourcery, LLC + Contributed by CodeSourcery, LLC This file is part of GCC. diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h index 97230d1..5f176de 100644 --- a/gcc/config/arm/elf.h +++ b/gcc/config/arm/elf.h @@ -3,7 +3,7 @@ Copyright (C) 1995-2024 Free Software Foundation, Inc. Contributed by Philip Blundell <philb@gnu.org> and Catherine Moore <clm@cygnus.com> - + This file is part of GCC. GCC is free software; you can redistribute it and/or modify it @@ -111,7 +111,7 @@ #ifndef LINK_SPEC #define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X" #endif - + /* Run-time Target Specification. */ #ifndef TARGET_DEFAULT #define TARGET_DEFAULT (MASK_APCS_FRAME) diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h index eef791f..50b753d 100644 --- a/gcc/config/arm/linux-eabi.h +++ b/gcc/config/arm/linux-eabi.h @@ -1,6 +1,6 @@ /* Configuration file for ARM GNU/Linux EABI targets. Copyright (C) 2004-2024 Free Software Foundation, Inc. - Contributed by CodeSourcery, LLC + Contributed by CodeSourcery, LLC This file is part of GCC. diff --git a/gcc/config/arm/symbian.h b/gcc/config/arm/symbian.h index 6431d61..4bfe9c8 100644 --- a/gcc/config/arm/symbian.h +++ b/gcc/config/arm/symbian.h @@ -1,6 +1,6 @@ /* Configuration file for Symbian OS on ARM processors. Copyright (C) 2004-2024 Free Software Foundation, Inc. - Contributed by CodeSourcery, LLC + Contributed by CodeSourcery, LLC This file is part of GCC. @@ -29,7 +29,7 @@ Make all symbols hidden by default. Symbian OS expects that all exported symbols will be explicitly marked with - "__declspec(dllexport)". + "__declspec(dllexport)". Enumeration types use 4 bytes, even if the enumerals are small, unless explicitly overridden. @@ -63,7 +63,7 @@ #undef SUBTARGET_ASM_FLOAT_SPEC #define SUBTARGET_ASM_FLOAT_SPEC \ "%{!mfpu=*:-mfpu=vfp} %{!mcpu=*:%{!march=*:-march=armv5t}}" - + /* Define the __symbian__ macro. */ #undef TARGET_OS_CPP_BUILTINS #define TARGET_OS_CPP_BUILTINS() \ diff --git a/gcc/config/arm/unknown-elf.h b/gcc/config/arm/unknown-elf.h index 6b31304..b1a1764 100644 --- a/gcc/config/arm/unknown-elf.h +++ b/gcc/config/arm/unknown-elf.h @@ -91,6 +91,6 @@ /* The libgcc udivmod functions may throw exceptions. If newlib is configured to support long longs in I/O, then printf will depend on udivmoddi4, which will depend on the exception unwind routines, - which will depend on abort, which is defined in libc. */ + which will depend on abort, which is defined in libc. */ #undef LINK_GCC_C_SEQUENCE_SPEC #define LINK_GCC_C_SEQUENCE_SPEC "--start-group %G %{!nolibc:%L} --end-group" diff --git a/gcc/config/arm/vxworks.h b/gcc/config/arm/vxworks.h index 7765d92..bafc650 100644 --- a/gcc/config/arm/vxworks.h +++ b/gcc/config/arm/vxworks.h @@ -1,10 +1,10 @@ /* Definitions of target machine for GCC, - for ARM with targeting the VXWorks run time environment. + for ARM with targeting the VXWorks run time environment. Copyright (C) 1999-2024 Free Software Foundation, Inc. Contributed by: Mike Stump <mrs@wrs.com> Brought up to date by CodeSourcery, LLC. - + This file is part of GCC. GCC is free software; you can redistribute it and/or modify |