i386: Introduce V2QImode vector cmove for -msse4.1 [PR103861]

This patch also moves V2HI and V4QImode vector conditional moves
to SSE4.1 targets.  Vector cmoves are implemented with SSE logic functions
without -msse4.1, and they are hardly worthwile for narrow vector modes.
More important, we would like to keep vector logic functions for GPR
registers, and the current RTX description of 32-bit vector modes logic
insns does not include the necessary CC reg clobber.  Solve these issues by
restricting vector cmove insns for these modes to -msse4.1, where logic
instructions are avoided, and pblend insn is used instead.

A follow-up patch will add clobbers and necessary splits to 32-bit
vector mode logic insns, and in a future patch, ix86_sse_movcc will be
improved to use expand_simple_{unop,binop} to emit logic insns, allowing
us to re-enable 16-bit and 32-bit narrow vector cmoves for -msse2.

2022-01-11  Uroš Bizjak  <ubizjak@gmail.com>

gcc/ChangeLog:

	PR target/103861
	* config/i386/mmx.md (vcond<mode><mode>):
	Use VI_16_32 mode iterator.  Enable for TARGET_SSE4_1.
	(vcondu<mode><mode>): Ditto.
	(vcond_mask_<mode><mode>): Ditto.
	(mmx_pblendvb_v8qi): Rename from mmx_pblendvb64.
	(mmx_pblendvb_<mode>): Rename from mmx_pblendvb32.
	Use VI_16_32 mode iterator.
	* config/i386/i386-expand.c (ix86_expand_sse_movcc):
	Update for rename.  Handle V2QImode.
	(expand_vec_perm_blend): Update for rename.

gcc/testsuite/ChangeLog:

	PR target/103861
	* g++.target/i386/pr100637-1b.C (dg-options):
	Use -msse4 instead of -msse2.
	* g++.target/i386/pr100637-1w.C (dg-options): Ditto.
	* g++.target/i386/pr103861-1.C: New test.
	* gcc.target/i386/pr100637-4b.c (dg-options):
	Use -msse4 instead of -msse2.
	* gcc.target/i386/pr103861-4.c: New test.

0 files changed, 0 insertions, 0 deletions