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| author | Jerry Zhang Jian <jerry.zhangjian@sifive.com> | 2025-04-30 15:34:07 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2025-04-30 17:26:24 +0800 |
| commit | a992164c2899735525a7a267654473b7e527ef0d (patch) | |
| tree | 7716c1ef74e61c9e054dcd20753a612e698c62f6 /libjava/classpath | |
| parent | 83bb288faa39a0bf5ce2d62e21a090a130d8dda4 (diff) | |
| download | gcc-a992164c2899735525a7a267654473b7e527ef0d.zip gcc-a992164c2899735525a7a267654473b7e527ef0d.tar.gz gcc-a992164c2899735525a7a267654473b7e527ef0d.tar.bz2 | |
RISC-V: Fix missing implied Zicsr from Zve32x
The Zve32x extension depends on the Zicsr extension.
Currently, enabling Zve32x alone does not automatically imply Zicsr in GCC.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc: Add Zve32x depends on Zicsr
gcc/testsuite/ChangeLog:
* gcc.target/riscv/predef-19.c: set the march to rv64im_zve32x
instead of rv64gc_zve32x to avoid Zicsr implied by g. Extra m is
added to avoid current 'V' extension requires 'M' extension
Signed-off-by: Jerry Zhang Jian <jerry.zhangjian@sifive.com>
Diffstat (limited to 'libjava/classpath')
0 files changed, 0 insertions, 0 deletions