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authorPan Li <pan2.li@intel.com>2025-05-25 17:16:09 +0800
committerPan Li <pan2.li@intel.com>2025-05-27 20:29:28 +0800
commit8c6f583d3d87b63c5ecace779ef359b568f7b747 (patch)
tree8445773dc5084e773856721ebc4b70cdb03ca845 /libgcc
parentdf691d8de1f4ea21763ca579bc6fb1fab38512da (diff)
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RISC-V: Add test for vec_duplicate + vxor.vv combine case 0 with GR2VR cost 0, 2 and 15
Add asm dump check test for vec_duplicate + vxor.vv combine to vxor.vx, with the GR2VR cost is 0, 2 and 15. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check for vxor.vx combine. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test data for vxor run test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i16.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i32.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i64.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-i8.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u16.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u32.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u64.c: New test. * gcc.target/riscv/rvv/autovec/vx_vf/vx_vxor-run-1-u8.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'libgcc')
0 files changed, 0 insertions, 0 deletions