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author | Kazu Hirata <kazu@codesourcery.com> | 2007-10-09 15:54:00 +0000 |
---|---|---|
committer | Kazu Hirata <kazu@gcc.gnu.org> | 2007-10-09 15:54:00 +0000 |
commit | e477cbcb75b30e7e216ff619736bdc3168bc5db4 (patch) | |
tree | 10d148f75ff3f1e823a4aa5dab88ab70aa6c0b8a /gcc | |
parent | b26c6d55aa4b4388dcf2028874a6f173ea15a41a (diff) | |
download | gcc-e477cbcb75b30e7e216ff619736bdc3168bc5db4.zip gcc-e477cbcb75b30e7e216ff619736bdc3168bc5db4.tar.gz gcc-e477cbcb75b30e7e216ff619736bdc3168bc5db4.tar.bz2 |
m68k.c (print_operand): Handle '{' and '}'.
* config/m68k/m68k.c (print_operand): Handle '{' and '}'.
* config/m68k/m68k.h (PRINT_OPERAND_PUNCT_VALID_P): Accept '{'
and '}'.
* config/m68k/m68k.md: Replace '{' with '%{' where '{' is
meant to be output.
From-SVN: r129168
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/m68k/m68k.c | 6 | ||||
-rw-r--r-- | gcc/config/m68k/m68k.h | 5 | ||||
-rw-r--r-- | gcc/config/m68k/m68k.md | 32 |
4 files changed, 34 insertions, 17 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c8fcf6a..3a6eda7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2007-10-09 Kazu Hirata <kazu@codesourcery.com> + + * config/m68k/m68k.c (print_operand): Handle '{' and '}'. + * config/m68k/m68k.h (PRINT_OPERAND_PUNCT_VALID_P): Accept '{' + and '}'. + * config/m68k/m68k.md: Replace '{' with '%{' where '{' is + meant to be output. + 2007-10-09 Richard Guenther <rguenther@suse.de> PR middle-end/33692 diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c index 099a220..456f245 100644 --- a/gcc/config/m68k/m68k.c +++ b/gcc/config/m68k/m68k.c @@ -3710,6 +3710,8 @@ floating_exact_log2 (rtx x) '&' for the letter `d' in an op code, but only on the 68040. '/' for register prefix needed by longlong.h. '?' for m68k_library_id_string + '{' for '{' + '}' for '}' 'b' for byte insn (no effect, on the Sun; this is for the ISI). 'd' to force memory addressing to be absolute, not relative. @@ -3727,6 +3729,10 @@ print_operand (FILE *file, rtx op, int letter) if (MOTOROLA) fprintf (file, "."); } + else if (letter == '{') + fprintf (file, "{"); + else if (letter == '}') + fprintf (file, "}"); else if (letter == '#') asm_fprintf (file, "%I"); else if (letter == '-') diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index 6f915d9..a346b81 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -1057,6 +1057,8 @@ do { if (cc_prev_status.flags & CC_IN_68881) \ '&' for the letter `d' in an op code, but only on the 68040. '/' for register prefix needed by longlong.h. '?' for m68k_library_id_string + '{' for '{' + '}' for '}' 'b' for byte insn (no effect, on the Sun; this is for the ISI). 'd' to force memory addressing to be absolute, not relative. @@ -1067,7 +1069,8 @@ do { if (cc_prev_status.flags & CC_IN_68881) \ #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \ || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \ - || (CODE) == '$' || (CODE) == '&' || (CODE) == '/' || (CODE) == '?') + || (CODE) == '$' || (CODE) == '&' || (CODE) == '/' || (CODE) == '?' \ + || (CODE) == '{' || (CODE) == '}') /* See m68k.c for the m68k specific codes. */ diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index a46b3fa..3191aec 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -5487,7 +5487,7 @@ if (REG_P (operands[0])) { if (INTVAL (operands[1]) + INTVAL (operands[2]) != 32) - return "bfins %3,%0{%b2:%b1}"; + return "bfins %3,%0%{%b2:%b1%}"; } else operands[0] = adjust_address (operands[0], @@ -5542,7 +5542,7 @@ if (REG_P (operands[1])) { if (INTVAL (operands[2]) + INTVAL (operands[3]) != 32) - return "bfextu %1{%b3:%b2},%0"; + return "bfextu %1%{%b3:%b2%},%0"; } else operands[1] @@ -5595,7 +5595,7 @@ if (REG_P (operands[1])) { if (INTVAL (operands[2]) + INTVAL (operands[3]) != 32) - return "bfexts %1{%b3:%b2},%0"; + return "bfexts %1%{%b3:%b2%},%0"; } else operands[1] @@ -5626,7 +5626,7 @@ (match_operand:SI 2 "nonmemory_operand" "dn") (match_operand:SI 3 "nonmemory_operand" "dn")))] "TARGET_68020 && TARGET_BITFIELD" - "bfexts %1{%b3:%b2},%0") + "bfexts %1%{%b3:%b2%},%0") (define_expand "extzv" [(set (match_operand:SI 0 "register_operand" "") @@ -5652,7 +5652,7 @@ { CC_STATUS_INIT; } - return "bfextu %1{%b3:%b2},%0"; + return "bfextu %1%{%b3:%b2%},%0"; }) (define_insn "" @@ -5667,7 +5667,7 @@ && (~ INTVAL (operands[3]) & ((1 << INTVAL (operands[1]))- 1)) == 0))" { CC_STATUS_INIT; - return "bfchg %0{%b2:%b1}"; + return "bfchg %0%{%b2:%b1%}"; }) (define_insn "" @@ -5678,7 +5678,7 @@ "TARGET_68020 && TARGET_BITFIELD" { CC_STATUS_INIT; - return "bfclr %0{%b2:%b1}"; + return "bfclr %0%{%b2:%b1%}"; }) (define_insn "" @@ -5689,7 +5689,7 @@ "TARGET_68020 && TARGET_BITFIELD" { CC_STATUS_INIT; - return "bfset %0{%b2:%b1}"; + return "bfset %0%{%b2:%b1%}"; }) (define_expand "insv" @@ -5706,7 +5706,7 @@ (match_operand:SI 2 "nonmemory_operand" "dn")) (match_operand:SI 3 "register_operand" "d"))] "TARGET_68020 && TARGET_BITFIELD" - "bfins %3,%0{%b2:%b1}") + "bfins %3,%0%{%b2:%b1%}") ;; Now recognize bit-field insns that operate on registers ;; (or at least were intended to do so). @@ -5717,7 +5717,7 @@ (match_operand:SI 2 "const_int_operand" "n") (match_operand:SI 3 "const_int_operand" "n")))] "TARGET_68020 && TARGET_BITFIELD" - "bfexts %1{%b3:%b2},%0") + "bfexts %1%{%b3:%b2%},%0") (define_insn "" [(set (match_operand:SI 0 "nonimmediate_operand" "=d") @@ -5735,7 +5735,7 @@ { CC_STATUS_INIT; } - return "bfextu %1{%b3:%b2},%0"; + return "bfextu %1%{%b3:%b2%},%0"; }) (define_insn "" @@ -5746,7 +5746,7 @@ "TARGET_68020 && TARGET_BITFIELD" { CC_STATUS_INIT; - return "bfclr %0{%b2:%b1}"; + return "bfclr %0%{%b2:%b1%}"; }) (define_insn "" @@ -5757,7 +5757,7 @@ "TARGET_68020 && TARGET_BITFIELD" { CC_STATUS_INIT; - return "bfset %0{%b2:%b1}"; + return "bfset %0%{%b2:%b1%}"; }) (define_insn "" @@ -5776,7 +5776,7 @@ && INTVAL (operands[1]) == 24 && INTVAL (operands[2]) == 8) return "move%.b %3,%0"; #endif - return "bfins %3,%0{%b2:%b1}"; + return "bfins %3,%0%{%b2:%b1%}"; }) ;; Special patterns for optimizing bit-field instructions. @@ -5801,7 +5801,7 @@ } if (INTVAL (operands[1]) != 32) cc_status.flags = CC_NOT_NEGATIVE; - return "bftst %0{%b2:%b1}"; + return "bftst %0%{%b2:%b1%}"; }) @@ -5825,7 +5825,7 @@ } if (INTVAL (operands[1]) != 32) cc_status.flags = CC_NOT_NEGATIVE; - return "bftst %0{%b2:%b1}"; + return "bftst %0%{%b2:%b1%}"; }) (define_insn "scc0_di" |