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authorliuhongt <hongtao.liu@intel.com>2022-11-21 16:09:13 +0800
committerliuhongt <hongtao.liu@intel.com>2022-11-22 12:50:02 +0800
commitd5fce9f6c15554a7d5bfbbcd1740200f1d32fa15 (patch)
tree6309c8f272457f01a2b119b024f386c1d31cc7f8 /gcc
parent826c22dff6455ba324fea120be27c2be638f0b96 (diff)
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Guard 64/32-bit vector move patterns with ix86_hard_reg_move_ok.
gcc/ChangeLog: * config/i386/mmx.md (*mov<mode>_internal): Add ix86_hard_reg_move_ok to condition.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/i386/mmx.md6
1 files changed, 4 insertions, 2 deletions
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index d5134cc..63aff287 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -133,7 +133,8 @@
(match_operand:MMXMODE 1 "nonimm_or_0_operand"
"rCo,rC,C,rm,rC,C ,!y,m ,?!y,?!y,r ,C,v,m,v,v,r,*x,!y"))]
"(TARGET_MMX || TARGET_MMX_WITH_SSE)
- && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
+ && !(MEM_P (operands[0]) && MEM_P (operands[1]))
+ && ix86_hardreg_mov_ok (operands[0], operands[1])"
{
switch (get_attr_type (insn))
{
@@ -286,7 +287,8 @@
"=r ,m ,v,v,v,m,r,v")
(match_operand:V_32 1 "general_operand"
"rmC,rC,C,v,m,v,v,r"))]
- "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
+ "!(MEM_P (operands[0]) && MEM_P (operands[1]))
+ && ix86_hardreg_mov_ok (operands[0], operands[1])"
{
switch (get_attr_type (insn))
{