From d5fce9f6c15554a7d5bfbbcd1740200f1d32fa15 Mon Sep 17 00:00:00 2001 From: liuhongt Date: Mon, 21 Nov 2022 16:09:13 +0800 Subject: Guard 64/32-bit vector move patterns with ix86_hard_reg_move_ok. gcc/ChangeLog: * config/i386/mmx.md (*mov_internal): Add ix86_hard_reg_move_ok to condition. --- gcc/config/i386/mmx.md | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'gcc') diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index d5134cc..63aff287 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -133,7 +133,8 @@ (match_operand:MMXMODE 1 "nonimm_or_0_operand" "rCo,rC,C,rm,rC,C ,!y,m ,?!y,?!y,r ,C,v,m,v,v,r,*x,!y"))] "(TARGET_MMX || TARGET_MMX_WITH_SSE) - && !(MEM_P (operands[0]) && MEM_P (operands[1]))" + && !(MEM_P (operands[0]) && MEM_P (operands[1])) + && ix86_hardreg_mov_ok (operands[0], operands[1])" { switch (get_attr_type (insn)) { @@ -286,7 +287,8 @@ "=r ,m ,v,v,v,m,r,v") (match_operand:V_32 1 "general_operand" "rmC,rC,C,v,m,v,v,r"))] - "!(MEM_P (operands[0]) && MEM_P (operands[1]))" + "!(MEM_P (operands[0]) && MEM_P (operands[1])) + && ix86_hardreg_mov_ok (operands[0], operands[1])" { switch (get_attr_type (insn)) { -- cgit v1.1