diff options
author | Jakub Jelinek <jakub@redhat.com> | 2007-08-30 10:25:36 +0200 |
---|---|---|
committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2007-08-30 10:25:36 +0200 |
commit | c75c6d11bcc4a54e608d46a203a19e62cda55785 (patch) | |
tree | 47d702ba085795189fe469e869366223fc7c596c /gcc | |
parent | a996720c4e3629eb39b2fd02e4c3053f04a3c6dd (diff) | |
download | gcc-c75c6d11bcc4a54e608d46a203a19e62cda55785.zip gcc-c75c6d11bcc4a54e608d46a203a19e62cda55785.tar.gz gcc-c75c6d11bcc4a54e608d46a203a19e62cda55785.tar.bz2 |
rs6000.c (rs6000_emit_sync): For QI or HI mode used_m...
* config/rs6000/rs6000.c (rs6000_emit_sync): For QI or HI mode
used_m, even if it is 32-bit aligned, adjust used_m MEM to have
SImode and update m. Don't run gen_lowpart_common on arbitrary
memory address, force it to register first.
* gcc.dg/sync-2.c (AI_ALIGN): Define if not defined.
(AI): Add AI_ALIGN.
* gcc.dg/sync-3.c: New test.
From-SVN: r127922
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 20 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/sync-2.c | 6 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/sync-3.c | 10 |
5 files changed, 39 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 424cb3e..e332be8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2007-08-30 Jakub Jelinek <jakub@redhat.com> + + * config/rs6000/rs6000.c (rs6000_emit_sync): For QI or HI mode + used_m, even if it is 32-bit aligned, adjust used_m MEM to have + SImode and update m. Don't run gen_lowpart_common on arbitrary + memory address, force it to register first. + 2007-08-30 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> * config/s390/s390.md ("*add<mode>3_alc_carry1_cc", diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 38659bf..0af3f69 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -12757,14 +12757,16 @@ rs6000_emit_sync (enum rtx_code code, enum machine_mode mode, ishift = GET_MODE_BITSIZE (SImode) - GET_MODE_BITSIZE (mode); shift = GEN_INT (ishift); + used_m = change_address (used_m, SImode, 0); } else { rtx addrSI, aligned_addr; int shift_mask = mode == QImode ? 0x18 : 0x10; - addrSI = force_reg (SImode, gen_lowpart_common (SImode, - XEXP (used_m, 0))); + addrSI = gen_lowpart_common (SImode, + force_reg (Pmode, XEXP (used_m, 0))); + addrSI = force_reg (SImode, addrSI); shift = gen_reg_rtx (SImode); emit_insn (gen_rlwinm (shift, addrSI, GEN_INT (3), @@ -12777,14 +12779,14 @@ rs6000_emit_sync (enum rtx_code code, enum machine_mode mode, 1, OPTAB_LIB_WIDEN); used_m = change_address (used_m, SImode, aligned_addr); set_mem_align (used_m, 32); - /* It's safe to keep the old alias set of USED_M, because - the operation is atomic and only affects the original - USED_M. */ - if (GET_CODE (m) == NOT) - m = gen_rtx_NOT (SImode, used_m); - else - m = used_m; } + /* It's safe to keep the old alias set of USED_M, because + the operation is atomic and only affects the original + USED_M. */ + if (GET_CODE (m) == NOT) + m = gen_rtx_NOT (SImode, used_m); + else + m = used_m; if (GET_CODE (op) == NOT) { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c960251..8e6ffd5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2007-08-30 Jakub Jelinek <jakub@redhat.com> + + * gcc.dg/sync-2.c (AI_ALIGN): Define if not defined. + (AI): Add AI_ALIGN. + * gcc.dg/sync-3.c: New test. + 2007-08-30 Uros Bizjak <ubizjak@gmail.com> * lib/gcc-dg.exp (cleanup-profile-file): New procedure. diff --git a/gcc/testsuite/gcc.dg/sync-2.c b/gcc/testsuite/gcc.dg/sync-2.c index c82d665..9849a70 100644 --- a/gcc/testsuite/gcc.dg/sync-2.c +++ b/gcc/testsuite/gcc.dg/sync-2.c @@ -8,7 +8,11 @@ extern void abort (void); extern void *memcpy (void *, const void *, __SIZE_TYPE__); -static char AI[18]; +#ifndef AI_ALIGN +#define AI_ALIGN +#endif + +static char AI[18] AI_ALIGN; static char init_qi[18] = { 3,5,7,9,0,0,0,0,-1,0,0,0,0,0,-1,0,0,0 }; static char test_qi[18] = { 3,5,7,9,1,4,22,-12,7,8,9,7,1,-12,7,8,9,7 }; diff --git a/gcc/testsuite/gcc.dg/sync-3.c b/gcc/testsuite/gcc.dg/sync-3.c new file mode 100644 index 0000000..bf8abb7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/sync-3.c @@ -0,0 +1,10 @@ +/* { dg-do run } */ +/* { dg-require-effective-target sync_char_short } */ +/* { dg-options "-O2" } */ +/* { dg-options "-march=i486 -O2" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ +/* { dg-options "-mcpu=v9 -O2" { target sparc*-*-* } } */ + +/* Test functionality of the intrinsics for 'short' and 'char'. */ + +#define AI_ALIGN __attribute__((__aligned__ (4))) +#include "sync-2.c" |