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| author | Ulrich Weigand <uweigand@de.ibm.com> | 2007-08-30 06:51:53 +0000 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@gcc.gnu.org> | 2007-08-30 06:51:53 +0000 |
| commit | a996720c4e3629eb39b2fd02e4c3053f04a3c6dd (patch) | |
| tree | 8070f576335ae84edef4afc0a6baf91179263211 /gcc | |
| parent | a94a76a7324487f7b2963a103da606efa1c2aaba (diff) | |
| download | gcc-a996720c4e3629eb39b2fd02e4c3053f04a3c6dd.zip gcc-a996720c4e3629eb39b2fd02e4c3053f04a3c6dd.tar.gz gcc-a996720c4e3629eb39b2fd02e4c3053f04a3c6dd.tar.bz2 | |
s390.md ("*add<mode>3_alc_carry1_cc", [...]): New insn definitions.
2007-08-30 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
* config/s390/s390.md ("*add<mode>3_alc_carry1_cc",
"*add<mode>3_alc_carry1_cconly", "*add<mode>3_alc_carry2_cc",
"*add<mode>3_alc_carry2_cconly"): New insn definitions.
From-SVN: r127921
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/s390/s390.md | 69 |
2 files changed, 75 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9464cab..424cb3e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2007-08-30 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + * config/s390/s390.md ("*add<mode>3_alc_carry1_cc", + "*add<mode>3_alc_carry1_cconly", "*add<mode>3_alc_carry2_cc", + "*add<mode>3_alc_carry2_cconly"): New insn definitions. + +2007-08-30 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + * config/s390/s390.c (s390_expand_addcc): Emit canonical alc pattern. * config/s390/s390.md ("*add<mode>3_alc_cc", "*add<mode>3_alc", diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index cb0f900..66cf561 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -4306,6 +4306,75 @@ ; add(di|si)cc instruction pattern(s). ; +; the following 4 patterns are used when the result of an add with +; carry is checked for an overflow condition + +; op1 + op2 + c < op1 + +; alcr, alc, alcgr, alcg +(define_insn "*add<mode>3_alc_carry1_cc" + [(set (reg CC_REGNUM) + (compare + (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "") + (match_operand:GPR 1 "nonimmediate_operand" "%0,0")) + (match_operand:GPR 2 "general_operand" "d,m")) + (match_dup 1))) + (set (match_operand:GPR 0 "register_operand" "=d,d") + (plus:GPR (plus:GPR (match_dup 3) (match_dup 1)) (match_dup 2)))] + "s390_match_ccmode (insn, CCL1mode) && TARGET_CPU_ZARCH" + "@ + alc<g>r\t%0,%2 + alc<g>\t%0,%2" + [(set_attr "op_type" "RRE,RXY")]) + +; alcr, alc, alcgr, alcg +(define_insn "*add<mode>3_alc_carry1_cconly" + [(set (reg CC_REGNUM) + (compare + (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "") + (match_operand:GPR 1 "nonimmediate_operand" "%0,0")) + (match_operand:GPR 2 "general_operand" "d,m")) + (match_dup 1))) + (clobber (match_scratch:GPR 0 "=d,d"))] + "s390_match_ccmode (insn, CCL1mode) && TARGET_CPU_ZARCH" + "@ + alc<g>r\t%0,%2 + alc<g>\t%0,%2" + [(set_attr "op_type" "RRE,RXY")]) + +; op1 + op2 + c < op2 + +; alcr, alc, alcgr, alcg +(define_insn "*add<mode>3_alc_carry2_cc" + [(set (reg CC_REGNUM) + (compare + (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "") + (match_operand:GPR 1 "nonimmediate_operand" "%0,0")) + (match_operand:GPR 2 "general_operand" "d,m")) + (match_dup 2))) + (set (match_operand:GPR 0 "register_operand" "=d,d") + (plus:GPR (plus:GPR (match_dup 3) (match_dup 1)) (match_dup 2)))] + "s390_match_ccmode (insn, CCL1mode) && TARGET_CPU_ZARCH" + "@ + alc<g>r\t%0,%2 + alc<g>\t%0,%2" + [(set_attr "op_type" "RRE,RXY")]) + +; alcr, alc, alcgr, alcg +(define_insn "*add<mode>3_alc_carry2_cconly" + [(set (reg CC_REGNUM) + (compare + (plus:GPR (plus:GPR (match_operand:GPR 3 "s390_alc_comparison" "") + (match_operand:GPR 1 "nonimmediate_operand" "%0,0")) + (match_operand:GPR 2 "general_operand" "d,m")) + (match_dup 2))) + (clobber (match_scratch:GPR 0 "=d,d"))] + "s390_match_ccmode (insn, CCL1mode) && TARGET_CPU_ZARCH" + "@ + alc<g>r\t%0,%2 + alc<g>\t%0,%2" + [(set_attr "op_type" "RRE,RXY")]) + ; alcr, alc, alcgr, alcg (define_insn "*add<mode>3_alc_cc" [(set (reg CC_REGNUM) |