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| author | Venkataramanan Kumar <venkataramanan.kumar@linaro.org> | 2014-04-23 17:01:39 +0000 |
|---|---|---|
| committer | Marcus Shawcroft <mshawcroft@gcc.gnu.org> | 2014-04-23 17:01:39 +0000 |
| commit | 36e170203e7f09f6c23c7378f835e21c402b57c9 (patch) | |
| tree | 43e225956b580d8bdb05bec58ad22950220fb702 /gcc | |
| parent | 57b77d46b6a45f8d7ef8fd82cfddfa1aafce8cab (diff) | |
| download | gcc-36e170203e7f09f6c23c7378f835e21c402b57c9.zip gcc-36e170203e7f09f6c23c7378f835e21c402b57c9.tar.gz gcc-36e170203e7f09f6c23c7378f835e21c402b57c9.tar.bz2 | |
[AARCH64] Use standard patterns for stack protection.
From-SVN: r209712
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 63 |
2 files changed, 69 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 724fa3b..638c0da 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2014-04-23 Venkataramanan Kumar <venkataramanan.kumar@linaro.org> + + * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test) + (stack_protect_set_<mode>, stack_protect_test_<mode>): Add + machine descriptions for Stack Smashing Protector. + 2014-04-23 Richard Earnshaw <rearnsha@arm.com> * aarch64.md (<optab>_rol<mode>3): New pattern. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 1c017e7d..7965db4 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -103,6 +103,8 @@ UNSPEC_USHL_2S UNSPEC_USHR64 UNSPEC_VSTRUCTDUMMY + UNSPEC_SP_SET + UNSPEC_SP_TEST ]) (define_c_enum "unspecv" [ @@ -3800,6 +3802,67 @@ DONE; }) +;; Named patterns for stack smashing protection. +(define_expand "stack_protect_set" + [(match_operand 0 "memory_operand") + (match_operand 1 "memory_operand")] + "" +{ + enum machine_mode mode = GET_MODE (operands[0]); + + emit_insn ((mode == DImode + ? gen_stack_protect_set_di + : gen_stack_protect_set_si) (operands[0], operands[1])); + DONE; +}) + +(define_insn "stack_protect_set_<mode>" + [(set (match_operand:PTR 0 "memory_operand" "=m") + (unspec:PTR [(match_operand:PTR 1 "memory_operand" "m")] + UNSPEC_SP_SET)) + (set (match_scratch:PTR 2 "=&r") (const_int 0))] + "" + "ldr\\t%x2, %1\;str\\t%x2, %0\;mov\t%x2,0" + [(set_attr "length" "12") + (set_attr "type" "multiple")]) + +(define_expand "stack_protect_test" + [(match_operand 0 "memory_operand") + (match_operand 1 "memory_operand") + (match_operand 2)] + "" +{ + + rtx result = gen_reg_rtx (Pmode); + + enum machine_mode mode = GET_MODE (operands[0]); + + emit_insn ((mode == DImode + ? gen_stack_protect_test_di + : gen_stack_protect_test_si) (result, + operands[0], + operands[1])); + + if (mode == DImode) + emit_jump_insn (gen_cbranchdi4 (gen_rtx_EQ (VOIDmode, result, const0_rtx), + result, const0_rtx, operands[2])); + else + emit_jump_insn (gen_cbranchsi4 (gen_rtx_EQ (VOIDmode, result, const0_rtx), + result, const0_rtx, operands[2])); + DONE; +}) + +(define_insn "stack_protect_test_<mode>" + [(set (match_operand:PTR 0 "register_operand") + (unspec:PTR [(match_operand:PTR 1 "memory_operand" "m") + (match_operand:PTR 2 "memory_operand" "m")] + UNSPEC_SP_TEST)) + (clobber (match_scratch:PTR 3 "=&r"))] + "" + "ldr\t%x3, %x1\;ldr\t%x0, %x2\;eor\t%x0, %x3, %x0" + [(set_attr "length" "12") + (set_attr "type" "multiple")]) + ;; AdvSIMD Stuff (include "aarch64-simd.md") |