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authorRobin Dapp <rdapp@ventanamicro.com>2025-01-09 20:45:10 +0100
committerRobin Dapp <rdapp@ventanamicro.com>2025-01-14 12:52:46 +0100
commite5e9e50fc6816713d012f1d96ae308a0946d5a14 (patch)
treecb15c7bdc46ead08ed7fb761fab759261afe2059 /gcc/testsuite/gcc.target/riscv
parent14cb0610559fa33f211e1546260458496fdc5e71 (diff)
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RISC-V: Fix vsetvl compatibility predicate [PR118154].
In PR118154 we emit strided stores but the first of those does not always have the proper VTYPE. That's because we erroneously delete a necessary vsetvl. In order to determine whether to elide (1) Expr[7]: VALID (insn 116, bb 17) Demand fields: demand_ratio_and_ge_sew demand_avl SEW=8, VLMUL=mf2, RATIO=16, MAX_SEW=64 TAIL_POLICY=agnostic, MASK_POLICY=agnostic AVL=(reg:DI 0 zero) when e.g. (2) Expr[3]: VALID (insn 360, bb 15) Demand fields: demand_sew_lmul demand_avl SEW=64, VLMUL=m1, RATIO=64, MAX_SEW=64 TAIL_POLICY=agnostic, MASK_POLICY=agnostic AVL=(reg:DI 0 zero) VL=(reg:DI 13 a3 [345]) is already available, we use sew_ge_and_prev_sew_le_next_max_sew_and_next_ratio_valid_for_prev_sew_p. (1) requires RATIO = SEW/LMUL = 16 and an SEW >= 8. (2) has ratio = 64, though, so we cannot directly elide (1). This patch uses ratio_eq_p instead of next_ratio_valid_for_prev_sew_p. PR target/118154 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (MAX_LMUL): New define. (pre_vsetvl::earliest_fuse_vsetvl_info): Use. (pre_vsetvl::pre_global_vsetvl_info): New predicate with equal ratio. * config/riscv/riscv-vsetvl.def: Use. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr118154-1.c: New test. * gcc.target/riscv/rvv/autovec/pr118154-2.c: New test.
Diffstat (limited to 'gcc/testsuite/gcc.target/riscv')
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/pr118154-1.c23
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/pr118154-2.c31
2 files changed, 54 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr118154-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr118154-1.c
new file mode 100644
index 0000000..5538656
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr118154-1.c
@@ -0,0 +1,23 @@
+/* { dg-do run } */
+/* { dg-require-effective-target riscv_v_ok } */
+/* { dg-add-options riscv_v } */
+/* { dg-additional-options "-std=gnu99 -Wno-pedantic" } */
+
+long a;
+char b;
+char c[22][484];
+int main() {
+ for (int e = 4; e < 33; e++) {
+ for (int f = 0; f < 3; f++)
+ for (int g = 0; g < 18; g++) {
+ c[f][g * 22] = 1;
+ a = ({ a > 1 ? a : 1; });
+ }
+ for (int i = 0; i < 33; i++)
+ for (int h = 0; h < 6; h++)
+ for (int j = 0; j < 17; j++)
+ b = ({ b > 17 ? b : 17; });
+ }
+ if (c[1][44] != 1)
+ __builtin_abort ();
+}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr118154-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr118154-2.c
new file mode 100644
index 0000000..4172f29
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr118154-2.c
@@ -0,0 +1,31 @@
+/* { dg-do run } */
+/* { dg-require-effective-target riscv_v_ok } */
+/* { dg-add-options riscv_v } */
+/* { dg-additional-options "-std=gnu99 -Wno-pedantic" } */
+
+long a;
+signed char b;
+long long d;
+signed char c[22][22][484];
+void m(long long *l, int n) { *l ^= n + (*l >> 2); }
+int main() {
+ signed char l = 35;
+ for (signed char f = 4; f; f++) {
+ for (signed g = 0; g < 022; g += 4)
+ for (signed char h = 0; h < 022; h++) {
+ c[9][g][h * 22 + h] = l;
+ a = ({ a > 4095 ? a : 4095; });
+ }
+ for (int i = 0; i < 22; i += 3)
+ for (signed char j = 1; j; j++)
+ for (signed char k = 0; k < 022; k++)
+ b = ({ b > 19 ? b : 19; });
+ }
+ for (long f = 0; f < 22; ++f)
+ for (long g = 0; g < 22; ++g)
+ for (long h = 0; h < 22; ++h)
+ for (long i = 0; i < 22; ++i)
+ m(&d, c[f][g][h * 2 + i]);
+ if (d != 38)
+ __builtin_abort ();
+}