The sat alu related testcase check the rtl dump for the standard name like .SAT_SUB exist or not. But the rtl pass expand is somehow impressionable by the middle-end change or debug information. Like below new appearance recently. Replacing Expressions _5 replace with --> _5 = .SAT_SUB (x_3(D), y_4(D)); [tail call] After that we need to adjust the dump check time and again. This patch would like to switch to tree optimized pass for the standard name check, which is more stable up to a point. The below test suites are passed for this patch. * The rv64gcv fully regression test. It is test only patch and obvious up to a point, will commit it directly if no comments in next 48H. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat/sat_u_sub-1-u16.c: Take tree-optimized pass for standard name check, and adjust the times. * gcc.target/riscv/sat/sat_u_sub-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c: Ditto. Signed-off-by: Pan Li <pan2.li@intel.com>