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| author | Richard Earnshaw <rearnsha@arm.com> | 2023-08-22 15:26:59 +0100 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2023-08-23 17:13:29 +0100 |
| commit | bf64392d66f2913d2bbd1d3232f7f8a77c812d13 (patch) | |
| tree | 3116961c25cdd2824299cc6ec401064a612fd485 /gcc/target.def | |
| parent | 3e086a12c273e5abb45d0228dc624acf97871ef3 (diff) | |
| download | gcc-bf64392d66f2913d2bbd1d3232f7f8a77c812d13.zip gcc-bf64392d66f2913d2bbd1d3232f7f8a77c812d13.tar.gz gcc-bf64392d66f2913d2bbd1d3232f7f8a77c812d13.tar.bz2 | |
rtl: use rtx_code for gen_ccmp_first and gen_ccmp_next
Now that we have a forward declaration of rtx_code in coretypes.h, we
can adjust these hooks to take rtx_code arguments rather than an int.
gcc/ChangeLog:
* target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
CODE, CMP_CODE and BIT_CODE arguments.
* config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
(aarch64_gen_ccmp_next): Likewise.
* doc/tm.texi: Regenerated.
Diffstat (limited to 'gcc/target.def')
| -rw-r--r-- | gcc/target.def | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/target.def b/gcc/target.def index a500aeb..05f2671 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -2735,7 +2735,7 @@ DEFHOOK insns are saved in @var{gen_seq}. They will be emitted when all the\n\ compares in the conditional comparision are generated without error.\n\ @var{code} is the @code{rtx_code} of the compare for @var{op0} and @var{op1}.", - rtx, (rtx_insn **prep_seq, rtx_insn **gen_seq, int code, tree op0, tree op1), + rtx, (rtx_insn **prep_seq, rtx_insn **gen_seq, rtx_code code, tree op0, tree op1), NULL) DEFHOOK @@ -2752,7 +2752,7 @@ DEFHOOK be appropriate for passing to @code{gen_ccmp_next} or @code{cbranch_optab}.\n\ @var{code} is the @code{rtx_code} of the compare for @var{op0} and @var{op1}.\n\ @var{bit_code} is @code{AND} or @code{IOR}, which is the op on the compares.", - rtx, (rtx_insn **prep_seq, rtx_insn **gen_seq, rtx prev, int cmp_code, tree op0, tree op1, int bit_code), + rtx, (rtx_insn **prep_seq, rtx_insn **gen_seq, rtx prev, rtx_code cmp_code, tree op0, tree op1, rtx_code bit_code), NULL) /* Return a new value for loop unroll size. */ |