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| author | Richard Sandiford <richard.sandiford@arm.com> | 2024-10-07 13:03:03 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2024-10-07 13:03:03 +0100 |
| commit | 4fd473f66faf5bd95c84fe5c0fa41be735a7c09f (patch) | |
| tree | bdb61d61109df0607b49e0fd2993c1c3dd827fb2 /gcc/gcov.cc | |
| parent | 1048ebbbdc98a5928a974356d7f4244603b6bd32 (diff) | |
| download | gcc-4fd473f66faf5bd95c84fe5c0fa41be735a7c09f.zip gcc-4fd473f66faf5bd95c84fe5c0fa41be735a7c09f.tar.gz gcc-4fd473f66faf5bd95c84fe5c0fa41be735a7c09f.tar.bz2 | |
aarch64: Fix general permutes of svbfloat16_ts
Testing gcc.target/aarch64/sve/permute_2.c without the associated GCC
patch triggered an unrecognisable insn ICE for the svbfloat16_t tests.
This was because the implementation of general two-vector permutes
requires two TBLs and an ORR, with the ORR being represented as an
unspec for floating-point modes. The associated pattern did not
cover VNx8BF.
gcc/
* config/aarch64/iterators.md (SVE_I): Move further up file.
(SVE_F): New mode iterator.
(SVE_ALL): Redefine in terms of SVE_I and SVE_F.
* config/aarch64/aarch64-sve.md (*<LOGICALF:optab><mode>3): Extend
to all SVE_F.
gcc/testsuite/
* gcc.target/aarch64/sve/permute_5.c: New test.
Diffstat (limited to 'gcc/gcov.cc')
0 files changed, 0 insertions, 0 deletions