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| author | Pan Li <pan2.li@intel.com> | 2024-11-21 14:30:48 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2024-11-24 15:49:27 +0800 |
| commit | 59afd30c48d935188dd795c805f0b03121068bfe (patch) | |
| tree | fc8d80f72d492eebe4a3a8afa770122d7857f6c0 /gcc/function.cc | |
| parent | 630565843a7e29101327bd16df98089b80d5c31e (diff) | |
| download | gcc-59afd30c48d935188dd795c805f0b03121068bfe.zip gcc-59afd30c48d935188dd795c805f0b03121068bfe.tar.gz gcc-59afd30c48d935188dd795c805f0b03121068bfe.tar.bz2 | |
RISC-V: Refactor the test files for all other vector SAT ALU
This patch would like to refactor the all the other testcases of vector
SAT ALU after move to rvv/autovec/sat folder. Includes:
* Refine the include header files.
* Remove unnecessary optimization options.
* Reconcile the dump check based on option no-opts and/or any-opts.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i16.c: Refine
the include file, remove unnecessary options and reconcile the
dump check based on options.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i16-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip.c: Ditto.
* gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Removed.
Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc/function.cc')
0 files changed, 0 insertions, 0 deletions