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| author | Cui,Lili <lili.cui@intel.com> | 2021-04-12 09:59:25 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2021-04-12 15:42:26 +0800 |
| commit | c02c39fad02c386f6e687e28282973f580fc95ac (patch) | |
| tree | 72e5131de2e2c403283b32de7ca7a00ecffb9186 /gcc/doc | |
| parent | f2be08339b77d3495e210d6b5d9cea927f437720 (diff) | |
| download | gcc-c02c39fad02c386f6e687e28282973f580fc95ac.zip gcc-c02c39fad02c386f6e687e28282973f580fc95ac.tar.gz gcc-c02c39fad02c386f6e687e28282973f580fc95ac.tar.bz2 | |
Add rocketlake to gcc.
gcc/
* common/config/i386/cpuinfo.h (get_intel_cpu): Handle
rocketlake.
* common/config/i386/i386-common.c (processor_names): Add
rocketlake.
(processor_alias_table): Add rocketlake.
* common/config/i386/i386-cpuinfo.h (processor_subtypes): Add
INTEL_COREI7_ROCKETLAKE.
* config.gcc: Add -march=rocketlake.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
rocketlake.
* config/i386/i386-options.c (m_ROCKETLAKE) : Define.
(processor_cost_table): Add rocketlake cost.
* config/i386/i386.h (ix86_size_cost) : Define
TARGET_ROCKETLAKE.
(processor_type) : Add PROCESSOR_ROCKETLAKE.
(PTA_ROCKETLAKE): Ditto.
* doc/extend.texi: Add rocketlake.
* doc/invoke.texi: Add rocketlake.
gcc/testsuite/
* gcc.target/i386/funcspec-56.inc: Handle new march.
* g++.target/i386/mv16.C: Handle new march
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/extend.texi | 3 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 8 |
2 files changed, 11 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 849c880..e28e186 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -23046,6 +23046,9 @@ Intel Core i7 sapphirerapids CPU. @item alderlake Intel Core i7 Alderlake CPU. +@item rocketlake +Intel Core i7 Rocketlake CPU. + @item bonnell Intel Atom Bonnell CPU. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 6b585ce..1755124 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -30194,6 +30194,14 @@ MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and AVX-VNNI instruction set support. +@item rocketlake +Intel Rocketlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, +SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, +RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, +XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, +AVX512IFMA, SHA, CLWB, UMIP, RDPID, GFNI, AVX512VBMI2, AVX512VPOPCNTDQ, +AVX512BITALG, AVX512VNNI, VPCLMULQDQ, VAES instruction set support. + @item k6 AMD K6 CPU with MMX instruction set support. |