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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2020-04-22 13:21:31 +0100 |
|---|---|---|
| committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2020-04-22 13:21:31 +0100 |
| commit | a87e0cba839bb4a2daca34896a0760258027b38e (patch) | |
| tree | 745ab98b1c3c361d4b15a82a4fc14c2a28e128c1 /gcc/doc | |
| parent | 4ea769a91dfa9142235c457b9db6ecc4e55072c4 (diff) | |
| download | gcc-a87e0cba839bb4a2daca34896a0760258027b38e.zip gcc-a87e0cba839bb4a2daca34896a0760258027b38e.tar.gz gcc-a87e0cba839bb4a2daca34896a0760258027b38e.tar.bz2 | |
[arm] Add initial support for Arm Cortex-M55
This patch adds initial -mcpu support for the Arm Cortex-M55 CPU.
This CPU is an Armv8.1-M Mainline CPU supporting MVE.
An option to disable floating-point (and MVE) is provided with the +nofp.
For GCC 11 I'd like to add further fine-grained options to enable integer-only MVE
but that needs a bit more elaborate surgery in arm-cpus.in that I don't want to do
in GCC 10 at this stage.
As this CPU is not supported in gas and I don't want to couple GCC 10 to the very
latest binutils anyway, this CPU emits the cpu string in the assembly file as a build attribute
rather than a .cpu directive, thus sparing us the need to support .cpu cortex-m55 in gas.
The .cpu directive in gas isn't used for anything besides setting the Tag_CPU_name
build attribute anyway (which itself is not used by any tools I'm aware of).
All the architecture information used for target detection is already emitted using .arch_extension
directives and similar.
Bootstrapped and tested on arm-none-linux-gnueabihf. Also tested on arm-none-eabi.
2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
Mihail Ionescu <mihail.ionescu@arm.com>
* config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
* config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
(ALL_QUIRKS): Add quirk_no_asmcpu.
(cortex-m55): Define new cpu.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index d474882..e2bc255 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -18773,7 +18773,7 @@ Permissible names are: @samp{arm7tdmi}, @samp{arm7tdmi-s}, @samp{arm710t}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-r52}, @samp{cortex-m0}, @samp{cortex-m0plus}, @samp{cortex-m1}, @samp{cortex-m3}, @samp{cortex-m4}, @samp{cortex-m7}, @samp{cortex-m23}, @samp{cortex-m33}, -@samp{cortex-m35p}, +@samp{cortex-m35p}, @samp{cortex-m55}, @samp{cortex-m1.small-multiply}, @samp{cortex-m0.small-multiply}, @samp{cortex-m0plus.small-multiply}, @samp{exynos-m1}, @samp{marvell-pj4}, @samp{neoverse-n1}, @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @@ -18850,7 +18850,7 @@ Disables the floating-point and SIMD instructions on @samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a17}, @samp{cortex-a15.cortex-a7}, @samp{cortex-a17.cortex-a7}, @samp{cortex-a32}, @samp{cortex-a35}, -@samp{cortex-a53} and @samp{cortex-a55}. +@samp{cortex-a53},@samp{cortex-a55} and @samp{cortex-m55}. @item +nofp.dp Disables the double-precision component of the floating-point instructions |