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| author | Jan Hubicka <hubicka@ucw.cz> | 2018-01-02 10:31:47 +0100 |
|---|---|---|
| committer | Jan Hubicka <hubicka@gcc.gnu.org> | 2018-01-02 09:31:47 +0000 |
| commit | e8e3054e505a153e52aa3d8888bfc91610c006f7 (patch) | |
| tree | a418c46327a33dd1655e0e6232af87e8107c9035 /gcc/config | |
| parent | c1177db4fa8c12395a52bb11bb50df86cd371727 (diff) | |
| download | gcc-e8e3054e505a153e52aa3d8888bfc91610c006f7.zip gcc-e8e3054e505a153e52aa3d8888bfc91610c006f7.tar.gz gcc-e8e3054e505a153e52aa3d8888bfc91610c006f7.tar.bz2 | |
re PR target/81616 (Update -mtune=generic for the current Intel and AMD processors)
PR target/81616
* x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
cond_taken_branch_cost 3->4.
From-SVN: r256070
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/x86-tune-costs.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/config/i386/x86-tune-costs.h b/gcc/config/i386/x86-tune-costs.h index 477e478..eff7f7f 100644 --- a/gcc/config/i386/x86-tune-costs.h +++ b/gcc/config/i386/x86-tune-costs.h @@ -2293,10 +2293,10 @@ struct processor_costs generic_cost = { 3, /* Branch cost */ COSTS_N_INSNS (3), /* cost of FADD and FSUB insns. */ COSTS_N_INSNS (5), /* cost of FMUL instruction. */ - COSTS_N_INSNS (20), /* cost of FDIV instruction. */ + COSTS_N_INSNS (17), /* cost of FDIV instruction. */ COSTS_N_INSNS (1), /* cost of FABS instruction. */ COSTS_N_INSNS (1), /* cost of FCHS instruction. */ - COSTS_N_INSNS (20), /* cost of FSQRT instruction. */ + COSTS_N_INSNS (14), /* cost of FSQRT instruction. */ COSTS_N_INSNS (1), /* cost of cheap SSE instruction. */ COSTS_N_INSNS (3), /* cost of ADDSS/SD SUBSS/SD insns. */ @@ -2304,15 +2304,15 @@ struct processor_costs generic_cost = { COSTS_N_INSNS (5), /* cost of MULSD instruction. */ COSTS_N_INSNS (5), /* cost of FMA SS instruction. */ COSTS_N_INSNS (5), /* cost of FMA SD instruction. */ - COSTS_N_INSNS (18), /* cost of DIVSS instruction. */ - COSTS_N_INSNS (32), /* cost of DIVSD instruction. */ - COSTS_N_INSNS (30), /* cost of SQRTSS instruction. */ - COSTS_N_INSNS (58), /* cost of SQRTSD instruction. */ + COSTS_N_INSNS (13), /* cost of DIVSS instruction. */ + COSTS_N_INSNS (17), /* cost of DIVSD instruction. */ + COSTS_N_INSNS (14), /* cost of SQRTSS instruction. */ + COSTS_N_INSNS (18), /* cost of SQRTSD instruction. */ 1, 4, 3, 3, /* reassoc int, fp, vec_int, vec_fp. */ generic_memcpy, generic_memset, - COSTS_N_INSNS (3), /* cond_taken_branch_cost. */ - COSTS_N_INSNS (1), /* cond_not_taken_branch_cost. */ + COSTS_N_INSNS (4), /* cond_taken_branch_cost. */ + COSTS_N_INSNS (2), /* cond_not_taken_branch_cost. */ }; /* core_cost should produce code tuned for Core familly of CPUs. */ |