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authorKirill Yukhin <kirill.yukhin@intel.com>2013-08-23 07:33:00 +0000
committerKirill Yukhin <kyukhin@gcc.gnu.org>2013-08-23 07:33:00 +0000
commite500c62a863dc846792368cf7eda84cce8501a25 (patch)
treee834f3387f87e2ca2f390ee92c4ebd939466e136 /gcc/config
parent6b00d7dd17673acaf9a34f136345000d473ba6ba (diff)
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predicates.md (ext_sse_reg_operand): New.
* gcc/config/i386/predicates.md (ext_sse_reg_operand): New. * gcc/config/i386/i386.md (*movti_internal): Use predicate to determine if EVEX is needed. (*movsi_internal): Ditto. (*movdf_internal): Ditto. (*movsf_internal): Ditto. * gcc/config/i386/mmx.md (*mov<mode>_internal): Ditto. From-SVN: r201936
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/i386/i386.md20
-rw-r--r--gcc/config/i386/mmx.md5
-rw-r--r--gcc/config/i386/predicates.md6
3 files changed, 16 insertions, 15 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b55fd6f..3d7533a 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2059,9 +2059,8 @@
(cond [(eq_attr "alternative" "2")
(const_string "SI")
(eq_attr "alternative" "12,13")
- (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
- (and (match_test "REG_P (operands[1])")
- (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+ (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand"))
(const_string "XI")
(ior (not (match_test "TARGET_SSE2"))
(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
@@ -2192,9 +2191,8 @@
(cond [(eq_attr "alternative" "2,3")
(const_string "DI")
(eq_attr "alternative" "6,7")
- (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
- (and (match_test "REG_P (operands[1])")
- (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+ (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand"))
(const_string "XI")
(ior (not (match_test "TARGET_SSE2"))
(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
@@ -2923,9 +2921,8 @@
/* movaps is one byte shorter for non-AVX targets. */
(eq_attr "alternative" "10,14")
- (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
- (and (match_test "REG_P (operands[1])")
- (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+ (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand"))
(const_string "V8DF")
(ior (not (match_test "TARGET_SSE2"))
(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
@@ -3072,9 +3069,8 @@
better to maintain the whole registers in single format
to avoid problems on using packed logical operations. */
(eq_attr "alternative" "6")
- (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
- (and (match_test "REG_P (operands[1])")
- (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+ (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand"))
(const_string "V16SF")
(ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
(match_test "TARGET_SSE_SPLIT_REGS"))
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 681cdb7..17e2499 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -185,9 +185,8 @@
(cond [(eq_attr "alternative" "2")
(const_string "SI")
(eq_attr "alternative" "11,12,15,16")
- (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
- (and (match_test "REG_P (operands[1])")
- (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+ (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+ (match_operand 1 "ext_sse_reg_operand"))
(const_string "XI")
(match_test "<MODE>mode == V2SFmode")
(const_string "V4SF")
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index b64ef69..3959c38 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -47,6 +47,12 @@
(and (match_code "reg")
(match_test "SSE_REGNO_P (REGNO (op))")))
+;; True if the operand is an AVX-512 new register.
+(define_predicate "ext_sse_reg_operand"
+ (and (match_code "reg")
+ (match_test "EXT_REX_SSE_REGNO_P (REGNO (op))")))
+
+
;; True if the operand is a Q_REGS class register.
(define_predicate "q_regs_operand"
(match_operand 0 "register_operand")