arm: [MVE intrinsics] rework vldr gather_shifted_offset

Implement vldr?q_gather_shifted_offset using the new MVE builtins
framework.

gcc/ChangeLog:

	* config/arm/arm-builtins.cc (arm_ldrgu_qualifiers)
	(arm_ldrgs_qualifiers, arm_ldrgs_z_qualifiers)
	(arm_ldrgu_z_qualifiers): Delete.
	* config/arm/arm-mve-builtins-base.cc (vldrq_gather_impl): Add
	support for shifted version.
	(vldrdq_gather_shifted, vldrhq_gather_shifted)
	(vldrwq_gather_shifted): New.
	* config/arm/arm-mve-builtins-base.def (vldrdq_gather_shifted)
	(vldrhq_gather_shifted, vldrwq_gather_shifted): New.
	* config/arm/arm-mve-builtins-base.h (vldrdq_gather_shifted)
	(vldrhq_gather_shifted, vldrwq_gather_shifted): New.
	* config/arm/arm_mve.h (vldrhq_gather_shifted_offset): Delete.
	(vldrhq_gather_shifted_offset_z): Delete.
	(vldrdq_gather_shifted_offset): Delete.
	(vldrdq_gather_shifted_offset_z): Delete.
	(vldrwq_gather_shifted_offset): Delete.
	(vldrwq_gather_shifted_offset_z): Delete.
	(vldrhq_gather_shifted_offset_s32): Delete.
	(vldrhq_gather_shifted_offset_s16): Delete.
	(vldrhq_gather_shifted_offset_u32): Delete.
	(vldrhq_gather_shifted_offset_u16): Delete.
	(vldrhq_gather_shifted_offset_z_s32): Delete.
	(vldrhq_gather_shifted_offset_z_s16): Delete.
	(vldrhq_gather_shifted_offset_z_u32): Delete.
	(vldrhq_gather_shifted_offset_z_u16): Delete.
	(vldrdq_gather_shifted_offset_s64): Delete.
	(vldrdq_gather_shifted_offset_u64): Delete.
	(vldrdq_gather_shifted_offset_z_s64): Delete.
	(vldrdq_gather_shifted_offset_z_u64): Delete.
	(vldrhq_gather_shifted_offset_f16): Delete.
	(vldrhq_gather_shifted_offset_z_f16): Delete.
	(vldrwq_gather_shifted_offset_f32): Delete.
	(vldrwq_gather_shifted_offset_s32): Delete.
	(vldrwq_gather_shifted_offset_u32): Delete.
	(vldrwq_gather_shifted_offset_z_f32): Delete.
	(vldrwq_gather_shifted_offset_z_s32): Delete.
	(vldrwq_gather_shifted_offset_z_u32): Delete.
	(__arm_vldrhq_gather_shifted_offset_s32): Delete.
	(__arm_vldrhq_gather_shifted_offset_s16): Delete.
	(__arm_vldrhq_gather_shifted_offset_u32): Delete.
	(__arm_vldrhq_gather_shifted_offset_u16): Delete.
	(__arm_vldrhq_gather_shifted_offset_z_s32): Delete.
	(__arm_vldrhq_gather_shifted_offset_z_s16): Delete.
	(__arm_vldrhq_gather_shifted_offset_z_u32): Delete.
	(__arm_vldrhq_gather_shifted_offset_z_u16): Delete.
	(__arm_vldrdq_gather_shifted_offset_s64): Delete.
	(__arm_vldrdq_gather_shifted_offset_u64): Delete.
	(__arm_vldrdq_gather_shifted_offset_z_s64): Delete.
	(__arm_vldrdq_gather_shifted_offset_z_u64): Delete.
	(__arm_vldrwq_gather_shifted_offset_s32): Delete.
	(__arm_vldrwq_gather_shifted_offset_u32): Delete.
	(__arm_vldrwq_gather_shifted_offset_z_s32): Delete.
	(__arm_vldrwq_gather_shifted_offset_z_u32): Delete.
	(__arm_vldrhq_gather_shifted_offset_f16): Delete.
	(__arm_vldrhq_gather_shifted_offset_z_f16): Delete.
	(__arm_vldrwq_gather_shifted_offset_f32): Delete.
	(__arm_vldrwq_gather_shifted_offset_z_f32): Delete.
	(__arm_vldrhq_gather_shifted_offset): Delete.
	(__arm_vldrhq_gather_shifted_offset_z): Delete.
	(__arm_vldrdq_gather_shifted_offset): Delete.
	(__arm_vldrdq_gather_shifted_offset_z): Delete.
	(__arm_vldrwq_gather_shifted_offset): Delete.
	(__arm_vldrwq_gather_shifted_offset_z): Delete.
	* config/arm/arm_mve_builtins.def
	(vldrhq_gather_shifted_offset_z_u, vldrhq_gather_shifted_offset_u)
	(vldrhq_gather_shifted_offset_z_s, vldrhq_gather_shifted_offset_s)
	(vldrdq_gather_shifted_offset_s, vldrhq_gather_shifted_offset_f)
	(vldrwq_gather_shifted_offset_f, vldrwq_gather_shifted_offset_s)
	(vldrdq_gather_shifted_offset_z_s)
	(vldrhq_gather_shifted_offset_z_f)
	(vldrwq_gather_shifted_offset_z_f)
	(vldrwq_gather_shifted_offset_z_s, vldrdq_gather_shifted_offset_u)
	(vldrwq_gather_shifted_offset_u, vldrdq_gather_shifted_offset_z_u)
	(vldrwq_gather_shifted_offset_z_u): Delete.
	* config/arm/iterators.md (supf): Remove VLDRHQGSO_S, VLDRHQGSO_U,
	VLDRDQGSO_S, VLDRDQGSO_U, VLDRWQGSO_S, VLDRWQGSO_U.
	(VLDRHGSOQ, VLDRDGSOQ, VLDRWGSOQ): Delete.
	* config/arm/mve.md
	(mve_vldrhq_gather_shifted_offset_<supf><mode>): Delete.
	(mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Delete.
	(mve_vldrdq_gather_shifted_offset_<supf>v2di): Delete.
	(mve_vldrdq_gather_shifted_offset_z_<supf>v2di): Delete.
	(mve_vldrhq_gather_shifted_offset_fv8hf): Delete.
	(mve_vldrhq_gather_shifted_offset_z_fv8hf): Delete.
	(mve_vldrwq_gather_shifted_offset_fv4sf): Delete.
	(mve_vldrwq_gather_shifted_offset_<supf>v4si): Delete.
	(mve_vldrwq_gather_shifted_offset_z_fv4sf): Delete.
	(mve_vldrwq_gather_shifted_offset_z_<supf>v4si): Delete.
	(@mve_vldrq_gather_shifted_offset_<mode>): New.
	(@mve_vldrq_gather_shifted_offset_extend_v4si<US>): New.
	(@mve_vldrq_gather_shifted_offset_z_<mode>): New.
	(@mve_vldrq_gather_shifted_offset_z_extend_v4si<US>): New.
	* config/arm/unspecs.md (VLDRHQGSO_S, VLDRHQGSO_U, VLDRDQGSO_S)
	(VLDRDQGSO_U, VLDRHQGSO_F, VLDRWQGSO_F, VLDRWQGSO_S, VLDRWQGSO_U):
	Delete.
	(VLDRGSOQ, VLDRGSOQ_Z, VLDRGSOQ_EXT, VLDRGSOQ_EXT_Z): New.

9 files changed, 129 insertions, 653 deletions

diff --git a/gcc/config/arm/arm-builtins.cc b/gcc/config/arm/arm-builtins.cc
index e2a556d..80422ce 100644
--- a/gcc/config/arm/arm-builtins.cc
+++ b/gcc/config/arm/arm-builtins.cc
@@ -611,16 +611,6 @@ arm_quadop_unone_unone_unone_none_pred_qualifiers[SIMD_MAX_BUILTIN_ARGS]
   (arm_quadop_unone_unone_unone_none_pred_qualifiers)
 
 static enum arm_type_qualifiers
-arm_ldrgu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
-  = { qualifier_unsigned, qualifier_pointer, qualifier_unsigned};
-#define LDRGU_QUALIFIERS (arm_ldrgu_qualifiers)
-
-static enum arm_type_qualifiers
-arm_ldrgs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
-  = { qualifier_none, qualifier_pointer, qualifier_unsigned};
-#define LDRGS_QUALIFIERS (arm_ldrgs_qualifiers)
-
-static enum arm_type_qualifiers
 arm_ldrgbs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
   = { qualifier_none, qualifier_unsigned, qualifier_immediate};
 #define LDRGBS_QUALIFIERS (arm_ldrgbs_qualifiers)
@@ -643,18 +633,6 @@ arm_ldrgbu_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
 #define LDRGBU_Z_QUALIFIERS (arm_ldrgbu_z_qualifiers)
 
 static enum arm_type_qualifiers
-arm_ldrgs_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
-  = { qualifier_none, qualifier_pointer, qualifier_unsigned,
-      qualifier_predicate};
-#define LDRGS_Z_QUALIFIERS (arm_ldrgs_z_qualifiers)
-
-static enum arm_type_qualifiers
-arm_ldrgu_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]
-  = { qualifier_unsigned, qualifier_pointer, qualifier_unsigned,
-      qualifier_predicate};
-#define LDRGU_Z_QUALIFIERS (arm_ldrgu_z_qualifiers)
-
-static enum arm_type_qualifiers
 arm_ldrgbwbxu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
   = { qualifier_unsigned, qualifier_unsigned, qualifier_immediate};
 #define LDRGBWBXU_QUALIFIERS (arm_ldrgbwbxu_qualifiers)
diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc
index a4d498d..42843f1 100644
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -417,33 +417,56 @@ class vldrq_gather_impl : public load_extending
 public:
   using load_extending::load_extending;
 
+  CONSTEXPR vldrq_gather_impl (bool shifted,
+			       type_suffix_index signed_memory_type,
+			       type_suffix_index unsigned_memory_type,
+			       type_suffix_index float_memory_type)
+    : load_extending (signed_memory_type, unsigned_memory_type, float_memory_type),
+      m_shifted (shifted)
+  {}
+
+  CONSTEXPR vldrq_gather_impl (bool shifted,
+			       type_suffix_index signed_memory_type,
+			       type_suffix_index unsigned_memory_type)
+    : load_extending (signed_memory_type, unsigned_memory_type, NUM_TYPE_SUFFIXES),
+      m_shifted (shifted)
+  {}
+
+  /* Shifted offset (true) or plain offset (false).  */
+  bool m_shifted;
+
   rtx expand (function_expander &e) const override
   {
     insn_code icode;
+    machine_mode memory_mode = e.memory_vector_mode ();
+    rtx_code extend = (e.type_suffix (0).unsigned_p
+		       ? ZERO_EXTEND
+		       : SIGN_EXTEND);
+
     switch (e.pred)
       {
       case PRED_none:
-	if (e.vector_mode (0) == e.memory_vector_mode ())
-	  /* Non-extending load case.  */
-	  icode = code_for_mve_vldrq_gather_offset (e.vector_mode (0));
-	else
-	  /* Extending load case.  */
-	  icode = code_for_mve_vldrq_gather_offset_extend
-	    (e.memory_vector_mode (),
-	     e.type_suffix (0).unsigned_p
-	     ? ZERO_EXTEND
-	     : SIGN_EXTEND);
+	icode = (e.vector_mode (0) == memory_mode
+		 /* Non-extending load case.  */
+		 ? (m_shifted
+		    ? code_for_mve_vldrq_gather_shifted_offset (memory_mode)
+		    : code_for_mve_vldrq_gather_offset (memory_mode))
+		 /* Extending load case.  */
+		 : (m_shifted
+		    ? code_for_mve_vldrq_gather_shifted_offset_extend_v4si (extend)
+		    : code_for_mve_vldrq_gather_offset_extend (memory_mode,
+							       extend)));
 	break;
 
       case PRED_z:
-	if (e.vector_mode (0) == e.memory_vector_mode ())
-	  icode = code_for_mve_vldrq_gather_offset_z (e.vector_mode (0));
-	else
-	  icode = code_for_mve_vldrq_gather_offset_z_extend
-	    (e.memory_vector_mode (),
-	     e.type_suffix (0).unsigned_p
-	     ? ZERO_EXTEND
-	     : SIGN_EXTEND);
+	icode = (e.vector_mode (0) == memory_mode
+		 ? (m_shifted
+		    ? code_for_mve_vldrq_gather_shifted_offset_z (memory_mode)
+		    : code_for_mve_vldrq_gather_offset_z (memory_mode))
+		 : (m_shifted
+		    ? code_for_mve_vldrq_gather_shifted_offset_z_extend_v4si (extend)
+		    : code_for_mve_vldrq_gather_offset_z_extend (memory_mode,
+								 extend)));
 	break;
 
       default:
@@ -1251,12 +1274,15 @@ FUNCTION_WITH_M_N_NO_F (vhaddq, VHADDQ)
 FUNCTION_WITH_M_N_NO_F (vhsubq, VHSUBQ)
 FUNCTION (vld1q, vld1_impl,)
 FUNCTION (vldrbq, vldrq_impl, (TYPE_SUFFIX_s8, TYPE_SUFFIX_u8))
-FUNCTION (vldrbq_gather, vldrq_gather_impl, (TYPE_SUFFIX_s8, TYPE_SUFFIX_u8))
-FUNCTION (vldrdq_gather, vldrq_gather_impl, (TYPE_SUFFIX_s64, TYPE_SUFFIX_u64, NUM_TYPE_SUFFIXES))
+FUNCTION (vldrbq_gather, vldrq_gather_impl, (false, TYPE_SUFFIX_s8, TYPE_SUFFIX_u8))
+FUNCTION (vldrdq_gather, vldrq_gather_impl, (false, TYPE_SUFFIX_s64, TYPE_SUFFIX_u64, NUM_TYPE_SUFFIXES))
+FUNCTION (vldrdq_gather_shifted, vldrq_gather_impl, (true, TYPE_SUFFIX_s64, TYPE_SUFFIX_u64, NUM_TYPE_SUFFIXES))
 FUNCTION (vldrhq, vldrq_impl, (TYPE_SUFFIX_s16, TYPE_SUFFIX_u16, TYPE_SUFFIX_f16))
-FUNCTION (vldrhq_gather, vldrq_gather_impl, (TYPE_SUFFIX_s16, TYPE_SUFFIX_u16, TYPE_SUFFIX_f16))
+FUNCTION (vldrhq_gather, vldrq_gather_impl, (false, TYPE_SUFFIX_s16, TYPE_SUFFIX_u16, TYPE_SUFFIX_f16))
+FUNCTION (vldrhq_gather_shifted, vldrq_gather_impl, (true, TYPE_SUFFIX_s16, TYPE_SUFFIX_u16, TYPE_SUFFIX_f16))
 FUNCTION (vldrwq, vldrq_impl, (TYPE_SUFFIX_s32, TYPE_SUFFIX_u32, TYPE_SUFFIX_f32))
-FUNCTION (vldrwq_gather, vldrq_gather_impl, (TYPE_SUFFIX_s32, TYPE_SUFFIX_u32, TYPE_SUFFIX_f32))
+FUNCTION (vldrwq_gather, vldrq_gather_impl, (false, TYPE_SUFFIX_s32, TYPE_SUFFIX_u32, TYPE_SUFFIX_f32))
+FUNCTION (vldrwq_gather_shifted, vldrq_gather_impl, (true, TYPE_SUFFIX_s32, TYPE_SUFFIX_u32, TYPE_SUFFIX_f32))
 FUNCTION_PRED_P_S (vmaxavq, VMAXAVQ)
 FUNCTION_WITHOUT_N_NO_U_F (vmaxaq, VMAXAQ)
 FUNCTION_ONLY_F (vmaxnmaq, VMAXNMAQ)
diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def
index 5e30a27..ad2cc8b 100644
--- a/gcc/config/arm/arm-mve-builtins-base.def
+++ b/gcc/config/arm/arm-mve-builtins-base.def
@@ -62,10 +62,13 @@ DEF_MVE_FUNCTION (vld1q, load, all_integer, z_or_none)
 DEF_MVE_FUNCTION (vldrbq, load_ext, all_integer, z_or_none)
 DEF_MVE_FUNCTION (vldrbq_gather, load_ext_gather_offset, all_integer, z_or_none)
 DEF_MVE_FUNCTION (vldrdq_gather, load_ext_gather_offset, integer_64, z_or_none)
+DEF_MVE_FUNCTION (vldrdq_gather_shifted, load_ext_gather_offset, integer_64, z_or_none)
 DEF_MVE_FUNCTION (vldrhq, load_ext, integer_16_32, z_or_none)
 DEF_MVE_FUNCTION (vldrhq_gather, load_ext_gather_offset, integer_16_32, z_or_none)
+DEF_MVE_FUNCTION (vldrhq_gather_shifted, load_ext_gather_offset, integer_16_32, z_or_none)
 DEF_MVE_FUNCTION (vldrwq, load_ext, integer_32, z_or_none)
 DEF_MVE_FUNCTION (vldrwq_gather, load_ext_gather_offset, integer_32, z_or_none)
+DEF_MVE_FUNCTION (vldrwq_gather_shifted, load_ext_gather_offset, integer_32, z_or_none)
 DEF_MVE_FUNCTION (vmaxaq, binary_maxamina, all_signed, m_or_none)
 DEF_MVE_FUNCTION (vmaxavq, binary_maxavminav, all_signed, p_or_none)
 DEF_MVE_FUNCTION (vmaxq, binary, all_integer, mx_or_none)
@@ -231,8 +234,10 @@ DEF_MVE_FUNCTION (vfmsq, ternary, all_float, m_or_none)
 DEF_MVE_FUNCTION (vld1q, load, all_float, z_or_none)
 DEF_MVE_FUNCTION (vldrhq, load_ext, float_16, z_or_none)
 DEF_MVE_FUNCTION (vldrhq_gather, load_ext_gather_offset, float_16, z_or_none)
+DEF_MVE_FUNCTION (vldrhq_gather_shifted, load_ext_gather_offset, float_16, z_or_none)
 DEF_MVE_FUNCTION (vldrwq, load_ext, float_32, z_or_none)
 DEF_MVE_FUNCTION (vldrwq_gather, load_ext_gather_offset, float_32, z_or_none)
+DEF_MVE_FUNCTION (vldrwq_gather_shifted, load_ext_gather_offset, float_32, z_or_none)
 DEF_MVE_FUNCTION (vmaxnmaq, binary, all_float, m_or_none)
 DEF_MVE_FUNCTION (vmaxnmavq, binary_maxvminv, all_float, p_or_none)
 DEF_MVE_FUNCTION (vmaxnmq, binary, all_float, mx_or_none)
diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h
index 88fcff3..b45308a 100644
--- a/gcc/config/arm/arm-mve-builtins-base.h
+++ b/gcc/config/arm/arm-mve-builtins-base.h
@@ -85,10 +85,13 @@ extern const function_base *const vld1q;
 extern const function_base *const vldrbq;
 extern const function_base *const vldrbq_gather;
 extern const function_base *const vldrdq_gather;
+extern const function_base *const vldrdq_gather_shifted;
 extern const function_base *const vldrhq;
 extern const function_base *const vldrhq_gather;
+extern const function_base *const vldrhq_gather_shifted;
 extern const function_base *const vldrwq;
 extern const function_base *const vldrwq_gather;
+extern const function_base *const vldrwq_gather_shifted;
 extern const function_base *const vmaxaq;
 extern const function_base *const vmaxavq;
 extern const function_base *const vmaxnmaq;
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index b9df10d..24edfcd 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -46,12 +46,6 @@
 
 #ifndef __ARM_MVE_PRESERVE_USER_NAMESPACE
 #define vst4q(__addr, __value) __arm_vst4q(__addr, __value)
-#define vldrhq_gather_shifted_offset(__base, __offset) __arm_vldrhq_gather_shifted_offset(__base, __offset)
-#define vldrhq_gather_shifted_offset_z(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z(__base, __offset, __p)
-#define vldrdq_gather_shifted_offset(__base, __offset) __arm_vldrdq_gather_shifted_offset(__base, __offset)
-#define vldrdq_gather_shifted_offset_z(__base, __offset, __p) __arm_vldrdq_gather_shifted_offset_z(__base, __offset, __p)
-#define vldrwq_gather_shifted_offset(__base, __offset) __arm_vldrwq_gather_shifted_offset(__base, __offset)
-#define vldrwq_gather_shifted_offset_z(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z(__base, __offset, __p)
 #define vuninitializedq(__v) __arm_vuninitializedq(__v)
 #define vst2q(__addr, __value) __arm_vst2q(__addr, __value)
 #define vld2q(__addr) __arm_vld2q(__addr)
@@ -73,32 +67,12 @@
 #define vldrwq_gather_base_u32(__addr,  __offset) __arm_vldrwq_gather_base_u32(__addr,  __offset)
 #define vldrwq_gather_base_z_u32(__addr,  __offset, __p) __arm_vldrwq_gather_base_z_u32(__addr,  __offset, __p)
 #define vldrwq_gather_base_z_s32(__addr,  __offset, __p) __arm_vldrwq_gather_base_z_s32(__addr,  __offset, __p)
-#define vldrhq_gather_shifted_offset_s32(__base, __offset) __arm_vldrhq_gather_shifted_offset_s32(__base, __offset)
-#define vldrhq_gather_shifted_offset_s16(__base, __offset) __arm_vldrhq_gather_shifted_offset_s16(__base, __offset)
-#define vldrhq_gather_shifted_offset_u32(__base, __offset) __arm_vldrhq_gather_shifted_offset_u32(__base, __offset)
-#define vldrhq_gather_shifted_offset_u16(__base, __offset) __arm_vldrhq_gather_shifted_offset_u16(__base, __offset)
-#define vldrhq_gather_shifted_offset_z_s32(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_s32(__base, __offset, __p)
-#define vldrhq_gather_shifted_offset_z_s16(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_s16(__base, __offset, __p)
-#define vldrhq_gather_shifted_offset_z_u32(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_u32(__base, __offset, __p)
-#define vldrhq_gather_shifted_offset_z_u16(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_u16(__base, __offset, __p)
 #define vldrdq_gather_base_s64(__addr,  __offset) __arm_vldrdq_gather_base_s64(__addr,  __offset)
 #define vldrdq_gather_base_u64(__addr,  __offset) __arm_vldrdq_gather_base_u64(__addr,  __offset)
 #define vldrdq_gather_base_z_s64(__addr,  __offset, __p) __arm_vldrdq_gather_base_z_s64(__addr,  __offset, __p)
 #define vldrdq_gather_base_z_u64(__addr,  __offset, __p) __arm_vldrdq_gather_base_z_u64(__addr,  __offset, __p)
-#define vldrdq_gather_shifted_offset_s64(__base, __offset) __arm_vldrdq_gather_shifted_offset_s64(__base, __offset)
-#define vldrdq_gather_shifted_offset_u64(__base, __offset) __arm_vldrdq_gather_shifted_offset_u64(__base, __offset)
-#define vldrdq_gather_shifted_offset_z_s64(__base, __offset, __p) __arm_vldrdq_gather_shifted_offset_z_s64(__base, __offset, __p)
-#define vldrdq_gather_shifted_offset_z_u64(__base, __offset, __p) __arm_vldrdq_gather_shifted_offset_z_u64(__base, __offset, __p)
-#define vldrhq_gather_shifted_offset_f16(__base, __offset) __arm_vldrhq_gather_shifted_offset_f16(__base, __offset)
-#define vldrhq_gather_shifted_offset_z_f16(__base, __offset, __p) __arm_vldrhq_gather_shifted_offset_z_f16(__base, __offset, __p)
 #define vldrwq_gather_base_f32(__addr,  __offset) __arm_vldrwq_gather_base_f32(__addr,  __offset)
 #define vldrwq_gather_base_z_f32(__addr,  __offset, __p) __arm_vldrwq_gather_base_z_f32(__addr,  __offset, __p)
-#define vldrwq_gather_shifted_offset_f32(__base, __offset) __arm_vldrwq_gather_shifted_offset_f32(__base, __offset)
-#define vldrwq_gather_shifted_offset_s32(__base, __offset) __arm_vldrwq_gather_shifted_offset_s32(__base, __offset)
-#define vldrwq_gather_shifted_offset_u32(__base, __offset) __arm_vldrwq_gather_shifted_offset_u32(__base, __offset)
-#define vldrwq_gather_shifted_offset_z_f32(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z_f32(__base, __offset, __p)
-#define vldrwq_gather_shifted_offset_z_s32(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z_s32(__base, __offset, __p)
-#define vldrwq_gather_shifted_offset_z_u32(__base, __offset, __p) __arm_vldrwq_gather_shifted_offset_z_u32(__base, __offset, __p)
 #define vuninitializedq_u8(void) __arm_vuninitializedq_u8(void)
 #define vuninitializedq_u16(void) __arm_vuninitializedq_u16(void)
 #define vuninitializedq_u32(void) __arm_vuninitializedq_u32(void)
@@ -282,62 +256,6 @@ __arm_vldrwq_gather_base_z_u32 (uint32x4_t __addr, const int __offset, mve_pred1
   return __builtin_mve_vldrwq_gather_base_z_uv4si (__addr, __offset, __p);
 }
 
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_s32 (int16_t const * __base, uint32x4_t __offset)
-{
-  return __builtin_mve_vldrhq_gather_shifted_offset_sv4si ((__builtin_neon_hi *) __base, __offset);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_s16 (int16_t const * __base, uint16x8_t __offset)
-{
-  return __builtin_mve_vldrhq_gather_shifted_offset_sv8hi ((__builtin_neon_hi *) __base, __offset);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_u32 (uint16_t const * __base, uint32x4_t __offset)
-{
-  return __builtin_mve_vldrhq_gather_shifted_offset_uv4si ((__builtin_neon_hi *) __base, __offset);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_u16 (uint16_t const * __base, uint16x8_t __offset)
-{
-  return __builtin_mve_vldrhq_gather_shifted_offset_uv8hi ((__builtin_neon_hi *) __base, __offset);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_z_s32 (int16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
-{
-  return __builtin_mve_vldrhq_gather_shifted_offset_z_sv4si ((__builtin_neon_hi *) __base, __offset, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_z_s16 (int16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
-{
-  return __builtin_mve_vldrhq_gather_shifted_offset_z_sv8hi ((__builtin_neon_hi *) __base, __offset, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_z_u32 (uint16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
-{
-  return __builtin_mve_vldrhq_gather_shifted_offset_z_uv4si ((__builtin_neon_hi *) __base, __offset, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_z_u16 (uint16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
-{
-  return __builtin_mve_vldrhq_gather_shifted_offset_z_uv8hi ((__builtin_neon_hi *) __base, __offset, __p);
-}
-
 __extension__ extern __inline int64x2_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vldrdq_gather_base_s64 (uint64x2_t __addr, const int __offset)
@@ -368,62 +286,6 @@ __arm_vldrdq_gather_base_z_u64 (uint64x2_t __addr, const int __offset, mve_pred1
 
 __extension__ extern __inline int64x2_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrdq_gather_shifted_offset_s64 (int64_t const * __base, uint64x2_t __offset)
-{
-  return __builtin_mve_vldrdq_gather_shifted_offset_sv2di ((__builtin_neon_di *) __base, __offset);
-}
-
-__extension__ extern __inline uint64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrdq_gather_shifted_offset_u64 (uint64_t const * __base, uint64x2_t __offset)
-{
-  return __builtin_mve_vldrdq_gather_shifted_offset_uv2di ((__builtin_neon_di *) __base, __offset);
-}
-
-__extension__ extern __inline int64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrdq_gather_shifted_offset_z_s64 (int64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
-{
-  return __builtin_mve_vldrdq_gather_shifted_offset_z_sv2di ((__builtin_neon_di *) __base, __offset, __p);
-}
-
-__extension__ extern __inline uint64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrdq_gather_shifted_offset_z_u64 (uint64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
-{
-  return __builtin_mve_vldrdq_gather_shifted_offset_z_uv2di ((__builtin_neon_di *) __base, __offset, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset_s32 (int32_t const * __base, uint32x4_t __offset)
-{
-  return __builtin_mve_vldrwq_gather_shifted_offset_sv4si ((__builtin_neon_si *) __base, __offset);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset_u32 (uint32_t const * __base, uint32x4_t __offset)
-{
-  return __builtin_mve_vldrwq_gather_shifted_offset_uv4si ((__builtin_neon_si *) __base, __offset);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset_z_s32 (int32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
-{
-  return __builtin_mve_vldrwq_gather_shifted_offset_z_sv4si ((__builtin_neon_si *) __base, __offset, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset_z_u32 (uint32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
-{
-  return __builtin_mve_vldrwq_gather_shifted_offset_z_uv4si ((__builtin_neon_si *) __base, __offset, __p);
-}
-
-__extension__ extern __inline int64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vldrdq_gather_base_wb_s64 (uint64x2_t * __addr, const int __offset)
 {
   int64x2_t
@@ -932,20 +794,6 @@ __arm_vst4q_f32 (float32_t * __addr, float32x4x4_t __value)
   __builtin_mve_vst4qv4sf (__addr, __rv.__o);
 }
 
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_f16 (float16_t const * __base, uint16x8_t __offset)
-{
-  return __builtin_mve_vldrhq_gather_shifted_offset_fv8hf ((__builtin_neon_hi *) __base, __offset);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_z_f16 (float16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
-{
-  return __builtin_mve_vldrhq_gather_shifted_offset_z_fv8hf ((__builtin_neon_hi *) __base, __offset, __p);
-}
-
 __extension__ extern __inline float32x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vldrwq_gather_base_f32 (uint32x4_t __addr, const int __offset)
@@ -962,20 +810,6 @@ __arm_vldrwq_gather_base_z_f32 (uint32x4_t __addr, const int __offset, mve_pred1
 
 __extension__ extern __inline float32x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset_f32 (float32_t const * __base, uint32x4_t __offset)
-{
-  return __builtin_mve_vldrwq_gather_shifted_offset_fv4sf ((__builtin_neon_si *) __base, __offset);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset_z_f32 (float32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
-{
-  return __builtin_mve_vldrwq_gather_shifted_offset_z_fv4sf ((__builtin_neon_si *) __base, __offset, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vldrwq_gather_base_wb_f32 (uint32x4_t * __addr, const int __offset)
 {
   float32x4_t
@@ -1126,118 +960,6 @@ __arm_vst4q (uint32_t * __addr, uint32x4x4_t __value)
  __arm_vst4q_u32 (__addr, __value);
 }
 
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset (int16_t const * __base, uint32x4_t __offset)
-{
- return __arm_vldrhq_gather_shifted_offset_s32 (__base, __offset);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset (int16_t const * __base, uint16x8_t __offset)
-{
- return __arm_vldrhq_gather_shifted_offset_s16 (__base, __offset);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset (uint16_t const * __base, uint32x4_t __offset)
-{
- return __arm_vldrhq_gather_shifted_offset_u32 (__base, __offset);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset (uint16_t const * __base, uint16x8_t __offset)
-{
- return __arm_vldrhq_gather_shifted_offset_u16 (__base, __offset);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_z (int16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
-{
- return __arm_vldrhq_gather_shifted_offset_z_s32 (__base, __offset, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_z (int16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
-{
- return __arm_vldrhq_gather_shifted_offset_z_s16 (__base, __offset, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_z (uint16_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
-{
- return __arm_vldrhq_gather_shifted_offset_z_u32 (__base, __offset, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_z (uint16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
-{
- return __arm_vldrhq_gather_shifted_offset_z_u16 (__base, __offset, __p);
-}
-
-__extension__ extern __inline int64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrdq_gather_shifted_offset (int64_t const * __base, uint64x2_t __offset)
-{
- return __arm_vldrdq_gather_shifted_offset_s64 (__base, __offset);
-}
-
-__extension__ extern __inline uint64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrdq_gather_shifted_offset (uint64_t const * __base, uint64x2_t __offset)
-{
- return __arm_vldrdq_gather_shifted_offset_u64 (__base, __offset);
-}
-
-__extension__ extern __inline int64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrdq_gather_shifted_offset_z (int64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
-{
- return __arm_vldrdq_gather_shifted_offset_z_s64 (__base, __offset, __p);
-}
-
-__extension__ extern __inline uint64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrdq_gather_shifted_offset_z (uint64_t const * __base, uint64x2_t __offset, mve_pred16_t __p)
-{
- return __arm_vldrdq_gather_shifted_offset_z_u64 (__base, __offset, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset (int32_t const * __base, uint32x4_t __offset)
-{
- return __arm_vldrwq_gather_shifted_offset_s32 (__base, __offset);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset (uint32_t const * __base, uint32x4_t __offset)
-{
- return __arm_vldrwq_gather_shifted_offset_u32 (__base, __offset);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset_z (int32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
-{
- return __arm_vldrwq_gather_shifted_offset_z_s32 (__base, __offset, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset_z (uint32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
-{
- return __arm_vldrwq_gather_shifted_offset_z_u32 (__base, __offset, __p);
-}
-
 __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vst2q (int8_t * __addr, int8x16x2_t __value)
@@ -1492,34 +1214,6 @@ __arm_vst4q (float32_t * __addr, float32x4x4_t __value)
  __arm_vst4q_f32 (__addr, __value);
 }
 
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset (float16_t const * __base, uint16x8_t __offset)
-{
- return __arm_vldrhq_gather_shifted_offset_f16 (__base, __offset);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrhq_gather_shifted_offset_z (float16_t const * __base, uint16x8_t __offset, mve_pred16_t __p)
-{
- return __arm_vldrhq_gather_shifted_offset_z_f16 (__base, __offset, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset (float32_t const * __base, uint32x4_t __offset)
-{
- return __arm_vldrwq_gather_shifted_offset_f32 (__base, __offset);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vldrwq_gather_shifted_offset_z (float32_t const * __base, uint32x4_t __offset, mve_pred16_t __p)
-{
- return __arm_vldrwq_gather_shifted_offset_z_f32 (__base, __offset, __p);
-}
-
 __extension__ extern __inline float16x8x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vld4q (float16_t const * __addr)
@@ -1935,34 +1629,6 @@ extern void *__ARM_undef;
   int (*)[__ARM_mve_type_float16_t_ptr]: __arm_vld4q_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *)), \
   int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vld4q_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *))))
 
-#define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
-  _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
-  int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
-  int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
-  int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
-  int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t)));})
-
-#define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
-  _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
-  int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
-  int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_f16 (__ARM_mve_coerce_f16_ptr(p0, float16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
-
-#define __arm_vldrwq_gather_shifted_offset(p0,p1) ( \
-  _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
-  int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1), \
-  int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1), \
-  int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1)))
-
-#define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ( \
-  _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
-  int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(p0, int32_t *), p1, p2), \
-  int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), p1, p2), \
-  int (*)[__ARM_mve_type_float32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_f32 (__ARM_mve_coerce_f32_ptr(p0, float32_t *), p1, p2)))
-
 #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
@@ -2025,30 +1691,6 @@ extern void *__ARM_undef;
   int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
   int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce_u32_ptr(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));})
 
-#define __arm_vldrhq_gather_shifted_offset(p0,p1) ({ __typeof(p1) __p1 = (p1); \
-  _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
-  int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t)), \
-  int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t)), \
-  int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t)));})
-
-#define __arm_vldrhq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p1) __p1 = (p1); \
-  _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_s16 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_int16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s16_ptr(p0, int16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
-  int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8_t]: __arm_vldrhq_gather_shifted_offset_z_u16 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint32x4_t]: __arm_vldrhq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u16_ptr(p0, uint16_t *), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
-#define __arm_vldrwq_gather_shifted_offset(p0,p1) ({ __typeof(p0) __p0 = (p0); \
-  _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
-  int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1), \
-  int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1));})
-
-#define __arm_vldrwq_gather_shifted_offset_z(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
-  _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
-  int (*)[__ARM_mve_type_int32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_s32 (__ARM_mve_coerce_s32_ptr(__p0, int32_t *), p1, p2), \
-  int (*)[__ARM_mve_type_uint32_t_ptr]: __arm_vldrwq_gather_shifted_offset_z_u32 (__ARM_mve_coerce_u32_ptr(__p0, uint32_t *), p1, p2));})
-
 #define __arm_vst2q(p0,p1) ({ __typeof(p1) __p1 = (p1); \
   _Generic( (int (*)[__ARM_mve_typeid(p0)][__ARM_mve_typeid(__p1)])0, \
   int (*)[__ARM_mve_type_int8_t_ptr][__ARM_mve_type_int8x16x2_t]: __arm_vst2q_s8 (__ARM_mve_coerce_s8_ptr(p0, int8_t *), __ARM_mve_coerce(__p1, int8x16x2_t)), \
@@ -2112,14 +1754,6 @@ extern void *__ARM_undef;
 
 #endif /* MVE Integer.  */
 
-#define __arm_vldrdq_gather_shifted_offset(p0,p1) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
-  int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1), \
-  int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1)))
-
-#define __arm_vldrdq_gather_shifted_offset_z(p0,p1,p2) ( _Generic( (int (*)[__ARM_mve_typeid(p0)])0, \
-  int (*)[__ARM_mve_type_int64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_s64 (__ARM_mve_coerce_s64_ptr(p0, int64_t *), p1, p2), \
-  int (*)[__ARM_mve_type_uint64_t_ptr]: __arm_vldrdq_gather_shifted_offset_z_u64 (__ARM_mve_coerce_u64_ptr(p0, uint64_t *), p1, p2)))
-
 #endif /* __cplusplus  */
 #endif /* __ARM_FEATURE_MVE  */
 #endif /* _GCC_ARM_MVE_H.  */
diff --git a/gcc/config/arm/arm_mve_builtins.def b/gcc/config/arm/arm_mve_builtins.def
index 5f328f5..5f85946 100644
--- a/gcc/config/arm/arm_mve_builtins.def
+++ b/gcc/config/arm/arm_mve_builtins.def
@@ -667,28 +667,12 @@ VAR1 (LDRGBS, vldrwq_gather_base_s, v4si)
 VAR1 (LDRGBU, vldrwq_gather_base_u, v4si)
 VAR1 (LDRGBS_Z, vldrwq_gather_base_z_s, v4si)
 VAR1 (LDRGBU_Z, vldrwq_gather_base_z_u, v4si)
-VAR2 (LDRGU_Z, vldrhq_gather_shifted_offset_z_u, v8hi, v4si)
-VAR2 (LDRGU, vldrhq_gather_shifted_offset_u, v8hi, v4si)
-VAR2 (LDRGS_Z, vldrhq_gather_shifted_offset_z_s, v8hi, v4si)
-VAR2 (LDRGS, vldrhq_gather_shifted_offset_s, v8hi, v4si)
 VAR1 (LDRGBS, vldrdq_gather_base_s, v2di)
 VAR1 (LDRGBS, vldrwq_gather_base_f, v4sf)
 VAR1 (LDRGBS_Z, vldrdq_gather_base_z_s, v2di)
 VAR1 (LDRGBS_Z, vldrwq_gather_base_z_f, v4sf)
 VAR1 (LDRGBU, vldrdq_gather_base_u, v2di)
 VAR1 (LDRGBU_Z, vldrdq_gather_base_z_u, v2di)
-VAR1 (LDRGS, vldrdq_gather_shifted_offset_s, v2di)
-VAR1 (LDRGS, vldrhq_gather_shifted_offset_f, v8hf)
-VAR1 (LDRGS, vldrwq_gather_shifted_offset_f, v4sf)
-VAR1 (LDRGS, vldrwq_gather_shifted_offset_s, v4si)
-VAR1 (LDRGS_Z, vldrdq_gather_shifted_offset_z_s, v2di)
-VAR1 (LDRGS_Z, vldrhq_gather_shifted_offset_z_f, v8hf)
-VAR1 (LDRGS_Z, vldrwq_gather_shifted_offset_z_f, v4sf)
-VAR1 (LDRGS_Z, vldrwq_gather_shifted_offset_z_s, v4si)
-VAR1 (LDRGU, vldrdq_gather_shifted_offset_u, v2di)
-VAR1 (LDRGU, vldrwq_gather_shifted_offset_u, v4si)
-VAR1 (LDRGU_Z, vldrdq_gather_shifted_offset_z_u, v2di)
-VAR1 (LDRGU_Z, vldrwq_gather_shifted_offset_z_u, v4si)
 VAR1 (LDRGBWBU_Z, vldrwq_gather_base_nowb_z_u, v4si)
 VAR1 (LDRGBWBU_Z, vldrdq_gather_base_nowb_z_u, v2di)
 VAR1 (LDRGBWBU, vldrwq_gather_base_nowb_u, v4si)
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 4c0aac5..b0e6a79 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -2539,11 +2539,7 @@
 		       (VMLALDAVAQ_P_S "s") (VMLALDAVAQ_P_U "u")
 		       (VLDRWQGB_S "s")
 		       (VLDRWQGB_U "u")
-		       (VLDRHQGSO_S "s") (VLDRHQGSO_U "u")
 		       (VLDRDQGB_S "s") (VLDRDQGB_U "u")
-		       (VLDRDQGSO_S "s")
-		       (VLDRDQGSO_U "u")
-		       (VLDRWQGSO_S "s") (VLDRWQGSO_U "u")
 		       (VSTRDQSB_S "s") (VSTRDQSB_U "u")
 		       (VLDRWQGBWB_S "s") (VLDRWQGBWB_U "u") (VLDRDQGBWB_S "s")
 		       (VLDRDQGBWB_U "u") (VADCQ_M_S "s")
@@ -2946,10 +2942,7 @@
 (define_int_iterator VSHRNBQ_M_N [VSHRNBQ_M_N_S VSHRNBQ_M_N_U])
 (define_int_iterator VSHRNTQ_M_N [VSHRNTQ_M_N_S VSHRNTQ_M_N_U])
 (define_int_iterator VLDRWGBQ [VLDRWQGB_S VLDRWQGB_U])
-(define_int_iterator VLDRHGSOQ [VLDRHQGSO_S VLDRHQGSO_U])
 (define_int_iterator VLDRDGBQ [VLDRDQGB_S VLDRDQGB_U])
-(define_int_iterator VLDRDGSOQ [VLDRDQGSO_S VLDRDQGSO_U])
-(define_int_iterator VLDRWGSOQ [VLDRWQGSO_S VLDRWQGSO_U])
 (define_int_iterator VLDRWGBWBQ [VLDRWQGBWB_S VLDRWQGBWB_U])
 (define_int_iterator VLDRDGBWBQ [VLDRDQGBWB_S VLDRDQGBWB_U])
 (define_int_iterator VxCIQ [VADCIQ_U VADCIQ_S VSBCIQ_U VSBCIQ_S])
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index b437fc9..4158d5e 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -3566,56 +3566,88 @@
  [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrwq_gather_base_<supf>v4si"))
   (set_attr "length" "8")])
 
+;; Gather loads with shifted offset
+;;
+;; [vldrhq_gather_shifted_offset_s vldrhq_gather_shifted_offset_u]
+;; [vldrhq_gather_shifted_offset_f]
+;; [vldrwq_gather_shifted_offset_s vldrwq_gather_shifted_offset_u]
+;; [vldrwq_gather_shifted_offset_f]
+;; [vldrdq_gather_shifted_offset_s vldrdq_gather_shifted_offset_u]
+;;
+(define_insn "@mve_vldrq_gather_shifted_offset_<mode>"
+  [(set (match_operand:MVE_VLD_ST_scatter_shifted 0 "s_register_operand" "=&w")
+	(unspec:MVE_VLD_ST_scatter_shifted
+		[(match_operand:SI 1 "register_operand" "r")
+		 (match_operand:<MVE_scatter_offset> 2 "s_register_operand" "w")
+		 (mem:BLK (scratch))]
+	VLDRGSOQ))
+  ]
+  "(TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
+   || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode))"
+  "vldr<MVE_elem_ch>.<MVE_u_elem>\t%q0, [%1, %q2, uxtw #<MVE_scatter_shift>]"
+ [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrq_gather_shifted_offset_<mode>"))
+  (set_attr "length" "4")])
+
+;; Extending gather loads with shifted offset
 ;;
 ;; [vldrhq_gather_shifted_offset_s vldrhq_gather_shifted_offset_u]
 ;;
-(define_insn "mve_vldrhq_gather_shifted_offset_<supf><mode>"
-  [(set (match_operand:MVE_5 0 "s_register_operand" "=&w")
-	(unspec:MVE_5 [(match_operand:<MVE_H_ELEM> 1 "memory_operand" "Us")
-		       (match_operand:MVE_5 2 "s_register_operand" "w")]
-	VLDRHGSOQ))
+(define_insn "@mve_vldrq_gather_shifted_offset_extend_v4si<US>"
+  [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
+	(SE:V4SI
+	  (unspec:V4HI
+	    [(match_operand:SI 1 "register_operand" "r")
+	     (match_operand:V4SI 2 "s_register_operand" "w")
+	     (mem:BLK (scratch))]
+	   VLDRGSOQ_EXT)))
   ]
   "TARGET_HAVE_MVE"
-{
-   rtx ops[3];
-   ops[0] = operands[0];
-   ops[1] = operands[1];
-   ops[2] = operands[2];
-      if (!strcmp ("<supf>","s") && <V_sz_elem> == 16)
-     output_asm_insn ("vldrh.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
-   else
-     output_asm_insn ("vldrh.<supf><V_sz_elem>\t%q0, [%m1, %q2, uxtw #1]",ops);
-   return "";
-}
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrhq_gather_shifted_offset_<supf><mode>"))
+  "vldrh.<US>32\t%q0, [%1, %q2, uxtw #1]"
+ [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrq_gather_shifted_offset_extend_v4si<US>"))
   (set_attr "length" "4")])
 
+;; Predicated gather loads with shifted offset
 ;;
 ;; [vldrhq_gather_shifted_offset_z_s vldrhq_gather_shited_offset_z_u]
+;; [vldrhq_gather_shifted_offset_z_f]
+;; [vldrwq_gather_shifted_offset_z_s vldrwq_gather_shifted_offset_z_u]
+;; [vldrwq_gather_shifted_offset_z_f]
+;; [vldrdq_gather_shifted_offset_z_s vldrdq_gather_shifted_offset_z_u]
 ;;
-(define_insn "mve_vldrhq_gather_shifted_offset_z_<supf><mode>"
-  [(set (match_operand:MVE_5 0 "s_register_operand" "=&w")
-	(unspec:MVE_5 [(match_operand:<MVE_H_ELEM> 1 "memory_operand" "Us")
-		       (match_operand:MVE_5 2 "s_register_operand" "w")
-		       (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")
-	]VLDRHGSOQ))
+(define_insn "@mve_vldrq_gather_shifted_offset_z_<mode>"
+  [(set (match_operand:MVE_VLD_ST_scatter_shifted 0 "s_register_operand" "=&w")
+	(unspec:MVE_VLD_ST_scatter_shifted
+		[(match_operand:SI 1 "register_operand" "r")
+		 (match_operand:<MVE_scatter_offset> 2 "s_register_operand" "w")
+		 (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")
+		 (mem:BLK (scratch))]
+	VLDRGSOQ_Z))
   ]
-  "TARGET_HAVE_MVE"
-{
-   rtx ops[4];
-   ops[0] = operands[0];
-   ops[1] = operands[1];
-   ops[2] = operands[2];
-   ops[3] = operands[3];
-   if (!strcmp ("<supf>","s") && <V_sz_elem> == 16)
-     output_asm_insn ("vpst\n\tvldrht.u16\t%q0, [%m1, %q2, uxtw #1]",ops);
-   else
-     output_asm_insn ("vpst\n\tvldrht.<supf><V_sz_elem>\t%q0, [%m1, %q2, uxtw #1]",ops);
-   return "";
-}
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrhq_gather_shifted_offset_<supf><mode>"))
+  "(TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
+   || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode))"
+  "vpst\n\tvldr<MVE_elem_ch>t.<MVE_u_elem>\t%q0, [%1, %q2, uxtw #<MVE_scatter_shift>]"
+ [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrq_gather_shifted_offset_<mode>"))
   (set_attr "length" "8")])
 
+;; Predicated extending gather loads with shifted offset
+;;
+;; [vldrhq_gather_shifted_offset_z_s vldrhq_gather_shifted_offset_z_u]
+;;
+(define_insn "@mve_vldrq_gather_shifted_offset_z_extend_v4si<US>"
+  [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
+	(SE:V4SI
+	  (unspec:V4HI
+	    [(match_operand:SI 1 "register_operand" "r")
+	     (match_operand:V4SI 2 "s_register_operand" "w")
+	     (match_operand:V4BI 3 "vpr_register_operand" "Up")
+	     (mem:BLK (scratch))]
+	   VLDRGSOQ_EXT_Z)))
+  ]
+  "TARGET_HAVE_MVE"
+  "vpst\n\tvldrht.<US>32\t%q0, [%1, %q2, uxtw #1]"
+ [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrq_gather_shifted_offset_extend_v4si<US>"))
+  (set_attr "length" "4")])
+
 ;;
 ;; [vldrdq_gather_base_s vldrdq_gather_base_u]
 ;;
@@ -3660,93 +3692,6 @@
   (set_attr "length" "8")])
 
 ;;
-;; [vldrdq_gather_shifted_offset_s vldrdq_gather_shifted_offset_u]
-;;
-(define_insn "mve_vldrdq_gather_shifted_offset_<supf>v2di"
-  [(set (match_operand:V2DI 0 "s_register_operand" "=&w")
-	(unspec:V2DI [(match_operand:V2DI 1 "memory_operand" "Us")
-		      (match_operand:V2DI 2 "s_register_operand" "w")]
-	 VLDRDGSOQ))
-  ]
-  "TARGET_HAVE_MVE"
-{
-   rtx ops[3];
-   ops[0] = operands[0];
-   ops[1] = operands[1];
-   ops[2] = operands[2];
-   output_asm_insn ("vldrd.u64\t%q0, [%m1, %q2, uxtw #3]",ops);
-   return "";
-}
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrdq_gather_shifted_offset_<supf>v2di"))
-  (set_attr "length" "4")])
-
-;;
-;; [vldrdq_gather_shifted_offset_z_s vldrdq_gather_shifted_offset_z_u]
-;;
-(define_insn "mve_vldrdq_gather_shifted_offset_z_<supf>v2di"
-  [(set (match_operand:V2DI 0 "s_register_operand" "=&w")
-	(unspec:V2DI [(match_operand:V2DI 1 "memory_operand" "Us")
-		      (match_operand:V2DI 2 "s_register_operand" "w")
-		      (match_operand:V2QI 3 "vpr_register_operand" "Up")]
-	 VLDRDGSOQ))
-  ]
-  "TARGET_HAVE_MVE"
-{
-   rtx ops[3];
-   ops[0] = operands[0];
-   ops[1] = operands[1];
-   ops[2] = operands[2];
-   output_asm_insn ("vpst\n\tvldrdt.u64\t%q0, [%m1, %q2, uxtw #3]",ops);
-   return "";
-}
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrdq_gather_shifted_offset_<supf>v2di"))
-  (set_attr "length" "8")])
-
-;;
-;; [vldrhq_gather_shifted_offset_f]
-;;
-(define_insn "mve_vldrhq_gather_shifted_offset_fv8hf"
-  [(set (match_operand:V8HF 0 "s_register_operand" "=&w")
-	(unspec:V8HF [(match_operand:V8HI 1 "memory_operand" "Us")
-		      (match_operand:V8HI 2 "s_register_operand" "w")]
-	 VLDRHQGSO_F))
-  ]
-  "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-{
-   rtx ops[3];
-   ops[0] = operands[0];
-   ops[1] = operands[1];
-   ops[2] = operands[2];
-   output_asm_insn ("vldrh.f16\t%q0, [%m1, %q2, uxtw #1]",ops);
-   return "";
-}
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrhq_gather_shifted_offset_fv8hf"))
-  (set_attr "length" "4")])
-
-;;
-;; [vldrhq_gather_shifted_offset_z_f]
-;;
-(define_insn "mve_vldrhq_gather_shifted_offset_z_fv8hf"
-  [(set (match_operand:V8HF 0 "s_register_operand" "=&w")
-	(unspec:V8HF [(match_operand:V8HI 1 "memory_operand" "Us")
-		      (match_operand:V8HI 2 "s_register_operand" "w")
-		      (match_operand:V8BI 3 "vpr_register_operand" "Up")]
-	 VLDRHQGSO_F))
-  ]
-  "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-{
-   rtx ops[4];
-   ops[0] = operands[0];
-   ops[1] = operands[1];
-   ops[2] = operands[2];
-   ops[3] = operands[3];
-   output_asm_insn ("vpst\n\tvldrht.f16\t%q0, [%m1, %q2, uxtw #1]",ops);
-   return "";
-}
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrhq_gather_shifted_offset_fv8hf"))
-  (set_attr "length" "8")])
-
-;;
 ;; [vldrwq_gather_base_f]
 ;;
 (define_insn "mve_vldrwq_gather_base_fv4sf"
@@ -3789,94 +3734,6 @@
  [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrwq_gather_base_fv4sf"))
   (set_attr "length" "8")])
 
-;;
-;; [vldrwq_gather_shifted_offset_f]
-;;
-(define_insn "mve_vldrwq_gather_shifted_offset_fv4sf"
-  [(set (match_operand:V4SF 0 "s_register_operand" "=&w")
-	(unspec:V4SF [(match_operand:V4SI 1 "memory_operand" "Us")
-		      (match_operand:V4SI 2 "s_register_operand" "w")]
-	 VLDRWQGSO_F))
-  ]
-  "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-{
-   rtx ops[3];
-   ops[0] = operands[0];
-   ops[1] = operands[1];
-   ops[2] = operands[2];
-   output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
-   return "";
-}
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrwq_gather_shifted_offset_fv4sf"))
-  (set_attr "length" "4")])
-
-;;
-;; [vldrwq_gather_shifted_offset_s vldrwq_gather_shifted_offset_u]
-;;
-(define_insn "mve_vldrwq_gather_shifted_offset_<supf>v4si"
-  [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
-	(unspec:V4SI [(match_operand:V4SI 1 "memory_operand" "Us")
-		      (match_operand:V4SI 2 "s_register_operand" "w")]
-	 VLDRWGSOQ))
-  ]
-  "TARGET_HAVE_MVE"
-{
-   rtx ops[3];
-   ops[0] = operands[0];
-   ops[1] = operands[1];
-   ops[2] = operands[2];
-   output_asm_insn ("vldrw.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
-   return "";
-}
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrwq_gather_shifted_offset_<supf>v4si"))
-  (set_attr "length" "4")])
-
-;;
-;; [vldrwq_gather_shifted_offset_z_f]
-;;
-(define_insn "mve_vldrwq_gather_shifted_offset_z_fv4sf"
-  [(set (match_operand:V4SF 0 "s_register_operand" "=&w")
-	(unspec:V4SF [(match_operand:V4SI 1 "memory_operand" "Us")
-		      (match_operand:V4SI 2 "s_register_operand" "w")
-		      (match_operand:V4BI 3 "vpr_register_operand" "Up")]
-	 VLDRWQGSO_F))
-  ]
-  "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-{
-   rtx ops[4];
-   ops[0] = operands[0];
-   ops[1] = operands[1];
-   ops[2] = operands[2];
-   ops[3] = operands[3];
-   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
-   return "";
-}
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrwq_gather_shifted_offset_fv4sf"))
-  (set_attr "length" "8")])
-
-;;
-;; [vldrwq_gather_shifted_offset_z_s vldrwq_gather_shifted_offset_z_u]
-;;
-(define_insn "mve_vldrwq_gather_shifted_offset_z_<supf>v4si"
-  [(set (match_operand:V4SI 0 "s_register_operand" "=&w")
-	(unspec:V4SI [(match_operand:V4SI 1 "memory_operand" "Us")
-		      (match_operand:V4SI 2 "s_register_operand" "w")
-		      (match_operand:V4BI 3 "vpr_register_operand" "Up")]
-	 VLDRWGSOQ))
-  ]
-  "TARGET_HAVE_MVE"
-{
-   rtx ops[4];
-   ops[0] = operands[0];
-   ops[1] = operands[1];
-   ops[2] = operands[2];
-   ops[3] = operands[3];
-   output_asm_insn ("vpst\n\tvldrwt.u32\t%q0, [%m1, %q2, uxtw #2]",ops);
-   return "";
-}
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vldrwq_gather_shifted_offset_<supf>v4si"))
-  (set_attr "length" "8")])
-
 ;; Vector scatter stores with shifted offset
 ;;
 ;; [vstrhq_scatter_shifted_offset_s vstrhq_scatter_shifted_offset_u]
diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md
index cdad4ed..40d0ef7 100644
--- a/gcc/config/arm/unspecs.md
+++ b/gcc/config/arm/unspecs.md
@@ -1162,17 +1162,13 @@
   VLDRGOQ_EXT_Z
   VLDRWQGB_S
   VLDRWQGB_U
-  VLDRHQGSO_S
-  VLDRHQGSO_U
+  VLDRGSOQ
+  VLDRGSOQ_Z
+  VLDRGSOQ_EXT
+  VLDRGSOQ_EXT_Z
   VLDRDQGB_S
   VLDRDQGB_U
-  VLDRDQGSO_S
-  VLDRDQGSO_U
-  VLDRHQGSO_F
   VLDRWQGB_F
-  VLDRWQGSO_F
-  VLDRWQGSO_S
-  VLDRWQGSO_U
   VSTRQ
   VSTRQ_P
   VSTRQ_TRUNC