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| author | Adam Nemet <anemet@caviumnetworks.com> | 2009-07-15 20:40:02 +0000 |
|---|---|---|
| committer | Adam Nemet <nemet@gcc.gnu.org> | 2009-07-15 20:40:02 +0000 |
| commit | da45599cf66aa9593c55b1ddd5726a1781fb8214 (patch) | |
| tree | b65ecc4109165fccb60c845cfa72f126ff87b523 /gcc/config | |
| parent | 31f44cd09ad0001da1bf2e12fb18931a1c4142df (diff) | |
| download | gcc-da45599cf66aa9593c55b1ddd5726a1781fb8214.zip gcc-da45599cf66aa9593c55b1ddd5726a1781fb8214.tar.gz gcc-da45599cf66aa9593c55b1ddd5726a1781fb8214.tar.bz2 | |
* config/mips/mips.md (*extenddi_truncate<mode>,
*extendsi_truncate<mode>): Change type attribute to move_type
with shift_shift. Split out code handling exts from here ...
(*extend<GPR:mode>_truncate<SHORT:mode>_exts): ... to this new
pattern.
(*extendhi_truncateqi): Change type attribute to move_type with
shift_shift. Split out code handling exts from here ...
(*extendhi_truncateqi_exts): ... to this new pattern.
From-SVN: r149694
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/mips/mips.md | 55 |
1 files changed, 32 insertions, 23 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 3c42b46..fc32c75 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -3016,14 +3016,9 @@ [(set (match_operand:DI 0 "register_operand" "=d") (sign_extend:DI (truncate:SHORT (match_operand:DI 1 "register_operand" "d"))))] - "TARGET_64BIT && !TARGET_MIPS16" -{ - if (!ISA_HAS_EXTS) - return "#"; - operands[2] = GEN_INT (GET_MODE_BITSIZE (<SHORT:MODE>mode)); - return "exts\t%0,%1,0,%m2"; -} - "&& reload_completed && !ISA_HAS_EXTS" + "TARGET_64BIT && !TARGET_MIPS16 && !ISA_HAS_EXTS" + "#" + "&& reload_completed" [(set (match_dup 2) (ashift:DI (match_dup 1) (match_dup 3))) @@ -3034,21 +3029,16 @@ operands[2] = gen_lowpart (DImode, operands[0]); operands[3] = GEN_INT (BITS_PER_WORD - GET_MODE_BITSIZE (<MODE>mode)); } - [(set_attr "type" "arith") + [(set_attr "move_type" "shift_shift") (set_attr "mode" "DI")]) (define_insn_and_split "*extendsi_truncate<mode>" [(set (match_operand:SI 0 "register_operand" "=d") (sign_extend:SI (truncate:SHORT (match_operand:DI 1 "register_operand" "d"))))] - "TARGET_64BIT && !TARGET_MIPS16" -{ - if (!ISA_HAS_EXTS) - return "#"; - operands[2] = GEN_INT (GET_MODE_BITSIZE (<SHORT:MODE>mode)); - return "exts\t%0,%1,0,%m2"; -} - "&& reload_completed && !ISA_HAS_EXTS" + "TARGET_64BIT && !TARGET_MIPS16 && !ISA_HAS_EXTS" + "#" + "&& reload_completed" [(set (match_dup 2) (ashift:DI (match_dup 1) (match_dup 3))) @@ -3059,18 +3049,16 @@ operands[2] = gen_lowpart (DImode, operands[0]); operands[3] = GEN_INT (BITS_PER_WORD - GET_MODE_BITSIZE (<MODE>mode)); } - [(set_attr "type" "arith") + [(set_attr "move_type" "shift_shift") (set_attr "mode" "SI")]) (define_insn_and_split "*extendhi_truncateqi" [(set (match_operand:HI 0 "register_operand" "=d") (sign_extend:HI (truncate:QI (match_operand:DI 1 "register_operand" "d"))))] - "TARGET_64BIT && !TARGET_MIPS16" -{ - return ISA_HAS_EXTS ? "exts\t%0,%1,0,7" : "#"; -} - "&& reload_completed && !ISA_HAS_EXTS" + "TARGET_64BIT && !TARGET_MIPS16 && !ISA_HAS_EXTS" + "#" + "&& reload_completed" [(set (match_dup 2) (ashift:DI (match_dup 1) (const_int 56))) @@ -3080,6 +3068,27 @@ { operands[2] = gen_lowpart (DImode, operands[0]); } + [(set_attr "move_type" "shift_shift") + (set_attr "mode" "SI")]) + +(define_insn "*extend<GPR:mode>_truncate<SHORT:mode>_exts" + [(set (match_operand:GPR 0 "register_operand" "=d") + (sign_extend:GPR + (truncate:SHORT (match_operand:DI 1 "register_operand" "d"))))] + "TARGET_64BIT && !TARGET_MIPS16 && ISA_HAS_EXTS" +{ + operands[2] = GEN_INT (GET_MODE_BITSIZE (<SHORT:MODE>mode)); + return "exts\t%0,%1,0,%m2"; +} + [(set_attr "type" "arith") + (set_attr "mode" "<GPR:MODE>")]) + +(define_insn "*extendhi_truncateqi_exts" + [(set (match_operand:HI 0 "register_operand" "=d") + (sign_extend:HI + (truncate:QI (match_operand:DI 1 "register_operand" "d"))))] + "TARGET_64BIT && !TARGET_MIPS16 && ISA_HAS_EXTS" + "exts\t%0,%1,0,7" [(set_attr "type" "arith") (set_attr "mode" "SI")]) |