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| author | H.J. Lu <hjl.tools@gmail.com> | 2021-12-24 12:50:21 -0800 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2021-12-26 05:09:22 -0800 |
| commit | d87483015d476a95f521f0c9dcf6988ca889063b (patch) | |
| tree | f14bea73b5701ee6a518e70956110b1a378734c5 /gcc/config | |
| parent | 9525c26bf19318bed72d3bc3b99dceac5217102f (diff) | |
| download | gcc-d87483015d476a95f521f0c9dcf6988ca889063b.zip gcc-d87483015d476a95f521f0c9dcf6988ca889063b.tar.gz gcc-d87483015d476a95f521f0c9dcf6988ca889063b.tar.bz2 | |
i386: Check AX input in any_mul_highpart peepholes
When applying peephole optimization to transform
mov imm, %reg0
mov %reg1, %AX_REG
imul %reg0
to
mov imm, %AX_REG
imul %reg1
disable peephole optimization if reg1 == AX_REG.
gcc/
PR target/103785
* config/i386/i386.md: Swap operand order in comments and check
AX input in any_mul_highpart peepholes.
gcc/testsuite/
PR target/103785
* gcc.target/i386/pr103785.c: New test.
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/i386.md | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 284b950..eea5d5d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -8578,7 +8578,7 @@ (set_attr "mode" "SI")]) ;; Highpart multiplication peephole2s to tweak register allocation. -;; mov %rdx,imm; mov %rax,%rdi; imulq %rdx -> mov %rax,imm; imulq %rdi +;; mov imm,%rdx; mov %rdi,%rax; imulq %rdx -> mov imm,%rax; imulq %rdi (define_peephole2 [(set (match_operand:SWI48 0 "general_reg_operand") (match_operand:SWI48 1 "immediate_operand")) @@ -8588,7 +8588,8 @@ (any_mul_highpart:SWI48 (match_dup 2) (match_dup 0))) (clobber (match_dup 2)) (clobber (reg:CC FLAGS_REG))])] - "REGNO (operands[0]) != REGNO (operands[2]) + "REGNO (operands[3]) != AX_REG + && REGNO (operands[0]) != REGNO (operands[2]) && REGNO (operands[0]) != REGNO (operands[3]) && (REGNO (operands[0]) == REGNO (operands[4]) || peep2_reg_dead_p (3, operands[0]))" @@ -8608,7 +8609,10 @@ (any_mul_highpart:SI (match_dup 2) (match_dup 0)))) (clobber (match_dup 2)) (clobber (reg:CC FLAGS_REG))])] - "REGNO (operands[0]) != REGNO (operands[2]) + "TARGET_64BIT + && REGNO (operands[3]) != AX_REG + && REGNO (operands[0]) != REGNO (operands[2]) + && REGNO (operands[2]) != REGNO (operands[3]) && REGNO (operands[0]) != REGNO (operands[3]) && (REGNO (operands[0]) == REGNO (operands[4]) || peep2_reg_dead_p (3, operands[0]))" |