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author | Martin Liska <mliska@suse.cz> | 2022-03-07 10:56:43 +0100 |
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committer | Martin Liska <mliska@suse.cz> | 2022-03-07 11:37:55 +0100 |
commit | cfb46c944e8a05653c7eedd79116dae9ce7ad91c (patch) | |
tree | d52d3dc90c2b3383de79ef3a87b715c745875bd4 /gcc/config | |
parent | 2472dcaa8cb9e02e902f83d419c3ee7e0f3d9041 (diff) | |
download | gcc-cfb46c944e8a05653c7eedd79116dae9ce7ad91c.zip gcc-cfb46c944e8a05653c7eedd79116dae9ce7ad91c.tar.gz gcc-cfb46c944e8a05653c7eedd79116dae9ce7ad91c.tar.bz2 |
translation: reuse string and use switch for codes
PR target/104794
gcc/ChangeLog:
* config/arm/arm-builtins.cc (arm_expand_builtin): Reuse error
message. Fix ARM_BUILTIN_WRORHI and ARM_BUILTIN_WRORH that can
have only range [0,32].
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/arm/arm-builtins.cc | 127 |
1 files changed, 77 insertions, 50 deletions
diff --git a/gcc/config/arm/arm-builtins.cc b/gcc/config/arm/arm-builtins.cc index a7acc1d..6c0b1bd 100644 --- a/gcc/config/arm/arm-builtins.cc +++ b/gcc/config/arm/arm-builtins.cc @@ -3922,65 +3922,92 @@ arm_expand_builtin (tree exp, if (GET_MODE (op1) == VOIDmode) { imm = INTVAL (op1); - if ((fcode == ARM_BUILTIN_WRORHI || fcode == ARM_BUILTIN_WRORWI - || fcode == ARM_BUILTIN_WRORH || fcode == ARM_BUILTIN_WRORW) + if ((fcode == ARM_BUILTIN_WRORWI || fcode == ARM_BUILTIN_WRORW) && (imm < 0 || imm > 32)) { - if (fcode == ARM_BUILTIN_WRORHI) - error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_rori_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WRORWI) - error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_rori_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WRORH) - error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_ror_pi16%> in code"); - else - error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_ror_pi32%> in code"); + const char *builtin = (fcode == ARM_BUILTIN_WRORWI + ? "_mm_rori_pi32" : "_mm_ror_pi32"); + error ("the range of count should be in 0 to 32; " + "please check the intrinsic %qs in code", builtin); + } + else if ((fcode == ARM_BUILTIN_WRORHI || fcode == ARM_BUILTIN_WRORH) + && (imm < 0 || imm > 16)) + { + const char *builtin = (fcode == ARM_BUILTIN_WRORHI + ? "_mm_rori_pi16" : "_mm_ror_pi16"); + error ("the range of count should be in 0 to 16; " + "please check the intrinsic %qs in code", builtin); } else if ((fcode == ARM_BUILTIN_WRORDI || fcode == ARM_BUILTIN_WRORD) && (imm < 0 || imm > 64)) { - if (fcode == ARM_BUILTIN_WRORDI) - error ("the range of count should be in 0 to 64; please check the intrinsic %<_mm_rori_si64%> in code"); - else - error ("the range of count should be in 0 to 64; please check the intrinsic %<_mm_ror_si64%> in code"); + const char *builtin = (fcode == ARM_BUILTIN_WRORDI + ? "_mm_rori_si64" : "_mm_ror_si64"); + error ("the range of count should be in 0 to 64; " + "please check the intrinsic %qs in code", builtin); } else if (imm < 0) { - if (fcode == ARM_BUILTIN_WSRLHI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srli_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSRLWI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srli_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WSRLDI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srli_si64%> in code"); - else if (fcode == ARM_BUILTIN_WSLLHI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_slli_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSLLWI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_slli_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WSLLDI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_slli_si64%> in code"); - else if (fcode == ARM_BUILTIN_WSRAHI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srai_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSRAWI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srai_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WSRADI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srai_si64%> in code"); - else if (fcode == ARM_BUILTIN_WSRLH) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srl_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSRLW) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srl_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WSRLD) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srl_si64%> in code"); - else if (fcode == ARM_BUILTIN_WSLLH) - error ("the count should be no less than 0; please check the intrinsic %<_mm_sll_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSLLW) - error ("the count should be no less than 0; please check the intrinsic %<_mm_sll_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WSLLD) - error ("the count should be no less than 0; please check the intrinsic %<_mm_sll_si64%> in code"); - else if (fcode == ARM_BUILTIN_WSRAH) - error ("the count should be no less than 0; please check the intrinsic %<_mm_sra_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSRAW) - error ("the count should be no less than 0; please check the intrinsic %<_mm_sra_pi32%> in code"); - else - error ("the count should be no less than 0; please check the intrinsic %<_mm_sra_si64%> in code"); + const char *builtin; + switch (fcode) + { + case ARM_BUILTIN_WSRLHI: + builtin = "_mm_srli_pi16"; + break; + case ARM_BUILTIN_WSRLWI: + builtin = "_mm_srli_pi32"; + break; + case ARM_BUILTIN_WSRLDI: + builtin = "_mm_srli_si64"; + break; + case ARM_BUILTIN_WSLLHI: + builtin = "_mm_slli_pi16"; + break; + case ARM_BUILTIN_WSLLWI: + builtin = "_mm_slli_pi32"; + break; + case ARM_BUILTIN_WSLLDI: + builtin = "_mm_slli_si64"; + break; + case ARM_BUILTIN_WSRAHI: + builtin = "_mm_srai_pi16"; + break; + case ARM_BUILTIN_WSRAWI: + builtin = "_mm_srai_pi32"; + break; + case ARM_BUILTIN_WSRADI: + builtin = "_mm_srai_si64"; + break; + case ARM_BUILTIN_WSRLH: + builtin = "_mm_srl_pi16"; + break; + case ARM_BUILTIN_WSRLW: + builtin = "_mm_srl_pi32"; + break; + case ARM_BUILTIN_WSRLD: + builtin = "_mm_srl_si64"; + break; + case ARM_BUILTIN_WSLLH: + builtin = "_mm_sll_pi16"; + break; + case ARM_BUILTIN_WSLLW: + builtin = "_mm_sll_pi32"; + break; + case ARM_BUILTIN_WSLLD: + builtin = "_mm_sll_si64"; + break; + case ARM_BUILTIN_WSRAH: + builtin = "_mm_sra_pi16"; + break; + case ARM_BUILTIN_WSRAW: + builtin = "_mm_sra_si64"; + break; + default: + builtin = "_mm_sra_si64"; + break; + } + error ("the count should be no less than 0; " + "please check the intrinsic %qs in code", builtin); } } return arm_expand_binop_builtin (icode, exp, target); |