diff options
| author | Uros Bizjak <ubizjak@gmail.com> | 2011-11-16 19:28:08 +0100 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2011-11-16 19:28:08 +0100 |
| commit | c05e32f58d802bda7fafe9e3471e163734a79c79 (patch) | |
| tree | a3d9a1dedd8e3c3cffd88cfcf531c0323eae4da5 /gcc/config | |
| parent | a6bbb56fef2ade340c48a60c38fa21213c152401 (diff) | |
| download | gcc-c05e32f58d802bda7fafe9e3471e163734a79c79.zip gcc-c05e32f58d802bda7fafe9e3471e163734a79c79.tar.gz gcc-c05e32f58d802bda7fafe9e3471e163734a79c79.tar.bz2 | |
sse.md (round<mode>2_vec_pack_sfix): Optimize V2DFmode sequence for AVX.
* config/i386/sse.md (round<mode>2_vec_pack_sfix): Optimize V2DFmode
sequence for AVX.
(<sse4_1>_round<ssemodesuffix>_vec_pack_sfix<avxsizesuffix>): Ditto.
From-SVN: r181421
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/sse.md | 62 |
1 files changed, 46 insertions, 16 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index b8e821d..d04902b 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -9962,17 +9962,32 @@ { rtx tmp0, tmp1; - tmp0 = gen_reg_rtx (<MODE>mode); - tmp1 = gen_reg_rtx (<MODE>mode); + if (<MODE>mode == V2DFmode + && TARGET_AVX && !TARGET_PREFER_AVX128) + { + rtx tmp2 = gen_reg_rtx (V4DFmode); - emit_insn - (gen_<sse4_1>_round<ssemodesuffix><avxsizesuffix> (tmp0, operands[1], - operands[3])); - emit_insn - (gen_<sse4_1>_round<ssemodesuffix><avxsizesuffix> (tmp1, operands[2], - operands[3])); - emit_insn - (gen_vec_pack_sfix_trunc_<mode> (operands[0], tmp0, tmp1)); + tmp0 = gen_reg_rtx (V4DFmode); + tmp1 = force_reg (V2DFmode, operands[1]); + + emit_insn (gen_avx_vec_concatv4df (tmp0, tmp1, operands[2])); + emit_insn (gen_avx_roundpd256 (tmp2, tmp0, operands[3])); + emit_insn (gen_fix_truncv4dfv4si2 (operands[0], tmp2)); + } + else + { + tmp0 = gen_reg_rtx (<MODE>mode); + tmp1 = gen_reg_rtx (<MODE>mode); + + emit_insn + (gen_<sse4_1>_round<ssemodesuffix><avxsizesuffix> (tmp0, operands[1], + operands[3])); + emit_insn + (gen_<sse4_1>_round<ssemodesuffix><avxsizesuffix> (tmp1, operands[2], + operands[3])); + emit_insn + (gen_vec_pack_sfix_trunc_<mode> (operands[0], tmp0, tmp1)); + } DONE; }) @@ -10053,14 +10068,29 @@ { rtx tmp0, tmp1; - tmp0 = gen_reg_rtx (<MODE>mode); - tmp1 = gen_reg_rtx (<MODE>mode); + if (<MODE>mode == V2DFmode + && TARGET_AVX && !TARGET_PREFER_AVX128) + { + rtx tmp2 = gen_reg_rtx (V4DFmode); - emit_insn (gen_round<mode>2 (tmp0, operands[1])); - emit_insn (gen_round<mode>2 (tmp1, operands[2])); + tmp0 = gen_reg_rtx (V4DFmode); + tmp1 = force_reg (V2DFmode, operands[1]); - emit_insn - (gen_vec_pack_sfix_trunc_<mode> (operands[0], tmp0, tmp1)); + emit_insn (gen_avx_vec_concatv4df (tmp0, tmp1, operands[2])); + emit_insn (gen_roundv4df2 (tmp2, tmp0)); + emit_insn (gen_fix_truncv4dfv4si2 (operands[0], tmp2)); + } + else + { + tmp0 = gen_reg_rtx (<MODE>mode); + tmp1 = gen_reg_rtx (<MODE>mode); + + emit_insn (gen_round<mode>2 (tmp0, operands[1])); + emit_insn (gen_round<mode>2 (tmp1, operands[2])); + + emit_insn + (gen_vec_pack_sfix_trunc_<mode> (operands[0], tmp0, tmp1)); + } DONE; }) |