diff options
| author | Steve Ellcey <sellcey@mips.com> | 2013-08-13 15:49:39 +0000 |
|---|---|---|
| committer | Steve Ellcey <sje@gcc.gnu.org> | 2013-08-13 15:49:39 +0000 |
| commit | b5f8f063a79bbaba332a255da3c59cfb50522641 (patch) | |
| tree | 3220426ff353997e072265866d417def2d218a04 /gcc/config | |
| parent | 4de80584ef049b8823dcbea850a0cb1776d6cbc3 (diff) | |
| download | gcc-b5f8f063a79bbaba332a255da3c59cfb50522641.zip gcc-b5f8f063a79bbaba332a255da3c59cfb50522641.tar.gz gcc-b5f8f063a79bbaba332a255da3c59cfb50522641.tar.bz2 | |
mips.md (prefetch): Use lw instead of ld on loongson in 32bit mode.
2013-08-13 Steve Ellcey <sellcey@mips.com>
* config/mips/mips.md (prefetch): Use lw instead of ld on
loongson in 32bit mode.
From-SVN: r201691
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/mips/mips.md | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 397c40a..0cda169 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -6673,8 +6673,13 @@ "ISA_HAS_PREFETCH && TARGET_EXPLICIT_RELOCS" { if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A) - /* Loongson 2[ef] and Loongson 3a use load to $0 to perform prefetching. */ - return "ld\t$0,%a0"; + { + /* Loongson 2[ef] and Loongson 3a use load to $0 for prefetching. */ + if (TARGET_64BIT) + return "ld\t$0,%a0"; + else + return "lw\t$0,%a0"; + } operands[1] = mips_prefetch_cookie (operands[1], operands[2]); return "pref\t%1,%a0"; } |