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| author | David Daney <ddaney@avtrex.com> | 2007-07-11 16:56:54 +0000 |
|---|---|---|
| committer | David Daney <daney@gcc.gnu.org> | 2007-07-11 16:56:54 +0000 |
| commit | aa3e18a06675265772eef484465d47df163bed28 (patch) | |
| tree | cd8c11d3ca90b2a1dde60cda30555c3a684d36cb /gcc/config | |
| parent | 9251d66467c0b6e62110282450b1d9ef62ecfdb4 (diff) | |
| download | gcc-aa3e18a06675265772eef484465d47df163bed28.zip gcc-aa3e18a06675265772eef484465d47df163bed28.tar.gz gcc-aa3e18a06675265772eef484465d47df163bed28.tar.bz2 | |
linux-unwind.h (mips_fallback_frame_state): Rewrite return address calculation.
* config/mips/linux-unwind.h (mips_fallback_frame_state): Rewrite
return address calculation. Substitute DWARF_ALT_FRAME_RETURN_COLUMN
for SIGNAL_UNWIND_RETURN_COLUMN.
* config/mips/mips.h (SIGNAL_UNWIND_RETURN_COLUMN): Remove.
(DWARF_FRAME_REGNUM): Rewrite.
(DWARF_ALT_FRAME_RETURN_COLUMN) Define.
From-SVN: r126555
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/mips/linux-unwind.h | 12 | ||||
| -rw-r--r-- | gcc/config/mips/mips.h | 16 |
2 files changed, 15 insertions, 13 deletions
diff --git a/gcc/config/mips/linux-unwind.h b/gcc/config/mips/linux-unwind.h index e10fc76..dee7703 100644 --- a/gcc/config/mips/linux-unwind.h +++ b/gcc/config/mips/linux-unwind.h @@ -1,5 +1,5 @@ /* DWARF2 EH unwinding support for MIPS Linux. - Copyright (C) 2004, 2005, 2006 Free Software Foundation, Inc. + Copyright (C) 2004, 2005, 2006, 2007 Free Software Foundation, Inc. This file is part of GCC. @@ -51,7 +51,6 @@ mips_fallback_frame_state (struct _Unwind_Context *context, _Unwind_FrameState *fs) { u_int32_t *pc = (u_int32_t *) context->ra; - u_int32_t t; struct sigcontext *sc; _Unwind_Ptr new_cfa; int i; @@ -106,11 +105,10 @@ mips_fallback_frame_state (struct _Unwind_Context *context, /* The PC points to the faulting instruction, but the unwind tables expect it point to the following instruction. We compensate by reporting a return address at the next instruction. */ - fs->regs.reg[SIGNAL_UNWIND_RETURN_COLUMN].how = REG_SAVED_VAL_OFFSET; - t = (*(u_int32_t *)(void *)&sc->sc_pc) + 4; - fs->regs.reg[SIGNAL_UNWIND_RETURN_COLUMN].loc.offset - = (_Unwind_Ptr)t - new_cfa; - fs->retaddr_column = SIGNAL_UNWIND_RETURN_COLUMN; + fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_VAL_OFFSET; + fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset + = (_Unwind_Ptr)(sc->sc_pc) + 4 - new_cfa; + fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN; return _URC_NO_REASON; } diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 5c58806..6ad6cf7 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1,6 +1,7 @@ /* Definitions of target machine for GNU compiler. MIPS version. Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998 - 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007 + Free Software Foundation, Inc. Contributed by A. Lichnewsky (lich@inria.inria.fr). Changed by Michael Meissner (meissner@osf.org). 64-bit r4000 support by Ian Lance Taylor (ian@cygnus.com) and @@ -1007,15 +1008,12 @@ extern const struct mips_rtx_cost_data *mips_cost; #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ] /* The mapping from gcc register number to DWARF 2 CFA column number. */ -#define DWARF_FRAME_REGNUM(REG) (REG) +#define DWARF_FRAME_REGNUM(REG) \ + ((REG) == DWARF_ALT_FRAME_RETURN_COLUMN ? INVALID_REGNUM : (REG)) /* The DWARF 2 CFA column which tracks the return address. */ #define DWARF_FRAME_RETURN_COLUMN (GP_REG_FIRST + 31) -/* The DWARF 2 CFA column which tracks the return address from a - signal handler context. */ -#define SIGNAL_UNWIND_RETURN_COLUMN (FP_REG_LAST + 1) - /* Before the prologue, RA lives in r31. */ #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31) @@ -1359,6 +1357,12 @@ extern const struct mips_rtx_cost_data *mips_cost; #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1) #define MD_DBX_FIRST (FP_DBX_FIRST + FP_REG_NUM) +/* The DWARF 2 CFA column which tracks the return address from a + signal handler context. This means that to maintain backwards + compatibility, no hard register can be assigned this column if it + would need to be handled by the DWARF unwinder. */ +#define DWARF_ALT_FRAME_RETURN_COLUMN 66 + #define ST_REG_FIRST 67 #define ST_REG_LAST 74 #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1) |