sh.h (EXTRA_CONSTRAINT_Q): Adjust to GNU Coding Standards.

* sh.h (EXTRA_CONSTRAINT_Q): Adjust to GNU Coding Standards.
* sh.c (expand_block_move): Break long lines.
(expand_ashiftrt, fpscr_set_from_mem): Likewise.
* sh.md (mulsi3): Likewise.
(movdi): Adjust spacing.

From-SVN: r35548

3 files changed, 30 insertions, 30 deletions

diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index 3c49386..99bb71a 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -356,16 +356,15 @@ expand_block_move (operands)
       else if (bytes == 12)
 	{
 	  tree entry_name;
+	  rtx sym;
 	  rtx func_addr_rtx;
 	  rtx r4 = gen_rtx (REG, SImode, 4);
 	  rtx r5 = gen_rtx (REG, SImode, 5);
 
 	  entry_name = get_identifier ("__movstrSI12_i4");
 
-	  func_addr_rtx
-	    = copy_to_mode_reg (Pmode,
-				gen_rtx_SYMBOL_REF (Pmode,
-						    IDENTIFIER_POINTER (entry_name)));
+	  sym = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name));
+	  func_addr_rtx = copy_to_mode_reg (Pmode, sym);
 	  force_into (XEXP (operands[0], 0), r4);
 	  force_into (XEXP (operands[1], 0), r5);
 	  emit_insn (gen_block_move_real_i4 (func_addr_rtx));
@@ -374,6 +373,7 @@ expand_block_move (operands)
       else if (! TARGET_SMALLCODE)
 	{
 	  tree entry_name;
+	  rtx sym;
 	  rtx func_addr_rtx;
 	  int dwords;
 	  rtx r4 = gen_rtx (REG, SImode, 4);
@@ -383,10 +383,8 @@ expand_block_move (operands)
 	  entry_name = get_identifier (bytes & 4
 				       ? "__movstr_i4_odd"
 				       : "__movstr_i4_even");
-	  func_addr_rtx
-	    = copy_to_mode_reg (Pmode,
-				gen_rtx_SYMBOL_REF (Pmode,
-						    IDENTIFIER_POINTER (entry_name)));
+	  sym = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name));
+	  func_addr_rtx = copy_to_mode_reg (Pmode, sym);
 	  force_into (XEXP (operands[0], 0), r4);
 	  force_into (XEXP (operands[1], 0), r5);
 
@@ -402,17 +400,15 @@ expand_block_move (operands)
     {
       char entry[30];
       tree entry_name;
+      rtx sym;
       rtx func_addr_rtx;
       rtx r4 = gen_rtx_REG (SImode, 4);
       rtx r5 = gen_rtx_REG (SImode, 5);
 
       sprintf (entry, "__movstrSI%d", bytes);
       entry_name = get_identifier (entry);
-
-      func_addr_rtx
-	= copy_to_mode_reg (Pmode,
-			    gen_rtx_SYMBOL_REF
-			    (Pmode, IDENTIFIER_POINTER (entry_name)));
+      sym = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name));
+      func_addr_rtx = copy_to_mode_reg (Pmode, sym);
       force_into (XEXP (operands[0], 0), r4);
       force_into (XEXP (operands[1], 0), r5);
       emit_insn (gen_block_move_real (func_addr_rtx));
@@ -424,6 +420,7 @@ expand_block_move (operands)
   if (! TARGET_SMALLCODE)
     {
       tree entry_name;
+      rtx sym;
       rtx func_addr_rtx;
       int final_switch, while_loop;
       rtx r4 = gen_rtx_REG (SImode, 4);
@@ -431,10 +428,8 @@ expand_block_move (operands)
       rtx r6 = gen_rtx_REG (SImode, 6);
 
       entry_name = get_identifier ("__movstr");
-      func_addr_rtx
-	= copy_to_mode_reg (Pmode,
-			    gen_rtx_SYMBOL_REF
-			    (Pmode, IDENTIFIER_POINTER (entry_name)));
+      sym = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name));
+      func_addr_rtx = copy_to_mode_reg (Pmode, sym);
       force_into (XEXP (operands[0], 0), r4);
       force_into (XEXP (operands[1], 0), r5);
 
@@ -1178,6 +1173,7 @@ int
 expand_ashiftrt (operands)
      rtx *operands;
 {
+  rtx sym;
   rtx wrk;
   char func[18];
   tree func_name;
@@ -1238,8 +1234,8 @@ expand_ashiftrt (operands)
   emit_move_insn (gen_rtx_REG (SImode, 4), operands[1]);
   sprintf (func, "__ashiftrt_r4_%d", value);
   func_name = get_identifier (func);
-  emit_move_insn (wrk, gen_rtx_SYMBOL_REF (Pmode,
-					   IDENTIFIER_POINTER (func_name)));
+  sym = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (func_name));
+  emit_move_insn (wrk, sym);
   emit_insn (gen_ashrsi3_n (GEN_INT (value), wrk));
   emit_move_insn (operands[0], gen_rtx_REG (SImode, 4));
   return 1;
@@ -5111,10 +5107,11 @@ fpscr_set_from_mem (mode, regs_live)
 {
   enum attr_fp_mode fp_mode = mode;
   rtx i;
+  rtx sym;
   rtx addr_reg = get_free_reg (regs_live);
 
-  i = gen_rtx_SET (VOIDmode, addr_reg,
-		   gen_rtx_SYMBOL_REF (SImode, "__fpscr_values"));
+  sym = gen_rtx_SYMBOL_REF (SImode, "__fpscr_values");
+  i = gen_rtx_SET (VOIDmode, addr_reg, sym);
   emit_insn (i);
   if (fp_mode == (TARGET_FPU_SINGLE ? FP_MODE_SINGLE : FP_MODE_DOUBLE))
     {
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 8d83266..1ea39d6 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -1286,12 +1286,12 @@ extern int current_function_anonymous_args;
 
 /* The 'Q' constraint is a pc relative load operand.  */
 #define EXTRA_CONSTRAINT_Q(OP)                          		\
-  (GET_CODE (OP) == MEM && 						\
-   ((GET_CODE (XEXP ((OP), 0)) == LABEL_REF)				\
-    || (GET_CODE (XEXP ((OP), 0)) == CONST                		\
-	&& GET_CODE (XEXP (XEXP ((OP), 0), 0)) == PLUS 			\
-	&& GET_CODE (XEXP (XEXP (XEXP ((OP), 0), 0), 0)) == LABEL_REF	\
-	&& GET_CODE (XEXP (XEXP (XEXP ((OP), 0), 0), 1)) == CONST_INT)))
+  (GET_CODE (OP) == MEM 						\
+   && ((GET_CODE (XEXP ((OP), 0)) == LABEL_REF)				\
+       || (GET_CODE (XEXP ((OP), 0)) == CONST                		\
+	   && GET_CODE (XEXP (XEXP ((OP), 0), 0)) == PLUS		\
+	   && GET_CODE (XEXP (XEXP (XEXP ((OP), 0), 0), 0)) == LABEL_REF \
+	   && GET_CODE (XEXP (XEXP (XEXP ((OP), 0), 0), 1)) == CONST_INT)))
 
 #define EXTRA_CONSTRAINT(OP, C)		\
   ((C) == 'Q' ? EXTRA_CONSTRAINT_Q (OP)	\
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index dd915d3..1e35497 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -1188,8 +1188,10 @@
     {
       /* The address must be set outside the libcall,
 	 since it goes into a pseudo.  */
-      rtx addr = force_reg (SImode, gen_rtx_SYMBOL_REF (SImode, \"__mulsi3\"));
-      rtx insns = gen_mulsi3_call (operands[0], operands[1], operands[2], addr);
+      rtx sym = gen_rtx_SYMBOL_REF (SImode, \"__mulsi3\");
+      rtx addr = force_reg (SImode, sym);
+      rtx insns = gen_mulsi3_call (operands[0], operands[1],
+				   operands[2], addr);
       first = XVECEXP (insns, 0, 0);
       last = XVECEXP (insns, 0, XVECLEN (insns, 0) - 1);
       emit_insn (insns);
@@ -2357,6 +2359,7 @@
 	mov.l	%1,%0
 	fake	%1,%0"
   [(set_attr "type" "pcload,move,load,move,move,store,pcload")])
+
 (define_expand "movsi"
   [(set (match_operand:SI 0 "general_movdst_operand" "")
 	(match_operand:SI 1 "general_movsrc_operand" ""))]
@@ -2493,7 +2496,7 @@
   [(set (match_operand:DI 0 "general_movdst_operand" "")
 	(match_operand:DI 1 "general_movsrc_operand" ""))]
   ""
-  "{ if ( prepare_move_operands (operands, DImode)) DONE; }")
+  "{ if (prepare_move_operands (operands, DImode)) DONE; }")
 
 ;; ??? This should be a define expand.