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| author | Andrew Pinski <apinski@marvell.com> | 2021-10-26 07:28:09 +0000 |
|---|---|---|
| committer | Andrew Pinski <apinski@marvell.com> | 2022-01-07 22:02:44 +0000 |
| commit | 997130f778c56466a825627644e510960585521b (patch) | |
| tree | 4a959c3e8275b9c20937e24d0f277143c0f025fa /gcc/config | |
| parent | 42ae7ebfb2665f8565c8d6c04f6214785a6765ce (diff) | |
| download | gcc-997130f778c56466a825627644e510960585521b.zip gcc-997130f778c56466a825627644e510960585521b.tar.gz gcc-997130f778c56466a825627644e510960585521b.tar.bz2 | |
target: [PR102941] Fix inline-asm flags with non-REG_P output
So the problem here is that arm_md_asm_adjust would
just create a set directly to the output memory which is wrong.
It needs to output to a temp register first and then do a
move.
OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.
I have no way to test on arm even though this touches common code.
PR target/102941
gcc/ChangeLog:
* config/arm/aarch-common.c (arm_md_asm_adjust):
Use a temp if !REG_P.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/asm-flag-7.c: New test.
* gcc.target/arm/asm-flag-7.c: New test.
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/arm/aarch-common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/arm/aarch-common.c b/gcc/config/arm/aarch-common.c index 812017a..04a53d7 100644 --- a/gcc/config/arm/aarch-common.c +++ b/gcc/config/arm/aarch-common.c @@ -641,7 +641,7 @@ arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/, rtx x = gen_rtx_REG (mode, CC_REGNUM); x = gen_rtx_fmt_ee (code, word_mode, x, const0_rtx); - if (dest_mode == word_mode) + if (dest_mode == word_mode && REG_P (dest)) emit_insn (gen_rtx_SET (dest, x)); else { |